1 ==================
2 The SMBus Protocol
3 ==================
4
5 The following is a summary of the SMBus protoc
6 all revisions of the protocol (1.0, 1.1, and 2
7 Certain protocol features which are not suppor
8 this package are briefly described at the end
9
10 Some adapters understand only the SMBus (Syste
11 which is a subset from the I2C protocol. Fortu
12 only the same subset, which makes it possible
13
14 If you write a driver for some I2C device, ple
15 commands if at all possible (if the device use
16 I2C protocol). This makes it possible to use t
17 SMBus adapters and I2C adapters (the SMBus com
18 translated to I2C on I2C adapters, but plain I
19 handled at all on most pure SMBus adapters).
20
21 Below is a list of SMBus protocol operations,
22 them. Note that the names used in the SMBus p
23 don't match these function names. For some of
24 single data byte, the functions using SMBus pr
25 a different protocol operation entirely.
26
27 Each transaction type corresponds to a functio
28 transaction function, a device driver should a
29 the corresponding functionality flag to ensure
30 adapter supports the transaction in question.
31 Documentation/i2c/functionality.rst for the de
32
33
34 Key to symbols
35 ==============
36
37 =============== ==============================
38 S Start condition
39 Sr Repeated start condition, used
40 read mode.
41 P Stop condition
42 Rd/Wr (1 bit) Read/Write bit. Rd equals 1, W
43 A, NA (1 bit) Acknowledge (ACK) and Not Ackn
44 Addr (7 bits) I2C 7 bit address. Note that t
45 get a 10 bit I2C address.
46 Comm (8 bits) Command byte, a data byte whic
47 the device.
48 Data (8 bits) A plain data byte. DataLow and
49 high byte of a 16 bit word.
50 Count (8 bits) A data byte containing the len
51
52 [..] Data sent by I2C device, as op
53 adapter.
54 =============== ==============================
55
56
57 SMBus Quick Command
58 ===================
59
60 This sends a single bit to the device, at the
61
62 S Addr Rd/Wr [A] P
63
64 Functionality flag: I2C_FUNC_SMBUS_QUICK
65
66
67 SMBus Receive Byte
68 ==================
69
70 Implemented by i2c_smbus_read_byte()
71
72 This reads a single byte from a device, withou
73 register. Some devices are so simple that this
74 others, it is a shorthand if you want to read
75 the previous SMBus command::
76
77 S Addr Rd [A] [Data] NA P
78
79 Functionality flag: I2C_FUNC_SMBUS_READ_BYTE
80
81
82 SMBus Send Byte
83 ===============
84
85 Implemented by i2c_smbus_write_byte()
86
87 This operation is the reverse of Receive Byte:
88 to a device. See Receive Byte for more inform
89
90 ::
91
92 S Addr Wr [A] Data [A] P
93
94 Functionality flag: I2C_FUNC_SMBUS_WRITE_BYTE
95
96
97 SMBus Read Byte
98 ===============
99
100 Implemented by i2c_smbus_read_byte_data()
101
102 This reads a single byte from a device, from a
103 The register is specified through the Comm byt
104
105 S Addr Wr [A] Comm [A] Sr Addr Rd [A] [Data]
106
107 Functionality flag: I2C_FUNC_SMBUS_READ_BYTE_D
108
109
110 SMBus Read Word
111 ===============
112
113 Implemented by i2c_smbus_read_word_data()
114
115 This operation is very like Read Byte; again,
116 device, from a designated register that is spe
117 byte. But this time, the data is a complete wo
118
119 S Addr Wr [A] Comm [A] Sr Addr Rd [A] [DataL
120
121 Functionality flag: I2C_FUNC_SMBUS_READ_WORD_D
122
123 Note the convenience function i2c_smbus_read_w
124 available for reads where the two data bytes a
125 around (not SMBus compliant, but very popular.
126
127
128 SMBus Write Byte
129 ================
130
131 Implemented by i2c_smbus_write_byte_data()
132
133 This writes a single byte to a device, to a de
134 register is specified through the Comm byte. T
135 the Read Byte operation.
136
137 ::
138
139 S Addr Wr [A] Comm [A] Data [A] P
140
141 Functionality flag: I2C_FUNC_SMBUS_WRITE_BYTE_
142
143
144 SMBus Write Word
145 ================
146
147 Implemented by i2c_smbus_write_word_data()
148
149 This is the opposite of the Read Word operatio
150 of data are written to a device, to the design
151 specified through the Comm byte::
152
153 S Addr Wr [A] Comm [A] DataLow [A] DataHigh
154
155 Functionality flag: I2C_FUNC_SMBUS_WRITE_WORD_
156
157 Note the convenience function i2c_smbus_write_
158 available for writes where the two data bytes
159 around (not SMBus compliant, but very popular.
160
161
162 SMBus Process Call
163 ==================
164
165 This command selects a device register (throug
166 16 bits of data to it, and reads 16 bits of da
167
168 S Addr Wr [A] Comm [A] DataLow [A] DataHigh
169 Sr Addr Rd [A] [
170
171 Functionality flag: I2C_FUNC_SMBUS_PROC_CALL
172
173
174 SMBus Block Read
175 ================
176
177 Implemented by i2c_smbus_read_block_data()
178
179 This command reads a block of up to 32 bytes f
180 designated register that is specified through
181 of data is specified by the device in the Coun
182
183 ::
184
185 S Addr Wr [A] Comm [A]
186 Sr Addr Rd [A] [Count] A [Data] A
187
188 Functionality flag: I2C_FUNC_SMBUS_READ_BLOCK_
189
190
191 SMBus Block Write
192 =================
193
194 Implemented by i2c_smbus_write_block_data()
195
196 The opposite of the Block Read command, this w
197 a device, to a designated register that is spe
198 Comm byte. The amount of data is specified in
199
200 ::
201
202 S Addr Wr [A] Comm [A] Count [A] Data [A] Da
203
204 Functionality flag: I2C_FUNC_SMBUS_WRITE_BLOCK
205
206
207 SMBus Block Write - Block Read Process Call
208 ===========================================
209
210 SMBus Block Write - Block Read Process Call wa
211 Revision 2.0 of the specification.
212
213 This command selects a device register (throug
214 1 to 31 bytes of data to it, and reads 1 to 31
215
216 S Addr Wr [A] Comm [A] Count [A] Data [A] ..
217 Sr Addr Rd [A] [
218
219 Functionality flag: I2C_FUNC_SMBUS_BLOCK_PROC_
220
221
222 SMBus Host Notify
223 =================
224
225 This command is sent from a SMBus device actin
226 SMBus host acting as a slave.
227 It is the same form as Write Word, with the co
228 alerting device's address.
229
230 ::
231
232 [S] [HostAddr] [Wr] A [DevAddr] A [DataLow]
233
234 This is implemented in the following way in th
235
236 * I2C bus drivers which support SMBus Host Not
237 I2C_FUNC_SMBUS_HOST_NOTIFY.
238 * I2C bus drivers trigger SMBus Host Notify by
239 i2c_handle_smbus_host_notify().
240 * I2C drivers for devices which can trigger SM
241 client->irq assigned to a Host Notify IRQ if
242
243 There is currently no way to retrieve the data
244
245
246 Packet Error Checking (PEC)
247 ===========================
248
249 Packet Error Checking was introduced in Revisi
250
251 PEC adds a CRC-8 error-checking byte to transf
252 before the terminating STOP.
253
254
255 Address Resolution Protocol (ARP)
256 =================================
257
258 The Address Resolution Protocol was introduced
259 the specification. It is a higher-layer protoc
260 messages above.
261
262 ARP adds device enumeration and dynamic addres
263 the protocol. All ARP communications use slave
264 require PEC checksums.
265
266
267 SMBus Alert
268 ===========
269
270 SMBus Alert was introduced in Revision 1.0 of
271
272 The SMBus alert protocol allows several SMBus
273 single interrupt pin on the SMBus master, whil
274 to know which slave triggered the interrupt.
275
276 This is implemented the following way in the L
277
278 * I2C bus drivers which support SMBus alert sh
279 i2c_new_smbus_alert_device() to install SMBu
280 * I2C drivers for devices which can trigger SM
281 the optional alert() callback.
282
283
284 I2C Block Transactions
285 ======================
286
287 The following I2C block transactions are simil
288 and Write operations, except these do not have
289 supported by the SMBus layer and are described
290 they are *NOT* defined by the SMBus specificat
291
292 I2C block transactions do not limit the number
293 but the SMBus layer places a limit of 32 bytes
294
295
296 I2C Block Read
297 ==============
298
299 Implemented by i2c_smbus_read_i2c_block_data()
300
301 This command reads a block of bytes from a dev
302 designated register that is specified through
303
304 S Addr Wr [A] Comm [A]
305 Sr Addr Rd [A] [Data] A [Data] A .
306
307 Functionality flag: I2C_FUNC_SMBUS_READ_I2C_BL
308
309
310 I2C Block Write
311 ===============
312
313 Implemented by i2c_smbus_write_i2c_block_data(
314
315 The opposite of the Block Read command, this w
316 a device, to a designated register that is spe
317 Comm byte. Note that command lengths of 0, 2,
318 supported as they are indistinguishable from d
319
320 ::
321
322 S Addr Wr [A] Comm [A] Data [A] Data [A] ...
323
324 Functionality flag: I2C_FUNC_SMBUS_WRITE_I2C_B
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