1 ================== 1 ==================
2 The SMBus Protocol 2 The SMBus Protocol
3 ================== 3 ==================
4 4
5 The following is a summary of the SMBus protoc 5 The following is a summary of the SMBus protocol. It applies to
6 all revisions of the protocol (1.0, 1.1, and 2 6 all revisions of the protocol (1.0, 1.1, and 2.0).
7 Certain protocol features which are not suppor 7 Certain protocol features which are not supported by
8 this package are briefly described at the end 8 this package are briefly described at the end of this document.
9 9
10 Some adapters understand only the SMBus (Syste 10 Some adapters understand only the SMBus (System Management Bus) protocol,
11 which is a subset from the I2C protocol. Fortu 11 which is a subset from the I2C protocol. Fortunately, many devices use
12 only the same subset, which makes it possible 12 only the same subset, which makes it possible to put them on an SMBus.
13 13
14 If you write a driver for some I2C device, ple 14 If you write a driver for some I2C device, please try to use the SMBus
15 commands if at all possible (if the device use 15 commands if at all possible (if the device uses only that subset of the
16 I2C protocol). This makes it possible to use t 16 I2C protocol). This makes it possible to use the device driver on both
17 SMBus adapters and I2C adapters (the SMBus com 17 SMBus adapters and I2C adapters (the SMBus command set is automatically
18 translated to I2C on I2C adapters, but plain I 18 translated to I2C on I2C adapters, but plain I2C commands can not be
19 handled at all on most pure SMBus adapters). 19 handled at all on most pure SMBus adapters).
20 20
21 Below is a list of SMBus protocol operations, 21 Below is a list of SMBus protocol operations, and the functions executing
22 them. Note that the names used in the SMBus p 22 them. Note that the names used in the SMBus protocol specifications usually
23 don't match these function names. For some of 23 don't match these function names. For some of the operations which pass a
24 single data byte, the functions using SMBus pr 24 single data byte, the functions using SMBus protocol operation names execute
25 a different protocol operation entirely. 25 a different protocol operation entirely.
26 26
27 Each transaction type corresponds to a functio 27 Each transaction type corresponds to a functionality flag. Before calling a
28 transaction function, a device driver should a 28 transaction function, a device driver should always check (just once) for
29 the corresponding functionality flag to ensure 29 the corresponding functionality flag to ensure that the underlying I2C
30 adapter supports the transaction in question. 30 adapter supports the transaction in question. See
31 Documentation/i2c/functionality.rst for the de 31 Documentation/i2c/functionality.rst for the details.
32 32
33 33
34 Key to symbols 34 Key to symbols
35 ============== 35 ==============
36 36
37 =============== ============================== 37 =============== =============================================================
38 S Start condition 38 S Start condition
39 Sr Repeated start condition, used <<
40 read mode. <<
41 P Stop condition 39 P Stop condition
42 Rd/Wr (1 bit) Read/Write bit. Rd equals 1, W 40 Rd/Wr (1 bit) Read/Write bit. Rd equals 1, Wr equals 0.
43 A, NA (1 bit) Acknowledge (ACK) and Not Ackn 41 A, NA (1 bit) Acknowledge (ACK) and Not Acknowledge (NACK) bit
44 Addr (7 bits) I2C 7 bit address. Note that t !! 42 Addr (7 bits) I2C 7 bit address. Note that this can be expanded as usual to
45 get a 10 bit I2C address. 43 get a 10 bit I2C address.
46 Comm (8 bits) Command byte, a data byte whic 44 Comm (8 bits) Command byte, a data byte which often selects a register on
47 the device. 45 the device.
48 Data (8 bits) A plain data byte. DataLow and !! 46 Data (8 bits) A plain data byte. Sometimes, I write DataLow, DataHigh
49 high byte of a 16 bit word. !! 47 for 16 bit data.
50 Count (8 bits) A data byte containing the len 48 Count (8 bits) A data byte containing the length of a block operation.
51 49
52 [..] Data sent by I2C device, as op 50 [..] Data sent by I2C device, as opposed to data sent by the host
53 adapter. 51 adapter.
54 =============== ============================== 52 =============== =============================================================
55 53
56 54
57 SMBus Quick Command 55 SMBus Quick Command
58 =================== 56 ===================
59 57
60 This sends a single bit to the device, at the 58 This sends a single bit to the device, at the place of the Rd/Wr bit::
61 59
62 S Addr Rd/Wr [A] P 60 S Addr Rd/Wr [A] P
63 61
64 Functionality flag: I2C_FUNC_SMBUS_QUICK 62 Functionality flag: I2C_FUNC_SMBUS_QUICK
65 63
66 64
67 SMBus Receive Byte 65 SMBus Receive Byte
68 ================== 66 ==================
69 67
70 Implemented by i2c_smbus_read_byte() 68 Implemented by i2c_smbus_read_byte()
71 69
72 This reads a single byte from a device, withou 70 This reads a single byte from a device, without specifying a device
73 register. Some devices are so simple that this 71 register. Some devices are so simple that this interface is enough; for
74 others, it is a shorthand if you want to read 72 others, it is a shorthand if you want to read the same register as in
75 the previous SMBus command:: 73 the previous SMBus command::
76 74
77 S Addr Rd [A] [Data] NA P 75 S Addr Rd [A] [Data] NA P
78 76
79 Functionality flag: I2C_FUNC_SMBUS_READ_BYTE 77 Functionality flag: I2C_FUNC_SMBUS_READ_BYTE
80 78
81 79
82 SMBus Send Byte 80 SMBus Send Byte
83 =============== 81 ===============
84 82
85 Implemented by i2c_smbus_write_byte() 83 Implemented by i2c_smbus_write_byte()
86 84
87 This operation is the reverse of Receive Byte: 85 This operation is the reverse of Receive Byte: it sends a single byte
88 to a device. See Receive Byte for more inform 86 to a device. See Receive Byte for more information.
89 87
90 :: 88 ::
91 89
92 S Addr Wr [A] Data [A] P 90 S Addr Wr [A] Data [A] P
93 91
94 Functionality flag: I2C_FUNC_SMBUS_WRITE_BYTE 92 Functionality flag: I2C_FUNC_SMBUS_WRITE_BYTE
95 93
96 94
97 SMBus Read Byte 95 SMBus Read Byte
98 =============== 96 ===============
99 97
100 Implemented by i2c_smbus_read_byte_data() 98 Implemented by i2c_smbus_read_byte_data()
101 99
102 This reads a single byte from a device, from a 100 This reads a single byte from a device, from a designated register.
103 The register is specified through the Comm byt 101 The register is specified through the Comm byte::
104 102
105 S Addr Wr [A] Comm [A] Sr Addr Rd [A] [Data] !! 103 S Addr Wr [A] Comm [A] S Addr Rd [A] [Data] NA P
106 104
107 Functionality flag: I2C_FUNC_SMBUS_READ_BYTE_D 105 Functionality flag: I2C_FUNC_SMBUS_READ_BYTE_DATA
108 106
109 107
110 SMBus Read Word 108 SMBus Read Word
111 =============== 109 ===============
112 110
113 Implemented by i2c_smbus_read_word_data() 111 Implemented by i2c_smbus_read_word_data()
114 112
115 This operation is very like Read Byte; again, 113 This operation is very like Read Byte; again, data is read from a
116 device, from a designated register that is spe 114 device, from a designated register that is specified through the Comm
117 byte. But this time, the data is a complete wo 115 byte. But this time, the data is a complete word (16 bits)::
118 116
119 S Addr Wr [A] Comm [A] Sr Addr Rd [A] [DataL !! 117 S Addr Wr [A] Comm [A] S Addr Rd [A] [DataLow] A [DataHigh] NA P
120 118
121 Functionality flag: I2C_FUNC_SMBUS_READ_WORD_D 119 Functionality flag: I2C_FUNC_SMBUS_READ_WORD_DATA
122 120
123 Note the convenience function i2c_smbus_read_w 121 Note the convenience function i2c_smbus_read_word_swapped() is
124 available for reads where the two data bytes a 122 available for reads where the two data bytes are the other way
125 around (not SMBus compliant, but very popular. 123 around (not SMBus compliant, but very popular.)
126 124
127 125
128 SMBus Write Byte 126 SMBus Write Byte
129 ================ 127 ================
130 128
131 Implemented by i2c_smbus_write_byte_data() 129 Implemented by i2c_smbus_write_byte_data()
132 130
133 This writes a single byte to a device, to a de 131 This writes a single byte to a device, to a designated register. The
134 register is specified through the Comm byte. T 132 register is specified through the Comm byte. This is the opposite of
135 the Read Byte operation. 133 the Read Byte operation.
136 134
137 :: 135 ::
138 136
139 S Addr Wr [A] Comm [A] Data [A] P 137 S Addr Wr [A] Comm [A] Data [A] P
140 138
141 Functionality flag: I2C_FUNC_SMBUS_WRITE_BYTE_ 139 Functionality flag: I2C_FUNC_SMBUS_WRITE_BYTE_DATA
142 140
143 141
144 SMBus Write Word 142 SMBus Write Word
145 ================ 143 ================
146 144
147 Implemented by i2c_smbus_write_word_data() 145 Implemented by i2c_smbus_write_word_data()
148 146
149 This is the opposite of the Read Word operatio 147 This is the opposite of the Read Word operation. 16 bits
150 of data are written to a device, to the design 148 of data are written to a device, to the designated register that is
151 specified through the Comm byte:: 149 specified through the Comm byte::
152 150
153 S Addr Wr [A] Comm [A] DataLow [A] DataHigh 151 S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] P
154 152
155 Functionality flag: I2C_FUNC_SMBUS_WRITE_WORD_ 153 Functionality flag: I2C_FUNC_SMBUS_WRITE_WORD_DATA
156 154
157 Note the convenience function i2c_smbus_write_ 155 Note the convenience function i2c_smbus_write_word_swapped() is
158 available for writes where the two data bytes 156 available for writes where the two data bytes are the other way
159 around (not SMBus compliant, but very popular. 157 around (not SMBus compliant, but very popular.)
160 158
161 159
162 SMBus Process Call 160 SMBus Process Call
163 ================== 161 ==================
164 162
165 This command selects a device register (throug 163 This command selects a device register (through the Comm byte), sends
166 16 bits of data to it, and reads 16 bits of da 164 16 bits of data to it, and reads 16 bits of data in return::
167 165
168 S Addr Wr [A] Comm [A] DataLow [A] DataHigh 166 S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A]
169 Sr Addr Rd [A] [ !! 167 S Addr Rd [A] [DataLow] A [DataHigh] NA P
170 168
171 Functionality flag: I2C_FUNC_SMBUS_PROC_CALL 169 Functionality flag: I2C_FUNC_SMBUS_PROC_CALL
172 170
173 171
174 SMBus Block Read 172 SMBus Block Read
175 ================ 173 ================
176 174
177 Implemented by i2c_smbus_read_block_data() 175 Implemented by i2c_smbus_read_block_data()
178 176
179 This command reads a block of up to 32 bytes f 177 This command reads a block of up to 32 bytes from a device, from a
180 designated register that is specified through 178 designated register that is specified through the Comm byte. The amount
181 of data is specified by the device in the Coun 179 of data is specified by the device in the Count byte.
182 180
183 :: 181 ::
184 182
185 S Addr Wr [A] Comm [A] 183 S Addr Wr [A] Comm [A]
186 Sr Addr Rd [A] [Count] A [Data] A !! 184 S Addr Rd [A] [Count] A [Data] A [Data] A ... A [Data] NA P
187 185
188 Functionality flag: I2C_FUNC_SMBUS_READ_BLOCK_ 186 Functionality flag: I2C_FUNC_SMBUS_READ_BLOCK_DATA
189 187
190 188
191 SMBus Block Write 189 SMBus Block Write
192 ================= 190 =================
193 191
194 Implemented by i2c_smbus_write_block_data() 192 Implemented by i2c_smbus_write_block_data()
195 193
196 The opposite of the Block Read command, this w 194 The opposite of the Block Read command, this writes up to 32 bytes to
197 a device, to a designated register that is spe 195 a device, to a designated register that is specified through the
198 Comm byte. The amount of data is specified in 196 Comm byte. The amount of data is specified in the Count byte.
199 197
200 :: 198 ::
201 199
202 S Addr Wr [A] Comm [A] Count [A] Data [A] Da 200 S Addr Wr [A] Comm [A] Count [A] Data [A] Data [A] ... [A] Data [A] P
203 201
204 Functionality flag: I2C_FUNC_SMBUS_WRITE_BLOCK 202 Functionality flag: I2C_FUNC_SMBUS_WRITE_BLOCK_DATA
205 203
206 204
207 SMBus Block Write - Block Read Process Call 205 SMBus Block Write - Block Read Process Call
208 =========================================== 206 ===========================================
209 207
210 SMBus Block Write - Block Read Process Call wa 208 SMBus Block Write - Block Read Process Call was introduced in
211 Revision 2.0 of the specification. 209 Revision 2.0 of the specification.
212 210
213 This command selects a device register (throug 211 This command selects a device register (through the Comm byte), sends
214 1 to 31 bytes of data to it, and reads 1 to 31 212 1 to 31 bytes of data to it, and reads 1 to 31 bytes of data in return::
215 213
216 S Addr Wr [A] Comm [A] Count [A] Data [A] .. 214 S Addr Wr [A] Comm [A] Count [A] Data [A] ...
217 Sr Addr Rd [A] [ !! 215 S Addr Rd [A] [Count] A [Data] ... A P
218 216
219 Functionality flag: I2C_FUNC_SMBUS_BLOCK_PROC_ 217 Functionality flag: I2C_FUNC_SMBUS_BLOCK_PROC_CALL
220 218
221 219
222 SMBus Host Notify 220 SMBus Host Notify
223 ================= 221 =================
224 222
225 This command is sent from a SMBus device actin 223 This command is sent from a SMBus device acting as a master to the
226 SMBus host acting as a slave. 224 SMBus host acting as a slave.
227 It is the same form as Write Word, with the co 225 It is the same form as Write Word, with the command code replaced by the
228 alerting device's address. 226 alerting device's address.
229 227
230 :: 228 ::
231 229
232 [S] [HostAddr] [Wr] A [DevAddr] A [DataLow] 230 [S] [HostAddr] [Wr] A [DevAddr] A [DataLow] A [DataHigh] A [P]
233 231
234 This is implemented in the following way in th 232 This is implemented in the following way in the Linux kernel:
235 233
236 * I2C bus drivers which support SMBus Host Not 234 * I2C bus drivers which support SMBus Host Notify should report
237 I2C_FUNC_SMBUS_HOST_NOTIFY. 235 I2C_FUNC_SMBUS_HOST_NOTIFY.
238 * I2C bus drivers trigger SMBus Host Notify by 236 * I2C bus drivers trigger SMBus Host Notify by a call to
239 i2c_handle_smbus_host_notify(). 237 i2c_handle_smbus_host_notify().
240 * I2C drivers for devices which can trigger SM 238 * I2C drivers for devices which can trigger SMBus Host Notify will have
241 client->irq assigned to a Host Notify IRQ if !! 239 client->irq assigned to a Host Notify IRQ if noone else specified an other.
242 240
243 There is currently no way to retrieve the data 241 There is currently no way to retrieve the data parameter from the client.
244 242
245 243
246 Packet Error Checking (PEC) 244 Packet Error Checking (PEC)
247 =========================== 245 ===========================
248 246
249 Packet Error Checking was introduced in Revisi 247 Packet Error Checking was introduced in Revision 1.1 of the specification.
250 248
251 PEC adds a CRC-8 error-checking byte to transf 249 PEC adds a CRC-8 error-checking byte to transfers using it, immediately
252 before the terminating STOP. 250 before the terminating STOP.
253 251
254 252
255 Address Resolution Protocol (ARP) 253 Address Resolution Protocol (ARP)
256 ================================= 254 =================================
257 255
258 The Address Resolution Protocol was introduced 256 The Address Resolution Protocol was introduced in Revision 2.0 of
259 the specification. It is a higher-layer protoc 257 the specification. It is a higher-layer protocol which uses the
260 messages above. 258 messages above.
261 259
262 ARP adds device enumeration and dynamic addres 260 ARP adds device enumeration and dynamic address assignment to
263 the protocol. All ARP communications use slave 261 the protocol. All ARP communications use slave address 0x61 and
264 require PEC checksums. 262 require PEC checksums.
265 263
266 264
267 SMBus Alert 265 SMBus Alert
268 =========== 266 ===========
269 267
270 SMBus Alert was introduced in Revision 1.0 of 268 SMBus Alert was introduced in Revision 1.0 of the specification.
271 269
272 The SMBus alert protocol allows several SMBus 270 The SMBus alert protocol allows several SMBus slave devices to share a
273 single interrupt pin on the SMBus master, whil 271 single interrupt pin on the SMBus master, while still allowing the master
274 to know which slave triggered the interrupt. 272 to know which slave triggered the interrupt.
275 273
276 This is implemented the following way in the L 274 This is implemented the following way in the Linux kernel:
277 275
278 * I2C bus drivers which support SMBus alert sh 276 * I2C bus drivers which support SMBus alert should call
279 i2c_new_smbus_alert_device() to install SMBu 277 i2c_new_smbus_alert_device() to install SMBus alert support.
280 * I2C drivers for devices which can trigger SM 278 * I2C drivers for devices which can trigger SMBus alerts should implement
281 the optional alert() callback. 279 the optional alert() callback.
282 280
283 281
284 I2C Block Transactions 282 I2C Block Transactions
285 ====================== 283 ======================
286 284
287 The following I2C block transactions are simil 285 The following I2C block transactions are similar to the SMBus Block Read
288 and Write operations, except these do not have 286 and Write operations, except these do not have a Count byte. They are
289 supported by the SMBus layer and are described 287 supported by the SMBus layer and are described here for completeness, but
290 they are *NOT* defined by the SMBus specificat 288 they are *NOT* defined by the SMBus specification.
291 289
292 I2C block transactions do not limit the number 290 I2C block transactions do not limit the number of bytes transferred
293 but the SMBus layer places a limit of 32 bytes 291 but the SMBus layer places a limit of 32 bytes.
294 292
295 293
296 I2C Block Read 294 I2C Block Read
297 ============== 295 ==============
298 296
299 Implemented by i2c_smbus_read_i2c_block_data() 297 Implemented by i2c_smbus_read_i2c_block_data()
300 298
301 This command reads a block of bytes from a dev 299 This command reads a block of bytes from a device, from a
302 designated register that is specified through 300 designated register that is specified through the Comm byte::
303 301
304 S Addr Wr [A] Comm [A] 302 S Addr Wr [A] Comm [A]
305 Sr Addr Rd [A] [Data] A [Data] A . !! 303 S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
306 304
307 Functionality flag: I2C_FUNC_SMBUS_READ_I2C_BL 305 Functionality flag: I2C_FUNC_SMBUS_READ_I2C_BLOCK
308 306
309 307
310 I2C Block Write 308 I2C Block Write
311 =============== 309 ===============
312 310
313 Implemented by i2c_smbus_write_i2c_block_data( 311 Implemented by i2c_smbus_write_i2c_block_data()
314 312
315 The opposite of the Block Read command, this w 313 The opposite of the Block Read command, this writes bytes to
316 a device, to a designated register that is spe 314 a device, to a designated register that is specified through the
317 Comm byte. Note that command lengths of 0, 2, 315 Comm byte. Note that command lengths of 0, 2, or more bytes are
318 supported as they are indistinguishable from d 316 supported as they are indistinguishable from data.
319 317
320 :: 318 ::
321 319
322 S Addr Wr [A] Comm [A] Data [A] Data [A] ... 320 S Addr Wr [A] Comm [A] Data [A] Data [A] ... [A] Data [A] P
323 321
324 Functionality flag: I2C_FUNC_SMBUS_WRITE_I2C_B 322 Functionality flag: I2C_FUNC_SMBUS_WRITE_I2C_BLOCK
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