1 ================== !! 1 ======================
2 The SMBus Protocol !! 2 SMBus Protocol Summary
3 ================== !! 3 ======================
4 4
5 The following is a summary of the SMBus protoc 5 The following is a summary of the SMBus protocol. It applies to
6 all revisions of the protocol (1.0, 1.1, and 2 6 all revisions of the protocol (1.0, 1.1, and 2.0).
7 Certain protocol features which are not suppor 7 Certain protocol features which are not supported by
8 this package are briefly described at the end 8 this package are briefly described at the end of this document.
9 9
10 Some adapters understand only the SMBus (Syste 10 Some adapters understand only the SMBus (System Management Bus) protocol,
11 which is a subset from the I2C protocol. Fortu 11 which is a subset from the I2C protocol. Fortunately, many devices use
12 only the same subset, which makes it possible 12 only the same subset, which makes it possible to put them on an SMBus.
13 13
14 If you write a driver for some I2C device, ple 14 If you write a driver for some I2C device, please try to use the SMBus
15 commands if at all possible (if the device use 15 commands if at all possible (if the device uses only that subset of the
16 I2C protocol). This makes it possible to use t 16 I2C protocol). This makes it possible to use the device driver on both
17 SMBus adapters and I2C adapters (the SMBus com 17 SMBus adapters and I2C adapters (the SMBus command set is automatically
18 translated to I2C on I2C adapters, but plain I 18 translated to I2C on I2C adapters, but plain I2C commands can not be
19 handled at all on most pure SMBus adapters). 19 handled at all on most pure SMBus adapters).
20 20
21 Below is a list of SMBus protocol operations, 21 Below is a list of SMBus protocol operations, and the functions executing
22 them. Note that the names used in the SMBus p 22 them. Note that the names used in the SMBus protocol specifications usually
23 don't match these function names. For some of 23 don't match these function names. For some of the operations which pass a
24 single data byte, the functions using SMBus pr 24 single data byte, the functions using SMBus protocol operation names execute
25 a different protocol operation entirely. 25 a different protocol operation entirely.
26 26
27 Each transaction type corresponds to a functio 27 Each transaction type corresponds to a functionality flag. Before calling a
28 transaction function, a device driver should a 28 transaction function, a device driver should always check (just once) for
29 the corresponding functionality flag to ensure 29 the corresponding functionality flag to ensure that the underlying I2C
30 adapter supports the transaction in question. 30 adapter supports the transaction in question. See
31 Documentation/i2c/functionality.rst for the de !! 31 <file:Documentation/i2c/functionality.rst> for the details.
32 32
33 33
34 Key to symbols 34 Key to symbols
35 ============== 35 ==============
36 36
37 =============== ============================== 37 =============== =============================================================
38 S Start condition !! 38 S (1 bit) : Start bit
39 Sr Repeated start condition, used !! 39 P (1 bit) : Stop bit
40 read mode. !! 40 Rd/Wr (1 bit) : Read/Write bit. Rd equals 1, Wr equals 0.
41 P Stop condition !! 41 A, NA (1 bit) : Accept and reverse accept bit.
42 Rd/Wr (1 bit) Read/Write bit. Rd equals 1, W !! 42 Addr (7 bits): I2C 7 bit address. Note that this can be expanded as usual to
43 A, NA (1 bit) Acknowledge (ACK) and Not Ackn <<
44 Addr (7 bits) I2C 7 bit address. Note that t <<
45 get a 10 bit I2C address. 43 get a 10 bit I2C address.
46 Comm (8 bits) Command byte, a data byte whic !! 44 Comm (8 bits): Command byte, a data byte which often selects a register on
47 the device. 45 the device.
48 Data (8 bits) A plain data byte. DataLow and !! 46 Data (8 bits): A plain data byte. Sometimes, I write DataLow, DataHigh
49 high byte of a 16 bit word. !! 47 for 16 bit data.
50 Count (8 bits) A data byte containing the len !! 48 Count (8 bits): A data byte containing the length of a block operation.
51 49
52 [..] Data sent by I2C device, as op !! 50 [..]: Data sent by I2C device, as opposed to data sent by the host
53 adapter. 51 adapter.
54 =============== ============================== 52 =============== =============================================================
55 53
56 54
57 SMBus Quick Command 55 SMBus Quick Command
58 =================== 56 ===================
59 57
60 This sends a single bit to the device, at the 58 This sends a single bit to the device, at the place of the Rd/Wr bit::
61 59
62 S Addr Rd/Wr [A] P !! 60 A Addr Rd/Wr [A] P
63 61
64 Functionality flag: I2C_FUNC_SMBUS_QUICK 62 Functionality flag: I2C_FUNC_SMBUS_QUICK
65 63
66 64
67 SMBus Receive Byte !! 65 SMBus Receive Byte: i2c_smbus_read_byte()
68 ================== !! 66 ==========================================
69 <<
70 Implemented by i2c_smbus_read_byte() <<
71 67
72 This reads a single byte from a device, withou 68 This reads a single byte from a device, without specifying a device
73 register. Some devices are so simple that this 69 register. Some devices are so simple that this interface is enough; for
74 others, it is a shorthand if you want to read 70 others, it is a shorthand if you want to read the same register as in
75 the previous SMBus command:: 71 the previous SMBus command::
76 72
77 S Addr Rd [A] [Data] NA P 73 S Addr Rd [A] [Data] NA P
78 74
79 Functionality flag: I2C_FUNC_SMBUS_READ_BYTE 75 Functionality flag: I2C_FUNC_SMBUS_READ_BYTE
80 76
81 77
82 SMBus Send Byte !! 78 SMBus Send Byte: i2c_smbus_write_byte()
83 =============== !! 79 ========================================
84 <<
85 Implemented by i2c_smbus_write_byte() <<
86 80
87 This operation is the reverse of Receive Byte: 81 This operation is the reverse of Receive Byte: it sends a single byte
88 to a device. See Receive Byte for more inform 82 to a device. See Receive Byte for more information.
89 83
90 :: 84 ::
91 85
92 S Addr Wr [A] Data [A] P 86 S Addr Wr [A] Data [A] P
93 87
94 Functionality flag: I2C_FUNC_SMBUS_WRITE_BYTE 88 Functionality flag: I2C_FUNC_SMBUS_WRITE_BYTE
95 89
96 90
97 SMBus Read Byte !! 91 SMBus Read Byte: i2c_smbus_read_byte_data()
98 =============== !! 92 ============================================
99 <<
100 Implemented by i2c_smbus_read_byte_data() <<
101 93
102 This reads a single byte from a device, from a 94 This reads a single byte from a device, from a designated register.
103 The register is specified through the Comm byt 95 The register is specified through the Comm byte::
104 96
105 S Addr Wr [A] Comm [A] Sr Addr Rd [A] [Data] !! 97 S Addr Wr [A] Comm [A] S Addr Rd [A] [Data] NA P
106 98
107 Functionality flag: I2C_FUNC_SMBUS_READ_BYTE_D 99 Functionality flag: I2C_FUNC_SMBUS_READ_BYTE_DATA
108 100
109 101
110 SMBus Read Word !! 102 SMBus Read Word: i2c_smbus_read_word_data()
111 =============== !! 103 ============================================
112 <<
113 Implemented by i2c_smbus_read_word_data() <<
114 104
115 This operation is very like Read Byte; again, 105 This operation is very like Read Byte; again, data is read from a
116 device, from a designated register that is spe 106 device, from a designated register that is specified through the Comm
117 byte. But this time, the data is a complete wo 107 byte. But this time, the data is a complete word (16 bits)::
118 108
119 S Addr Wr [A] Comm [A] Sr Addr Rd [A] [DataL !! 109 S Addr Wr [A] Comm [A] S Addr Rd [A] [DataLow] A [DataHigh] NA P
120 110
121 Functionality flag: I2C_FUNC_SMBUS_READ_WORD_D 111 Functionality flag: I2C_FUNC_SMBUS_READ_WORD_DATA
122 112
123 Note the convenience function i2c_smbus_read_w !! 113 Note the convenience function i2c_smbus_read_word_swapped is
124 available for reads where the two data bytes a 114 available for reads where the two data bytes are the other way
125 around (not SMBus compliant, but very popular. 115 around (not SMBus compliant, but very popular.)
126 116
127 117
128 SMBus Write Byte !! 118 SMBus Write Byte: i2c_smbus_write_byte_data()
129 ================ !! 119 ==============================================
130 <<
131 Implemented by i2c_smbus_write_byte_data() <<
132 120
133 This writes a single byte to a device, to a de 121 This writes a single byte to a device, to a designated register. The
134 register is specified through the Comm byte. T 122 register is specified through the Comm byte. This is the opposite of
135 the Read Byte operation. 123 the Read Byte operation.
136 124
137 :: 125 ::
138 126
139 S Addr Wr [A] Comm [A] Data [A] P 127 S Addr Wr [A] Comm [A] Data [A] P
140 128
141 Functionality flag: I2C_FUNC_SMBUS_WRITE_BYTE_ 129 Functionality flag: I2C_FUNC_SMBUS_WRITE_BYTE_DATA
142 130
143 131
144 SMBus Write Word !! 132 SMBus Write Word: i2c_smbus_write_word_data()
145 ================ !! 133 ==============================================
146 <<
147 Implemented by i2c_smbus_write_word_data() <<
148 134
149 This is the opposite of the Read Word operatio 135 This is the opposite of the Read Word operation. 16 bits
150 of data are written to a device, to the design !! 136 of data is written to a device, to the designated register that is
151 specified through the Comm byte:: !! 137 specified through the Comm byte.::
152 138
153 S Addr Wr [A] Comm [A] DataLow [A] DataHigh 139 S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] P
154 140
155 Functionality flag: I2C_FUNC_SMBUS_WRITE_WORD_ 141 Functionality flag: I2C_FUNC_SMBUS_WRITE_WORD_DATA
156 142
157 Note the convenience function i2c_smbus_write_ !! 143 Note the convenience function i2c_smbus_write_word_swapped is
158 available for writes where the two data bytes 144 available for writes where the two data bytes are the other way
159 around (not SMBus compliant, but very popular. 145 around (not SMBus compliant, but very popular.)
160 146
161 147
162 SMBus Process Call !! 148 SMBus Process Call:
163 ================== !! 149 ===================
164 150
165 This command selects a device register (throug 151 This command selects a device register (through the Comm byte), sends
166 16 bits of data to it, and reads 16 bits of da 152 16 bits of data to it, and reads 16 bits of data in return::
167 153
168 S Addr Wr [A] Comm [A] DataLow [A] DataHigh 154 S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A]
169 Sr Addr Rd [A] [ !! 155 S Addr Rd [A] [DataLow] A [DataHigh] NA P
170 156
171 Functionality flag: I2C_FUNC_SMBUS_PROC_CALL 157 Functionality flag: I2C_FUNC_SMBUS_PROC_CALL
172 158
173 159
174 SMBus Block Read !! 160 SMBus Block Read: i2c_smbus_read_block_data()
175 ================ !! 161 ==============================================
176 <<
177 Implemented by i2c_smbus_read_block_data() <<
178 162
179 This command reads a block of up to 32 bytes f 163 This command reads a block of up to 32 bytes from a device, from a
180 designated register that is specified through 164 designated register that is specified through the Comm byte. The amount
181 of data is specified by the device in the Coun 165 of data is specified by the device in the Count byte.
182 166
183 :: 167 ::
184 168
185 S Addr Wr [A] Comm [A] 169 S Addr Wr [A] Comm [A]
186 Sr Addr Rd [A] [Count] A [Data] A !! 170 S Addr Rd [A] [Count] A [Data] A [Data] A ... A [Data] NA P
187 171
188 Functionality flag: I2C_FUNC_SMBUS_READ_BLOCK_ 172 Functionality flag: I2C_FUNC_SMBUS_READ_BLOCK_DATA
189 173
190 174
191 SMBus Block Write !! 175 SMBus Block Write: i2c_smbus_write_block_data()
192 ================= !! 176 ================================================
193 <<
194 Implemented by i2c_smbus_write_block_data() <<
195 177
196 The opposite of the Block Read command, this w 178 The opposite of the Block Read command, this writes up to 32 bytes to
197 a device, to a designated register that is spe 179 a device, to a designated register that is specified through the
198 Comm byte. The amount of data is specified in 180 Comm byte. The amount of data is specified in the Count byte.
199 181
200 :: 182 ::
201 183
202 S Addr Wr [A] Comm [A] Count [A] Data [A] Da 184 S Addr Wr [A] Comm [A] Count [A] Data [A] Data [A] ... [A] Data [A] P
203 185
204 Functionality flag: I2C_FUNC_SMBUS_WRITE_BLOCK 186 Functionality flag: I2C_FUNC_SMBUS_WRITE_BLOCK_DATA
205 187
206 188
207 SMBus Block Write - Block Read Process Call 189 SMBus Block Write - Block Read Process Call
208 =========================================== 190 ===========================================
209 191
210 SMBus Block Write - Block Read Process Call wa 192 SMBus Block Write - Block Read Process Call was introduced in
211 Revision 2.0 of the specification. 193 Revision 2.0 of the specification.
212 194
213 This command selects a device register (throug 195 This command selects a device register (through the Comm byte), sends
214 1 to 31 bytes of data to it, and reads 1 to 31 196 1 to 31 bytes of data to it, and reads 1 to 31 bytes of data in return::
215 197
216 S Addr Wr [A] Comm [A] Count [A] Data [A] .. 198 S Addr Wr [A] Comm [A] Count [A] Data [A] ...
217 Sr Addr Rd [A] [ !! 199 S Addr Rd [A] [Count] A [Data] ... A P
218 200
219 Functionality flag: I2C_FUNC_SMBUS_BLOCK_PROC_ 201 Functionality flag: I2C_FUNC_SMBUS_BLOCK_PROC_CALL
220 202
221 203
222 SMBus Host Notify 204 SMBus Host Notify
223 ================= 205 =================
224 206
225 This command is sent from a SMBus device actin 207 This command is sent from a SMBus device acting as a master to the
226 SMBus host acting as a slave. 208 SMBus host acting as a slave.
227 It is the same form as Write Word, with the co 209 It is the same form as Write Word, with the command code replaced by the
228 alerting device's address. 210 alerting device's address.
229 211
230 :: 212 ::
231 213
232 [S] [HostAddr] [Wr] A [DevAddr] A [DataLow] 214 [S] [HostAddr] [Wr] A [DevAddr] A [DataLow] A [DataHigh] A [P]
233 215
234 This is implemented in the following way in th 216 This is implemented in the following way in the Linux kernel:
235 217
236 * I2C bus drivers which support SMBus Host Not 218 * I2C bus drivers which support SMBus Host Notify should report
237 I2C_FUNC_SMBUS_HOST_NOTIFY. 219 I2C_FUNC_SMBUS_HOST_NOTIFY.
238 * I2C bus drivers trigger SMBus Host Notify by 220 * I2C bus drivers trigger SMBus Host Notify by a call to
239 i2c_handle_smbus_host_notify(). 221 i2c_handle_smbus_host_notify().
240 * I2C drivers for devices which can trigger SM 222 * I2C drivers for devices which can trigger SMBus Host Notify will have
241 client->irq assigned to a Host Notify IRQ if !! 223 client->irq assigned to a Host Notify IRQ if noone else specified an other.
242 224
243 There is currently no way to retrieve the data 225 There is currently no way to retrieve the data parameter from the client.
244 226
245 227
246 Packet Error Checking (PEC) 228 Packet Error Checking (PEC)
247 =========================== 229 ===========================
248 230
249 Packet Error Checking was introduced in Revisi 231 Packet Error Checking was introduced in Revision 1.1 of the specification.
250 232
251 PEC adds a CRC-8 error-checking byte to transf 233 PEC adds a CRC-8 error-checking byte to transfers using it, immediately
252 before the terminating STOP. 234 before the terminating STOP.
253 235
254 236
255 Address Resolution Protocol (ARP) 237 Address Resolution Protocol (ARP)
256 ================================= 238 =================================
257 239
258 The Address Resolution Protocol was introduced 240 The Address Resolution Protocol was introduced in Revision 2.0 of
259 the specification. It is a higher-layer protoc 241 the specification. It is a higher-layer protocol which uses the
260 messages above. 242 messages above.
261 243
262 ARP adds device enumeration and dynamic addres 244 ARP adds device enumeration and dynamic address assignment to
263 the protocol. All ARP communications use slave 245 the protocol. All ARP communications use slave address 0x61 and
264 require PEC checksums. 246 require PEC checksums.
265 247
266 248
267 SMBus Alert 249 SMBus Alert
268 =========== 250 ===========
269 251
270 SMBus Alert was introduced in Revision 1.0 of 252 SMBus Alert was introduced in Revision 1.0 of the specification.
271 253
272 The SMBus alert protocol allows several SMBus 254 The SMBus alert protocol allows several SMBus slave devices to share a
273 single interrupt pin on the SMBus master, whil 255 single interrupt pin on the SMBus master, while still allowing the master
274 to know which slave triggered the interrupt. 256 to know which slave triggered the interrupt.
275 257
276 This is implemented the following way in the L 258 This is implemented the following way in the Linux kernel:
277 259
278 * I2C bus drivers which support SMBus alert sh 260 * I2C bus drivers which support SMBus alert should call
279 i2c_new_smbus_alert_device() to install SMBu !! 261 i2c_setup_smbus_alert() to setup SMBus alert support.
280 * I2C drivers for devices which can trigger SM 262 * I2C drivers for devices which can trigger SMBus alerts should implement
281 the optional alert() callback. 263 the optional alert() callback.
282 264
283 265
284 I2C Block Transactions 266 I2C Block Transactions
285 ====================== 267 ======================
286 268
287 The following I2C block transactions are simil !! 269 The following I2C block transactions are supported by the
288 and Write operations, except these do not have !! 270 SMBus layer and are described here for completeness.
289 supported by the SMBus layer and are described !! 271 They are *NOT* defined by the SMBus specification.
290 they are *NOT* defined by the SMBus specificat <<
291 272
292 I2C block transactions do not limit the number 273 I2C block transactions do not limit the number of bytes transferred
293 but the SMBus layer places a limit of 32 bytes 274 but the SMBus layer places a limit of 32 bytes.
294 275
295 276
296 I2C Block Read !! 277 I2C Block Read: i2c_smbus_read_i2c_block_data()
297 ============== !! 278 ================================================
298 <<
299 Implemented by i2c_smbus_read_i2c_block_data() <<
300 279
301 This command reads a block of bytes from a dev 280 This command reads a block of bytes from a device, from a
302 designated register that is specified through 281 designated register that is specified through the Comm byte::
303 282
304 S Addr Wr [A] Comm [A] 283 S Addr Wr [A] Comm [A]
305 Sr Addr Rd [A] [Data] A [Data] A . !! 284 S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
306 285
307 Functionality flag: I2C_FUNC_SMBUS_READ_I2C_BL 286 Functionality flag: I2C_FUNC_SMBUS_READ_I2C_BLOCK
308 287
309 288
310 I2C Block Write !! 289 I2C Block Write: i2c_smbus_write_i2c_block_data()
311 =============== !! 290 ==================================================
312 <<
313 Implemented by i2c_smbus_write_i2c_block_data( <<
314 291
315 The opposite of the Block Read command, this w 292 The opposite of the Block Read command, this writes bytes to
316 a device, to a designated register that is spe 293 a device, to a designated register that is specified through the
317 Comm byte. Note that command lengths of 0, 2, 294 Comm byte. Note that command lengths of 0, 2, or more bytes are
318 supported as they are indistinguishable from d 295 supported as they are indistinguishable from data.
319 296
320 :: 297 ::
321 298
322 S Addr Wr [A] Comm [A] Data [A] Data [A] ... 299 S Addr Wr [A] Comm [A] Data [A] Data [A] ... [A] Data [A] P
323 300
324 Functionality flag: I2C_FUNC_SMBUS_WRITE_I2C_B 301 Functionality flag: I2C_FUNC_SMBUS_WRITE_I2C_BLOCK
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