1 ================== 1 ==================
2 The SMBus Protocol 2 The SMBus Protocol
3 ================== 3 ==================
4 4
5 The following is a summary of the SMBus protoc 5 The following is a summary of the SMBus protocol. It applies to
6 all revisions of the protocol (1.0, 1.1, and 2 6 all revisions of the protocol (1.0, 1.1, and 2.0).
7 Certain protocol features which are not suppor 7 Certain protocol features which are not supported by
8 this package are briefly described at the end 8 this package are briefly described at the end of this document.
9 9
10 Some adapters understand only the SMBus (Syste 10 Some adapters understand only the SMBus (System Management Bus) protocol,
11 which is a subset from the I2C protocol. Fortu 11 which is a subset from the I2C protocol. Fortunately, many devices use
12 only the same subset, which makes it possible 12 only the same subset, which makes it possible to put them on an SMBus.
13 13
14 If you write a driver for some I2C device, ple 14 If you write a driver for some I2C device, please try to use the SMBus
15 commands if at all possible (if the device use 15 commands if at all possible (if the device uses only that subset of the
16 I2C protocol). This makes it possible to use t 16 I2C protocol). This makes it possible to use the device driver on both
17 SMBus adapters and I2C adapters (the SMBus com 17 SMBus adapters and I2C adapters (the SMBus command set is automatically
18 translated to I2C on I2C adapters, but plain I 18 translated to I2C on I2C adapters, but plain I2C commands can not be
19 handled at all on most pure SMBus adapters). 19 handled at all on most pure SMBus adapters).
20 20
21 Below is a list of SMBus protocol operations, 21 Below is a list of SMBus protocol operations, and the functions executing
22 them. Note that the names used in the SMBus p 22 them. Note that the names used in the SMBus protocol specifications usually
23 don't match these function names. For some of 23 don't match these function names. For some of the operations which pass a
24 single data byte, the functions using SMBus pr 24 single data byte, the functions using SMBus protocol operation names execute
25 a different protocol operation entirely. 25 a different protocol operation entirely.
26 26
27 Each transaction type corresponds to a functio 27 Each transaction type corresponds to a functionality flag. Before calling a
28 transaction function, a device driver should a 28 transaction function, a device driver should always check (just once) for
29 the corresponding functionality flag to ensure 29 the corresponding functionality flag to ensure that the underlying I2C
30 adapter supports the transaction in question. 30 adapter supports the transaction in question. See
31 Documentation/i2c/functionality.rst for the de 31 Documentation/i2c/functionality.rst for the details.
32 32
33 33
34 Key to symbols 34 Key to symbols
35 ============== 35 ==============
36 36
37 =============== ============================== 37 =============== =============================================================
38 S Start condition 38 S Start condition
39 Sr Repeated start condition, used 39 Sr Repeated start condition, used to switch from write to
40 read mode. 40 read mode.
41 P Stop condition 41 P Stop condition
42 Rd/Wr (1 bit) Read/Write bit. Rd equals 1, W 42 Rd/Wr (1 bit) Read/Write bit. Rd equals 1, Wr equals 0.
43 A, NA (1 bit) Acknowledge (ACK) and Not Ackn 43 A, NA (1 bit) Acknowledge (ACK) and Not Acknowledge (NACK) bit
44 Addr (7 bits) I2C 7 bit address. Note that t 44 Addr (7 bits) I2C 7 bit address. Note that this can be expanded to
45 get a 10 bit I2C address. 45 get a 10 bit I2C address.
46 Comm (8 bits) Command byte, a data byte whic 46 Comm (8 bits) Command byte, a data byte which often selects a register on
47 the device. 47 the device.
48 Data (8 bits) A plain data byte. DataLow and 48 Data (8 bits) A plain data byte. DataLow and DataHigh represent the low and
49 high byte of a 16 bit word. 49 high byte of a 16 bit word.
50 Count (8 bits) A data byte containing the len 50 Count (8 bits) A data byte containing the length of a block operation.
51 51
52 [..] Data sent by I2C device, as op 52 [..] Data sent by I2C device, as opposed to data sent by the host
53 adapter. 53 adapter.
54 =============== ============================== 54 =============== =============================================================
55 55
56 56
57 SMBus Quick Command 57 SMBus Quick Command
58 =================== 58 ===================
59 59
60 This sends a single bit to the device, at the 60 This sends a single bit to the device, at the place of the Rd/Wr bit::
61 61
62 S Addr Rd/Wr [A] P 62 S Addr Rd/Wr [A] P
63 63
64 Functionality flag: I2C_FUNC_SMBUS_QUICK 64 Functionality flag: I2C_FUNC_SMBUS_QUICK
65 65
66 66
67 SMBus Receive Byte 67 SMBus Receive Byte
68 ================== 68 ==================
69 69
70 Implemented by i2c_smbus_read_byte() 70 Implemented by i2c_smbus_read_byte()
71 71
72 This reads a single byte from a device, withou 72 This reads a single byte from a device, without specifying a device
73 register. Some devices are so simple that this 73 register. Some devices are so simple that this interface is enough; for
74 others, it is a shorthand if you want to read 74 others, it is a shorthand if you want to read the same register as in
75 the previous SMBus command:: 75 the previous SMBus command::
76 76
77 S Addr Rd [A] [Data] NA P 77 S Addr Rd [A] [Data] NA P
78 78
79 Functionality flag: I2C_FUNC_SMBUS_READ_BYTE 79 Functionality flag: I2C_FUNC_SMBUS_READ_BYTE
80 80
81 81
82 SMBus Send Byte 82 SMBus Send Byte
83 =============== 83 ===============
84 84
85 Implemented by i2c_smbus_write_byte() 85 Implemented by i2c_smbus_write_byte()
86 86
87 This operation is the reverse of Receive Byte: 87 This operation is the reverse of Receive Byte: it sends a single byte
88 to a device. See Receive Byte for more inform 88 to a device. See Receive Byte for more information.
89 89
90 :: 90 ::
91 91
92 S Addr Wr [A] Data [A] P 92 S Addr Wr [A] Data [A] P
93 93
94 Functionality flag: I2C_FUNC_SMBUS_WRITE_BYTE 94 Functionality flag: I2C_FUNC_SMBUS_WRITE_BYTE
95 95
96 96
97 SMBus Read Byte 97 SMBus Read Byte
98 =============== 98 ===============
99 99
100 Implemented by i2c_smbus_read_byte_data() 100 Implemented by i2c_smbus_read_byte_data()
101 101
102 This reads a single byte from a device, from a 102 This reads a single byte from a device, from a designated register.
103 The register is specified through the Comm byt 103 The register is specified through the Comm byte::
104 104
105 S Addr Wr [A] Comm [A] Sr Addr Rd [A] [Data] 105 S Addr Wr [A] Comm [A] Sr Addr Rd [A] [Data] NA P
106 106
107 Functionality flag: I2C_FUNC_SMBUS_READ_BYTE_D 107 Functionality flag: I2C_FUNC_SMBUS_READ_BYTE_DATA
108 108
109 109
110 SMBus Read Word 110 SMBus Read Word
111 =============== 111 ===============
112 112
113 Implemented by i2c_smbus_read_word_data() 113 Implemented by i2c_smbus_read_word_data()
114 114
115 This operation is very like Read Byte; again, 115 This operation is very like Read Byte; again, data is read from a
116 device, from a designated register that is spe 116 device, from a designated register that is specified through the Comm
117 byte. But this time, the data is a complete wo 117 byte. But this time, the data is a complete word (16 bits)::
118 118
119 S Addr Wr [A] Comm [A] Sr Addr Rd [A] [DataL 119 S Addr Wr [A] Comm [A] Sr Addr Rd [A] [DataLow] A [DataHigh] NA P
120 120
121 Functionality flag: I2C_FUNC_SMBUS_READ_WORD_D 121 Functionality flag: I2C_FUNC_SMBUS_READ_WORD_DATA
122 122
123 Note the convenience function i2c_smbus_read_w 123 Note the convenience function i2c_smbus_read_word_swapped() is
124 available for reads where the two data bytes a 124 available for reads where the two data bytes are the other way
125 around (not SMBus compliant, but very popular. 125 around (not SMBus compliant, but very popular.)
126 126
127 127
128 SMBus Write Byte 128 SMBus Write Byte
129 ================ 129 ================
130 130
131 Implemented by i2c_smbus_write_byte_data() 131 Implemented by i2c_smbus_write_byte_data()
132 132
133 This writes a single byte to a device, to a de 133 This writes a single byte to a device, to a designated register. The
134 register is specified through the Comm byte. T 134 register is specified through the Comm byte. This is the opposite of
135 the Read Byte operation. 135 the Read Byte operation.
136 136
137 :: 137 ::
138 138
139 S Addr Wr [A] Comm [A] Data [A] P 139 S Addr Wr [A] Comm [A] Data [A] P
140 140
141 Functionality flag: I2C_FUNC_SMBUS_WRITE_BYTE_ 141 Functionality flag: I2C_FUNC_SMBUS_WRITE_BYTE_DATA
142 142
143 143
144 SMBus Write Word 144 SMBus Write Word
145 ================ 145 ================
146 146
147 Implemented by i2c_smbus_write_word_data() 147 Implemented by i2c_smbus_write_word_data()
148 148
149 This is the opposite of the Read Word operatio 149 This is the opposite of the Read Word operation. 16 bits
150 of data are written to a device, to the design 150 of data are written to a device, to the designated register that is
151 specified through the Comm byte:: 151 specified through the Comm byte::
152 152
153 S Addr Wr [A] Comm [A] DataLow [A] DataHigh 153 S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] P
154 154
155 Functionality flag: I2C_FUNC_SMBUS_WRITE_WORD_ 155 Functionality flag: I2C_FUNC_SMBUS_WRITE_WORD_DATA
156 156
157 Note the convenience function i2c_smbus_write_ 157 Note the convenience function i2c_smbus_write_word_swapped() is
158 available for writes where the two data bytes 158 available for writes where the two data bytes are the other way
159 around (not SMBus compliant, but very popular. 159 around (not SMBus compliant, but very popular.)
160 160
161 161
162 SMBus Process Call 162 SMBus Process Call
163 ================== 163 ==================
164 164
165 This command selects a device register (throug 165 This command selects a device register (through the Comm byte), sends
166 16 bits of data to it, and reads 16 bits of da 166 16 bits of data to it, and reads 16 bits of data in return::
167 167
168 S Addr Wr [A] Comm [A] DataLow [A] DataHigh 168 S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A]
169 Sr Addr Rd [A] [ 169 Sr Addr Rd [A] [DataLow] A [DataHigh] NA P
170 170
171 Functionality flag: I2C_FUNC_SMBUS_PROC_CALL 171 Functionality flag: I2C_FUNC_SMBUS_PROC_CALL
172 172
173 173
174 SMBus Block Read 174 SMBus Block Read
175 ================ 175 ================
176 176
177 Implemented by i2c_smbus_read_block_data() 177 Implemented by i2c_smbus_read_block_data()
178 178
179 This command reads a block of up to 32 bytes f 179 This command reads a block of up to 32 bytes from a device, from a
180 designated register that is specified through 180 designated register that is specified through the Comm byte. The amount
181 of data is specified by the device in the Coun 181 of data is specified by the device in the Count byte.
182 182
183 :: 183 ::
184 184
185 S Addr Wr [A] Comm [A] 185 S Addr Wr [A] Comm [A]
186 Sr Addr Rd [A] [Count] A [Data] A 186 Sr Addr Rd [A] [Count] A [Data] A [Data] A ... A [Data] NA P
187 187
188 Functionality flag: I2C_FUNC_SMBUS_READ_BLOCK_ 188 Functionality flag: I2C_FUNC_SMBUS_READ_BLOCK_DATA
189 189
190 190
191 SMBus Block Write 191 SMBus Block Write
192 ================= 192 =================
193 193
194 Implemented by i2c_smbus_write_block_data() 194 Implemented by i2c_smbus_write_block_data()
195 195
196 The opposite of the Block Read command, this w 196 The opposite of the Block Read command, this writes up to 32 bytes to
197 a device, to a designated register that is spe 197 a device, to a designated register that is specified through the
198 Comm byte. The amount of data is specified in 198 Comm byte. The amount of data is specified in the Count byte.
199 199
200 :: 200 ::
201 201
202 S Addr Wr [A] Comm [A] Count [A] Data [A] Da 202 S Addr Wr [A] Comm [A] Count [A] Data [A] Data [A] ... [A] Data [A] P
203 203
204 Functionality flag: I2C_FUNC_SMBUS_WRITE_BLOCK 204 Functionality flag: I2C_FUNC_SMBUS_WRITE_BLOCK_DATA
205 205
206 206
207 SMBus Block Write - Block Read Process Call 207 SMBus Block Write - Block Read Process Call
208 =========================================== 208 ===========================================
209 209
210 SMBus Block Write - Block Read Process Call wa 210 SMBus Block Write - Block Read Process Call was introduced in
211 Revision 2.0 of the specification. 211 Revision 2.0 of the specification.
212 212
213 This command selects a device register (throug 213 This command selects a device register (through the Comm byte), sends
214 1 to 31 bytes of data to it, and reads 1 to 31 214 1 to 31 bytes of data to it, and reads 1 to 31 bytes of data in return::
215 215
216 S Addr Wr [A] Comm [A] Count [A] Data [A] .. 216 S Addr Wr [A] Comm [A] Count [A] Data [A] ...
217 Sr Addr Rd [A] [ 217 Sr Addr Rd [A] [Count] A [Data] ... A P
218 218
219 Functionality flag: I2C_FUNC_SMBUS_BLOCK_PROC_ 219 Functionality flag: I2C_FUNC_SMBUS_BLOCK_PROC_CALL
220 220
221 221
222 SMBus Host Notify 222 SMBus Host Notify
223 ================= 223 =================
224 224
225 This command is sent from a SMBus device actin 225 This command is sent from a SMBus device acting as a master to the
226 SMBus host acting as a slave. 226 SMBus host acting as a slave.
227 It is the same form as Write Word, with the co 227 It is the same form as Write Word, with the command code replaced by the
228 alerting device's address. 228 alerting device's address.
229 229
230 :: 230 ::
231 231
232 [S] [HostAddr] [Wr] A [DevAddr] A [DataLow] 232 [S] [HostAddr] [Wr] A [DevAddr] A [DataLow] A [DataHigh] A [P]
233 233
234 This is implemented in the following way in th 234 This is implemented in the following way in the Linux kernel:
235 235
236 * I2C bus drivers which support SMBus Host Not 236 * I2C bus drivers which support SMBus Host Notify should report
237 I2C_FUNC_SMBUS_HOST_NOTIFY. 237 I2C_FUNC_SMBUS_HOST_NOTIFY.
238 * I2C bus drivers trigger SMBus Host Notify by 238 * I2C bus drivers trigger SMBus Host Notify by a call to
239 i2c_handle_smbus_host_notify(). 239 i2c_handle_smbus_host_notify().
240 * I2C drivers for devices which can trigger SM 240 * I2C drivers for devices which can trigger SMBus Host Notify will have
241 client->irq assigned to a Host Notify IRQ if 241 client->irq assigned to a Host Notify IRQ if no one else specified another.
242 242
243 There is currently no way to retrieve the data 243 There is currently no way to retrieve the data parameter from the client.
244 244
245 245
246 Packet Error Checking (PEC) 246 Packet Error Checking (PEC)
247 =========================== 247 ===========================
248 248
249 Packet Error Checking was introduced in Revisi 249 Packet Error Checking was introduced in Revision 1.1 of the specification.
250 250
251 PEC adds a CRC-8 error-checking byte to transf 251 PEC adds a CRC-8 error-checking byte to transfers using it, immediately
252 before the terminating STOP. 252 before the terminating STOP.
253 253
254 254
255 Address Resolution Protocol (ARP) 255 Address Resolution Protocol (ARP)
256 ================================= 256 =================================
257 257
258 The Address Resolution Protocol was introduced 258 The Address Resolution Protocol was introduced in Revision 2.0 of
259 the specification. It is a higher-layer protoc 259 the specification. It is a higher-layer protocol which uses the
260 messages above. 260 messages above.
261 261
262 ARP adds device enumeration and dynamic addres 262 ARP adds device enumeration and dynamic address assignment to
263 the protocol. All ARP communications use slave 263 the protocol. All ARP communications use slave address 0x61 and
264 require PEC checksums. 264 require PEC checksums.
265 265
266 266
267 SMBus Alert 267 SMBus Alert
268 =========== 268 ===========
269 269
270 SMBus Alert was introduced in Revision 1.0 of 270 SMBus Alert was introduced in Revision 1.0 of the specification.
271 271
272 The SMBus alert protocol allows several SMBus 272 The SMBus alert protocol allows several SMBus slave devices to share a
273 single interrupt pin on the SMBus master, whil 273 single interrupt pin on the SMBus master, while still allowing the master
274 to know which slave triggered the interrupt. 274 to know which slave triggered the interrupt.
275 275
276 This is implemented the following way in the L 276 This is implemented the following way in the Linux kernel:
277 277
278 * I2C bus drivers which support SMBus alert sh 278 * I2C bus drivers which support SMBus alert should call
279 i2c_new_smbus_alert_device() to install SMBu 279 i2c_new_smbus_alert_device() to install SMBus alert support.
280 * I2C drivers for devices which can trigger SM 280 * I2C drivers for devices which can trigger SMBus alerts should implement
281 the optional alert() callback. 281 the optional alert() callback.
282 282
283 283
284 I2C Block Transactions 284 I2C Block Transactions
285 ====================== 285 ======================
286 286
287 The following I2C block transactions are simil 287 The following I2C block transactions are similar to the SMBus Block Read
288 and Write operations, except these do not have 288 and Write operations, except these do not have a Count byte. They are
289 supported by the SMBus layer and are described 289 supported by the SMBus layer and are described here for completeness, but
290 they are *NOT* defined by the SMBus specificat 290 they are *NOT* defined by the SMBus specification.
291 291
292 I2C block transactions do not limit the number 292 I2C block transactions do not limit the number of bytes transferred
293 but the SMBus layer places a limit of 32 bytes 293 but the SMBus layer places a limit of 32 bytes.
294 294
295 295
296 I2C Block Read 296 I2C Block Read
297 ============== 297 ==============
298 298
299 Implemented by i2c_smbus_read_i2c_block_data() 299 Implemented by i2c_smbus_read_i2c_block_data()
300 300
301 This command reads a block of bytes from a dev 301 This command reads a block of bytes from a device, from a
302 designated register that is specified through 302 designated register that is specified through the Comm byte::
303 303
304 S Addr Wr [A] Comm [A] 304 S Addr Wr [A] Comm [A]
305 Sr Addr Rd [A] [Data] A [Data] A . 305 Sr Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
306 306
307 Functionality flag: I2C_FUNC_SMBUS_READ_I2C_BL 307 Functionality flag: I2C_FUNC_SMBUS_READ_I2C_BLOCK
308 308
309 309
310 I2C Block Write 310 I2C Block Write
311 =============== 311 ===============
312 312
313 Implemented by i2c_smbus_write_i2c_block_data( 313 Implemented by i2c_smbus_write_i2c_block_data()
314 314
315 The opposite of the Block Read command, this w 315 The opposite of the Block Read command, this writes bytes to
316 a device, to a designated register that is spe 316 a device, to a designated register that is specified through the
317 Comm byte. Note that command lengths of 0, 2, 317 Comm byte. Note that command lengths of 0, 2, or more bytes are
318 supported as they are indistinguishable from d 318 supported as they are indistinguishable from data.
319 319
320 :: 320 ::
321 321
322 S Addr Wr [A] Comm [A] Data [A] Data [A] ... 322 S Addr Wr [A] Comm [A] Data [A] Data [A] ... [A] Data [A] P
323 323
324 Functionality flag: I2C_FUNC_SMBUS_WRITE_I2C_B 324 Functionality flag: I2C_FUNC_SMBUS_WRITE_I2C_BLOCK
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.