1 .. SPDX-License-Identifier: GPL-2.0 1 .. SPDX-License-Identifier: GPL-2.0 2 2 3 ============================================== 3 =========================================================================== 4 Driver for Synopsys DesignWare PCIe traffic ge 4 Driver for Synopsys DesignWare PCIe traffic generator (also known as xData) 5 ============================================== 5 =========================================================================== 6 6 7 Supported chips: 7 Supported chips: 8 Synopsys DesignWare PCIe prototype solution 8 Synopsys DesignWare PCIe prototype solution 9 9 10 Datasheet: 10 Datasheet: 11 Not freely available 11 Not freely available 12 12 13 Author: 13 Author: 14 Gustavo Pimentel <gustavo.pimentel@synopsys.com 14 Gustavo Pimentel <gustavo.pimentel@synopsys.com> 15 15 16 Description 16 Description 17 ----------- 17 ----------- 18 18 19 This driver should be used as a host-side (Roo 19 This driver should be used as a host-side (Root Complex) driver and Synopsys 20 DesignWare prototype that includes this IP. 20 DesignWare prototype that includes this IP. 21 21 22 The dw-xdata-pcie driver can be used to enable 22 The dw-xdata-pcie driver can be used to enable/disable PCIe traffic 23 generator in either direction (mutual exclusio 23 generator in either direction (mutual exclusion) besides allowing the 24 PCIe link performance analysis. 24 PCIe link performance analysis. 25 25 26 The interaction with this driver is done throu 26 The interaction with this driver is done through the module parameter and 27 can be changed in runtime. The driver outputs 27 can be changed in runtime. The driver outputs the requested command state 28 information to ``/var/log/kern.log`` or dmesg. 28 information to ``/var/log/kern.log`` or dmesg. 29 29 30 Example 30 Example 31 ------- 31 ------- 32 32 33 Write TLPs traffic generation - Root Complex t 33 Write TLPs traffic generation - Root Complex to Endpoint direction 34 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 34 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 35 35 36 Generate traffic:: 36 Generate traffic:: 37 37 38 # echo 1 > /sys/class/misc/dw-xdata-pcie.0/wr 38 # echo 1 > /sys/class/misc/dw-xdata-pcie.0/write 39 39 40 Get link throughput in MB/s:: 40 Get link throughput in MB/s:: 41 41 42 # cat /sys/class/misc/dw-xdata-pcie.0/write 42 # cat /sys/class/misc/dw-xdata-pcie.0/write 43 204 43 204 44 44 45 Stop traffic in any direction:: 45 Stop traffic in any direction:: 46 46 47 # echo 0 > /sys/class/misc/dw-xdata-pcie.0/wr 47 # echo 0 > /sys/class/misc/dw-xdata-pcie.0/write 48 48 49 Read TLPs traffic generation - Endpoint to Roo 49 Read TLPs traffic generation - Endpoint to Root Complex direction 50 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 50 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 51 51 52 Generate traffic:: 52 Generate traffic:: 53 53 54 # echo 1 > /sys/class/misc/dw-xdata-pcie.0/re 54 # echo 1 > /sys/class/misc/dw-xdata-pcie.0/read 55 55 56 Get link throughput in MB/s:: 56 Get link throughput in MB/s:: 57 57 58 # cat /sys/class/misc/dw-xdata-pcie.0/read 58 # cat /sys/class/misc/dw-xdata-pcie.0/read 59 199 59 199 60 60 61 Stop traffic in any direction:: 61 Stop traffic in any direction:: 62 62 63 # echo 0 > /sys/class/misc/dw-xdata-pcie.0/re 63 # echo 0 > /sys/class/misc/dw-xdata-pcie.0/read 64 64
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