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Linux/Documentation/misc-devices/oxsemi-tornado.rst

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Diff markup

Differences between /Documentation/misc-devices/oxsemi-tornado.rst (Version linux-6.11.5) and /Documentation/misc-devices/oxsemi-tornado.rst (Version linux-4.20.17)


  1 .. SPDX-License-Identifier: GPL-2.0               
  2                                                   
  3 ==============================================    
  4 Notes on Oxford Semiconductor PCIe (Tornado) 9    
  5 ==============================================    
  6                                                   
  7 Oxford Semiconductor PCIe (Tornado) 950 serial    
  8 by a fixed 62.5MHz clock input derived from th    
  9                                                   
 10 The baud rate produced by the baud generator i    
 11 frequency by dividing it by the clock prescale    
 12 value from 1 to 63.875 in increments of 0.125,    
 13 divisor is used as with the original 8250, to     
 14 value from 1 to 65535.  Finally a programmable    
 15 that can take any value from 4 to 16 to divide    
 16 determine the actual baud rate used.  Baud rat    
 17 to 0.933bps can be obtained this way.             
 18                                                   
 19 By default the oversampling rate is set to 16     
 20 set to 33.875, meaning that the frequency to b    
 21 for the usual 16-bit divisor is 115313.653, wh    
 22 frequency of 115200 used by the original 8250     
 23 used for the divisor to obtain the requested b    
 24 is unaware of the extra clock controls availab    
 25                                                   
 26 The oversampling rate is programmed with the T    
 27 prescaler is programmed with the CPR/CPR2 regi    
 28 [OX954]_ [OX958]_.  To switch away from the de    
 29 the prescaler the enhanced mode has to be expl    
 30 setting bit 4 of the EFR.  In that mode settin    
 31 the prescaler or otherwise it is bypassed as i    
 32 Additionally writing any value to CPR clears C    
 33 old software written for older conventional PC    
 34 devices that do not have the extra prescaler's    
 35 CPR/CPR2 register pair has to be programmed in    
 36                                                   
 37 By using these parameters rates from 15625000b    
 38 obtained, with either exact or highly-accurate    
 39 standard and many non-standard rates.             
 40                                                   
 41 Here are the figures for the standard and some    
 42 (including those quoted in Oxford Semiconducto    
 43 the requested rate (r), the actual rate yielde    
 44 from the requested rate (d), and the values of    
 45 (tcr), the clock prescaler (cpr) and the divis    
 46 new ``get_divisor`` handler:                      
 47                                                   
 48 ::                                                
 49                                                   
 50  r: 15625000, a: 15625000.00, d:  0.0000%, tcr    
 51  r: 12500000, a: 12500000.00, d:  0.0000%, tcr    
 52  r: 10416666, a: 10416666.67, d:  0.0000%, tcr    
 53  r:  8928571, a:  8928571.43, d:  0.0000%, tcr    
 54  r:  7812500, a:  7812500.00, d:  0.0000%, tcr    
 55  r:  4000000, a:  4000000.00, d:  0.0000%, tcr    
 56  r:  3686400, a:  3676470.59, d: -0.2694%, tcr    
 57  r:  3500000, a:  3496503.50, d: -0.0999%, tcr    
 58  r:  3000000, a:  2976190.48, d: -0.7937%, tcr    
 59  r:  2500000, a:  2500000.00, d:  0.0000%, tcr    
 60  r:  2000000, a:  2000000.00, d:  0.0000%, tcr    
 61  r:  1843200, a:  1838235.29, d: -0.2694%, tcr    
 62  r:  1500000, a:  1492537.31, d: -0.4975%, tcr    
 63  r:  1152000, a:  1152073.73, d:  0.0064%, tcr    
 64  r:   921600, a:   919117.65, d: -0.2694%, tcr    
 65  r:   576000, a:   576036.87, d:  0.0064%, tcr    
 66  r:   460800, a:   460829.49, d:  0.0064%, tcr    
 67  r:   230400, a:   230414.75, d:  0.0064%, tcr    
 68  r:   115200, a:   115207.37, d:  0.0064%, tcr    
 69  r:    57600, a:    57603.69, d:  0.0064%, tcr    
 70  r:    38400, a:    38402.46, d:  0.0064%, tcr    
 71  r:    19200, a:    19201.23, d:  0.0064%, tcr    
 72  r:     9600, a:     9600.06, d:  0.0006%, tcr    
 73  r:     4800, a:     4799.98, d: -0.0004%, tcr    
 74  r:     2400, a:     2400.02, d:  0.0008%, tcr    
 75  r:     1200, a:     1200.00, d:  0.0000%, tcr    
 76  r:      300, a:      300.00, d:  0.0000%, tcr    
 77  r:      200, a:      200.00, d:  0.0000%, tcr    
 78  r:      150, a:      150.00, d:  0.0000%, tcr    
 79  r:      134, a:      134.00, d:  0.0000%, tcr    
 80  r:      110, a:      110.00, d:  0.0000%, tcr    
 81  r:       75, a:       75.00, d:  0.0000%, tcr    
 82  r:       50, a:       50.00, d:  0.0000%, tcr    
 83  r:       25, a:       25.00, d:  0.0000%, tcr    
 84  r:        4, a:        4.00, d:  0.0000%, tcr    
 85  r:        2, a:        2.00, d:  0.0000%, tcr    
 86  r:        1, a:        1.00, d:  0.0000%, tcr    
 87                                                   
 88 With the baud base set to 15625000 and the uns    
 89 limitation imposed by ``serial8250_get_baud_ra    
 90 below 300bps become unavailable in the regular    
 91 200bps requires the baud base to be divided by    
 92 the unsigned 16-bit range.  The historic spd_c    
 93 used by encoding the values for, the prescaler    
 94 and the clock divisor (DLM/DLL) as follows to     
 95 required:                                         
 96                                                   
 97 ::                                                
 98                                                   
 99   31 29 28             20 19   16 15              
100  +-----+-----------------+-------+------------    
101  |0 0 0|    CPR2:CPR     |  TCR  |                
102  +-----+-----------------+-------+------------    
103                                                   
104 Use a value such encoded for the ``custom_divi    
105 ASYNC_SPD_CUST flag set in the ``flags`` field    
106 passed with the TIOCSSERIAL ioctl(2), such as     
107 utility and its ``divisor`` and ``spd_cust`` p    
108 the baud rate of 38400bps.  Note that the valu    
109 oversampling rate to 16 and prescaler values b    
110 clamped by the driver to 1.                       
111                                                   
112 For example the value of 0x1f4004e2 will set C    
113 respectively to 0x1f4, 0x0 and 0x04e2, choosin    
114 the oversampling rate and the clock divisor of    
115 respectively.  These parameters will set the b    
116 port to 62500000 / 62.500 / 1250 / 16 = 50bps.    
117                                                   
118 Maciej W. Rozycki  <macro@orcam.me.uk>             
119                                                   
120 .. [OX200] "OXPCIe200 PCI Express Multi-Port B    
121    Inc., DS-0045, 10 Nov 2008, Section "950 Mo    
122                                                   
123 .. [OX952] "OXPCIe952 PCI Express Bridge to Du    
124    Oxford Semiconductor, Inc., DS-0046, Mar 06    
125    p. 20                                          
126                                                   
127 .. [OX954] "OXPCIe954 PCI Express Bridge to Qu    
128    Semiconductor, Inc., DS-0047, Feb 08, Secti    
129                                                   
130 .. [OX958] "OXPCIe958 PCI Express Bridge to Oc    
131    Semiconductor, Inc., DS-0048, Feb 08, Secti    
                                                      

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