~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~

TOMOYO Linux Cross Reference
Linux/Documentation/networking/pse-pd/pse-pi.rst

Version: ~ [ linux-6.12-rc7 ] ~ [ linux-6.11.7 ] ~ [ linux-6.10.14 ] ~ [ linux-6.9.12 ] ~ [ linux-6.8.12 ] ~ [ linux-6.7.12 ] ~ [ linux-6.6.60 ] ~ [ linux-6.5.13 ] ~ [ linux-6.4.16 ] ~ [ linux-6.3.13 ] ~ [ linux-6.2.16 ] ~ [ linux-6.1.116 ] ~ [ linux-6.0.19 ] ~ [ linux-5.19.17 ] ~ [ linux-5.18.19 ] ~ [ linux-5.17.15 ] ~ [ linux-5.16.20 ] ~ [ linux-5.15.171 ] ~ [ linux-5.14.21 ] ~ [ linux-5.13.19 ] ~ [ linux-5.12.19 ] ~ [ linux-5.11.22 ] ~ [ linux-5.10.229 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.285 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.323 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.336 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.337 ] ~ [ linux-4.4.302 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.12 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

Diff markup

Differences between /Documentation/networking/pse-pd/pse-pi.rst (Architecture m68k) and /Documentation/networking/pse-pd/pse-pi.rst (Architecture ppc)


  1 .. SPDX-License-Identifier: GPL-2.0                 1 .. SPDX-License-Identifier: GPL-2.0
  2                                                     2 
  3 PSE Power Interface (PSE PI) Documentation          3 PSE Power Interface (PSE PI) Documentation
  4 ==========================================          4 ==========================================
  5                                                     5 
  6 The Power Sourcing Equipment Power Interface (      6 The Power Sourcing Equipment Power Interface (PSE PI) plays a pivotal role in
  7 the architecture of Power over Ethernet (PoE)       7 the architecture of Power over Ethernet (PoE) systems. It is essentially a
  8 blueprint that outlines how one or multiple po      8 blueprint that outlines how one or multiple power sources are connected to the
  9 eight-pin modular jack, commonly known as the       9 eight-pin modular jack, commonly known as the Ethernet RJ45 port. This
 10 connection scheme is crucial for enabling the      10 connection scheme is crucial for enabling the delivery of power alongside data
 11 over Ethernet cables.                              11 over Ethernet cables.
 12                                                    12 
 13 Documentation and Standards                        13 Documentation and Standards
 14 ---------------------------                        14 ---------------------------
 15                                                    15 
 16 The IEEE 802.3 standard provides detailed docu     16 The IEEE 802.3 standard provides detailed documentation on the PSE PI.
 17 Specifically:                                      17 Specifically:
 18                                                    18 
 19 - Section "33.2.3 PI pin assignments" covers t     19 - Section "33.2.3 PI pin assignments" covers the pin assignments for PoE
 20   systems that utilize two pairs for power del     20   systems that utilize two pairs for power delivery.
 21 - Section "145.2.4 PSE PI" addresses the confi     21 - Section "145.2.4 PSE PI" addresses the configuration for PoE systems that
 22   deliver power over all four pairs of an Ethe     22   deliver power over all four pairs of an Ethernet cable.
 23                                                    23 
 24 PSE PI and Single Pair Ethernet                    24 PSE PI and Single Pair Ethernet
 25 -------------------------------                    25 -------------------------------
 26                                                    26 
 27 Single Pair Ethernet (SPE) represents a differ     27 Single Pair Ethernet (SPE) represents a different approach to Ethernet
 28 connectivity, utilizing just one pair of condu     28 connectivity, utilizing just one pair of conductors for both data and power
 29 transmission. Unlike the configurations detail     29 transmission. Unlike the configurations detailed in the PSE PI for standard
 30 Ethernet, which can involve multiple power sou     30 Ethernet, which can involve multiple power sourcing arrangements across four or
 31 two pairs of wires, SPE operates on a simpler      31 two pairs of wires, SPE operates on a simpler model due to its single-pair
 32 design. As a result, the complexities of choos     32 design. As a result, the complexities of choosing between alternative pin
 33 assignments for power delivery, as described i     33 assignments for power delivery, as described in the PSE PI for multi-pair
 34 Ethernet, are not applicable to SPE.               34 Ethernet, are not applicable to SPE.
 35                                                    35 
 36 Understanding PSE PI                               36 Understanding PSE PI
 37 --------------------                               37 --------------------
 38                                                    38 
 39 The Power Sourcing Equipment Power Interface (     39 The Power Sourcing Equipment Power Interface (PSE PI) is a framework defining
 40 how Power Sourcing Equipment (PSE) delivers po     40 how Power Sourcing Equipment (PSE) delivers power to Powered Devices (PDs) over
 41 Ethernet cables. It details two main configura     41 Ethernet cables. It details two main configurations for power delivery, known
 42 as Alternative A and Alternative B, which are      42 as Alternative A and Alternative B, which are distinguished not only by their
 43 method of power transmission but also by the i     43 method of power transmission but also by the implications for polarity and data
 44 transmission direction.                            44 transmission direction.
 45                                                    45 
 46 Alternative A and B Overview                       46 Alternative A and B Overview
 47 ----------------------------                       47 ----------------------------
 48                                                    48 
 49 - **Alternative A:** Utilizes RJ45 conductors      49 - **Alternative A:** Utilizes RJ45 conductors 1, 2, 3 and 6. In either case of
 50   networks 10/100BaseT or 1G/2G/5G/10GBaseT, t     50   networks 10/100BaseT or 1G/2G/5G/10GBaseT, the pairs used are carrying data.
 51   The power delivery's polarity in this altern     51   The power delivery's polarity in this alternative can vary based on the MDI
 52   (Medium Dependent Interface) or MDI-X (Mediu     52   (Medium Dependent Interface) or MDI-X (Medium Dependent Interface Crossover)
 53   configuration.                                   53   configuration.
 54                                                    54 
 55 - **Alternative B:** Utilizes RJ45 conductors      55 - **Alternative B:** Utilizes RJ45 conductors 4, 5, 7 and 8. In case of
 56   10/100BaseT network the pairs used are spare     56   10/100BaseT network the pairs used are spare pairs without data and are less
 57   influenced by data transmission direction. T     57   influenced by data transmission direction. This is not the case for
 58   1G/2G/5G/10GBaseT network. Alternative B inc     58   1G/2G/5G/10GBaseT network. Alternative B includes two configurations with
 59   different polarities, known as variant X and     59   different polarities, known as variant X and variant S, to accommodate
 60   different network requirements and device sp     60   different network requirements and device specifications.
 61                                                    61 
 62 Table 145-3 PSE Pinout Alternatives                62 Table 145-3 PSE Pinout Alternatives
 63 -----------------------------------                63 -----------------------------------
 64                                                    64 
 65 The following table outlines the pin configura     65 The following table outlines the pin configurations for both Alternative A and
 66 Alternative B.                                     66 Alternative B.
 67                                                    67 
 68 +------------+-------------------+------------     68 +------------+-------------------+-----------------+-----------------+-----------------+
 69 | Conductor  | Alternative A     | Alternative     69 | Conductor  | Alternative A     | Alternative A   | Alternative B   | Alternative B   |
 70 |            |    (MDI-X)        |      (MDI)      70 |            |    (MDI-X)        |      (MDI)      |        (X)      |        (S)      |
 71 +============+===================+============     71 +============+===================+=================+=================+=================+
 72 | 1          | Negative V        | Positive V      72 | 1          | Negative V        | Positive V      | -               | -               |
 73 +------------+-------------------+------------     73 +------------+-------------------+-----------------+-----------------+-----------------+
 74 | 2          | Negative V        | Positive V      74 | 2          | Negative V        | Positive V      | -               | -               |
 75 +------------+-------------------+------------     75 +------------+-------------------+-----------------+-----------------+-----------------+
 76 | 3          | Positive V        | Negative V      76 | 3          | Positive V        | Negative V      | -               | -               |
 77 +------------+-------------------+------------     77 +------------+-------------------+-----------------+-----------------+-----------------+
 78 | 4          | -                 | -               78 | 4          | -                 | -               | Negative V      | Positive V      |
 79 +------------+-------------------+------------     79 +------------+-------------------+-----------------+-----------------+-----------------+
 80 | 5          | -                 | -               80 | 5          | -                 | -               | Negative V      | Positive V      |
 81 +------------+-------------------+------------     81 +------------+-------------------+-----------------+-----------------+-----------------+
 82 | 6          | Positive V        | Negative V      82 | 6          | Positive V        | Negative V      | -               | -               |
 83 +------------+-------------------+------------     83 +------------+-------------------+-----------------+-----------------+-----------------+
 84 | 7          | -                 | -               84 | 7          | -                 | -               | Positive V      | Negative V      |
 85 +------------+-------------------+------------     85 +------------+-------------------+-----------------+-----------------+-----------------+
 86 | 8          | -                 | -               86 | 8          | -                 | -               | Positive V      | Negative V      |
 87 +------------+-------------------+------------     87 +------------+-------------------+-----------------+-----------------+-----------------+
 88                                                    88 
 89 .. note::                                          89 .. note::
 90     - "Positive V" and "Negative V" indicate t     90     - "Positive V" and "Negative V" indicate the voltage polarity for each pin.
 91     - "-" indicates that the pin is not used f     91     - "-" indicates that the pin is not used for power delivery in that
 92       specific configuration.                      92       specific configuration.
 93                                                    93 
 94 PSE PI compatibilities                             94 PSE PI compatibilities
 95 ----------------------                             95 ----------------------
 96                                                    96 
 97 The following table outlines the compatibility     97 The following table outlines the compatibility between the pinout alternative
 98 and the 1000/2.5G/5G/10GBaseT in the PSE 2 pai     98 and the 1000/2.5G/5G/10GBaseT in the PSE 2 pairs connection.
 99                                                    99 
100 +---------+---------------+-------------------    100 +---------+---------------+---------------------+-----------------------+
101 | Variant | Alternative   | Power Feeding Type    101 | Variant | Alternative   | Power Feeding Type  | Compatibility with    |
102 |         | (A/B)         | (Direct/Phantom)      102 |         | (A/B)         | (Direct/Phantom)    | 1000/2.5G/5G/10GBaseT |
103 +=========+===============+===================    103 +=========+===============+=====================+=======================+
104 | 1       | A             | Phantom               104 | 1       | A             | Phantom             | Yes                   |
105 +---------+---------------+-------------------    105 +---------+---------------+---------------------+-----------------------+
106 | 2       | B             | Phantom               106 | 2       | B             | Phantom             | Yes                   |
107 +---------+---------------+-------------------    107 +---------+---------------+---------------------+-----------------------+
108 | 3       | B             | Direct                108 | 3       | B             | Direct              | No                    |
109 +---------+---------------+-------------------    109 +---------+---------------+---------------------+-----------------------+
110                                                   110 
111 .. note::                                         111 .. note::
112     - "Direct" indicate a variant where the po    112     - "Direct" indicate a variant where the power is injected directly to pairs
113        without using magnetics in case of spar    113        without using magnetics in case of spare pairs.
114     - "Phantom" indicate power path over coils    114     - "Phantom" indicate power path over coils/magnetics as it is done for
115        Alternative A variant.                     115        Alternative A variant.
116                                                   116 
117 In case of PSE 4 pairs, a PSE supporting only     117 In case of PSE 4 pairs, a PSE supporting only 10/100BaseT (which mean Direct
118 Power on pinout Alternative B) is not compatib    118 Power on pinout Alternative B) is not compatible with a 4 pairs
119 1000/2.5G/5G/10GBaseT.                            119 1000/2.5G/5G/10GBaseT.
120                                                   120 
121 PSE Power Interface (PSE PI) Connection Diagra    121 PSE Power Interface (PSE PI) Connection Diagram
122 ----------------------------------------------    122 -----------------------------------------------
123                                                   123 
124 The diagram below illustrates the connection a    124 The diagram below illustrates the connection architecture between the RJ45
125 port, the Ethernet PHY (Physical Layer), and t    125 port, the Ethernet PHY (Physical Layer), and the PSE PI (Power Sourcing
126 Equipment Power Interface), demonstrating how     126 Equipment Power Interface), demonstrating how power and data are delivered
127 simultaneously through an Ethernet cable. The     127 simultaneously through an Ethernet cable. The RJ45 port serves as the physical
128 interface for these connections, with each of     128 interface for these connections, with each of its eight pins connected to both
129 the Ethernet PHY for data transmission and the    129 the Ethernet PHY for data transmission and the PSE PI for power delivery.
130                                                   130 
131 .. code-block::                                   131 .. code-block::
132                                                   132 
133     +--------------------------+                  133     +--------------------------+
134     |                          |                  134     |                          |
135     |          RJ45 Port       |                  135     |          RJ45 Port       |
136     |                          |                  136     |                          |
137     +--+--+--+--+--+--+--+--+--+                  137     +--+--+--+--+--+--+--+--+--+                +-------------+
138       1| 2| 3| 4| 5| 6| 7| 8|                     138       1| 2| 3| 4| 5| 6| 7| 8|                   |             |
139        |  |  |  |  |  |  |  o-----------------    139        |  |  |  |  |  |  |  o-------------------+             |
140        |  |  |  |  |  |  o--|-----------------    140        |  |  |  |  |  |  o--|-------------------+             +<--- PSE 1
141        |  |  |  |  |  o--|--|-----------------    141        |  |  |  |  |  o--|--|-------------------+             |
142        |  |  |  |  o--|--|--|-----------------    142        |  |  |  |  o--|--|--|-------------------+             |
143        |  |  |  o--|--|--|--|-----------------    143        |  |  |  o--|--|--|--|-------------------+  PSE PI     |
144        |  |  o--|--|--|--|--|-----------------    144        |  |  o--|--|--|--|--|-------------------+             |
145        |  o--|--|--|--|--|--|-----------------    145        |  o--|--|--|--|--|--|-------------------+             +<--- PSE 2 (optional)
146        o--|--|--|--|--|--|--|-----------------    146        o--|--|--|--|--|--|--|-------------------+             |
147        |  |  |  |  |  |  |  |                     147        |  |  |  |  |  |  |  |                   |             |
148     +--+--+--+--+--+--+--+--+--+                  148     +--+--+--+--+--+--+--+--+--+                +-------------+
149     |                          |                  149     |                          |
150     |       Ethernet PHY       |                  150     |       Ethernet PHY       |
151     |                          |                  151     |                          |
152     +--------------------------+                  152     +--------------------------+
153                                                   153 
154 Simple PSE PI Configuration for Alternative A     154 Simple PSE PI Configuration for Alternative A
155 ---------------------------------------------     155 ---------------------------------------------
156                                                   156 
157 The diagram below illustrates a straightforwar    157 The diagram below illustrates a straightforward PSE PI (Power Sourcing
158 Equipment Power Interface) configuration desig    158 Equipment Power Interface) configuration designed to support the Alternative A
159 setup for Power over Ethernet (PoE). This impl    159 setup for Power over Ethernet (PoE). This implementation is tailored to provide
160 power delivery through the data-carrying pairs    160 power delivery through the data-carrying pairs of an Ethernet cable, suitable
161 for either MDI or MDI-X configurations, albeit    161 for either MDI or MDI-X configurations, albeit supporting one variation at a
162 time.                                             162 time.
163                                                   163 
164 .. code-block::                                   164 .. code-block::
165                                                   165 
166          +-------------+                          166          +-------------+
167          |    PSE PI   |                          167          |    PSE PI   |
168  8  -----+                             +------    168  8  -----+                             +-------------+
169  7  -----+                    Rail 1   |          169  7  -----+                    Rail 1   |
170  6  -----+------+----------------------+          170  6  -----+------+----------------------+
171  5  -----+      |                      |          171  5  -----+      |                      |
172  4  -----+      |             Rail 2   |  PSE     172  4  -----+      |             Rail 2   |  PSE 1
173  3  -----+------/         +------------+          173  3  -----+------/         +------------+
174  2  -----+--+-------------/            |          174  2  -----+--+-------------/            |
175  1  -----+--/                          +------    175  1  -----+--/                          +-------------+
176          |                                        176          |
177          +-------------+                          177          +-------------+
178                                                   178 
179 In this configuration:                            179 In this configuration:
180                                                   180 
181 - Pins 1 and 2, as well as pins 3 and 6, are u    181 - Pins 1 and 2, as well as pins 3 and 6, are utilized for power delivery in
182   addition to data transmission. This aligns w    182   addition to data transmission. This aligns with the standard wiring for
183   10/100BaseT Ethernet networks where these pa    183   10/100BaseT Ethernet networks where these pairs are used for data.
184 - Rail 1 and Rail 2 represent the positive and    184 - Rail 1 and Rail 2 represent the positive and negative voltage rails, with
185   Rail 1 connected to pins 1 and 2, and Rail 2    185   Rail 1 connected to pins 1 and 2, and Rail 2 connected to pins 3 and 6.
186   More advanced PSE PI configurations may incl    186   More advanced PSE PI configurations may include integrated or external
187   switches to change the polarity of the volta    187   switches to change the polarity of the voltage rails, allowing for
188   compatibility with both MDI and MDI-X config    188   compatibility with both MDI and MDI-X configurations.
189                                                   189 
190 More complex PSE PI configurations may include    190 More complex PSE PI configurations may include additional components, to support
191 Alternative B, or to provide additional featur    191 Alternative B, or to provide additional features such as power management, or
192 additional power delivery capabilities such as    192 additional power delivery capabilities such as 2-pair or 4-pair power delivery.
193                                                   193 
194 .. code-block::                                   194 .. code-block::
195                                                   195 
196          +-------------+                          196          +-------------+
197          |    PSE PI   |                          197          |    PSE PI   |
198          |        +---+                           198          |        +---+
199  8  -----+--------+   |                 +-----    199  8  -----+--------+   |                 +-------------+
200  7  -----+--------+   |       Rail 1   |          200  7  -----+--------+   |       Rail 1   |
201  6  -----+--------+   +-----------------+         201  6  -----+--------+   +-----------------+
202  5  -----+--------+   |                |          202  5  -----+--------+   |                |
203  4  -----+--------+   |       Rail 2   |  PSE     203  4  -----+--------+   |       Rail 2   |  PSE 1
204  3  -----+--------+   +----------------+          204  3  -----+--------+   +----------------+
205  2  -----+--------+   |                |          205  2  -----+--------+   |                |
206  1  -----+--------+   |                 +-----    206  1  -----+--------+   |                 +-------------+
207          |        +---+                           207          |        +---+
208          +-------------+                          208          +-------------+
209                                                   209 
210 Device Tree Configuration: Describing PSE PI C    210 Device Tree Configuration: Describing PSE PI Configurations
211 ----------------------------------------------    211 -----------------------------------------------------------
212                                                   212 
213 The necessity for a separate PSE PI node in th    213 The necessity for a separate PSE PI node in the device tree is influenced by
214 the intricacy of the Power over Ethernet (PoE)    214 the intricacy of the Power over Ethernet (PoE) system's setup. Here are
215 descriptions of both simple and complex PSE PI    215 descriptions of both simple and complex PSE PI configurations to illustrate
216 this decision-making process:                     216 this decision-making process:
217                                                   217 
218 **Simple PSE PI Configuration:**                  218 **Simple PSE PI Configuration:**
219 In a straightforward scenario, the PSE PI setu    219 In a straightforward scenario, the PSE PI setup involves a direct, one-to-one
220 connection between a single PSE controller and    220 connection between a single PSE controller and an Ethernet port. This setup
221 typically supports basic PoE functionality wit    221 typically supports basic PoE functionality without the need for dynamic
222 configuration or management of multiple power     222 configuration or management of multiple power delivery modes. For such simple
223 configurations, detailing the PSE PI within th    223 configurations, detailing the PSE PI within the existing PSE controller's node
224 may suffice, as the system does not encompass     224 may suffice, as the system does not encompass additional complexity that
225 warrants a separate node. The primary focus he    225 warrants a separate node. The primary focus here is on the clear and direct
226 association of power delivery to a specific Et    226 association of power delivery to a specific Ethernet port.
227                                                   227 
228 **Complex PSE PI Configuration:**                 228 **Complex PSE PI Configuration:**
229 Contrastingly, a complex PSE PI setup may enco    229 Contrastingly, a complex PSE PI setup may encompass multiple PSE controllers or
230 auxiliary circuits that collectively manage po    230 auxiliary circuits that collectively manage power delivery to one Ethernet
231 port. Such configurations might support a rang    231 port. Such configurations might support a range of PoE standards and require
232 the capability to dynamically configure power     232 the capability to dynamically configure power delivery based on the operational
233 mode (e.g., PoE2 versus PoE4) or specific requ    233 mode (e.g., PoE2 versus PoE4) or specific requirements of connected devices. In
234 these instances, a dedicated PSE PI node becom    234 these instances, a dedicated PSE PI node becomes essential for accurately
235 documenting the system architecture. This node    235 documenting the system architecture. This node would serve to detail the
236 interactions between different PSE controllers    236 interactions between different PSE controllers, the support for various PoE
237 modes, and any additional logic required to co    237 modes, and any additional logic required to coordinate power delivery across
238 the network infrastructure.                       238 the network infrastructure.
239                                                   239 
240 **Guidance:**                                     240 **Guidance:**
241                                                   241 
242 For simple PSE setups, including PSE PI inform    242 For simple PSE setups, including PSE PI information in the PSE controller node
243 might suffice due to the straightforward natur    243 might suffice due to the straightforward nature of these systems. However,
244 complex configurations, involving multiple com    244 complex configurations, involving multiple components or advanced PoE features,
245 benefit from a dedicated PSE PI node. This met    245 benefit from a dedicated PSE PI node. This method adheres to IEEE 802.3
246 specifications, improving documentation clarit    246 specifications, improving documentation clarity and ensuring accurate
247 representation of the PoE system's complexity.    247 representation of the PoE system's complexity.
248                                                   248 
249 PSE PI Node: Essential Information                249 PSE PI Node: Essential Information
250 ----------------------------------                250 ----------------------------------
251                                                   251 
252 The PSE PI (Power Sourcing Equipment Power Int    252 The PSE PI (Power Sourcing Equipment Power Interface) node in a device tree can
253 include several key pieces of information crit    253 include several key pieces of information critical for defining the power
254 delivery capabilities and configurations of a     254 delivery capabilities and configurations of a PoE (Power over Ethernet) system.
255 Below is a list of such information, along wit    255 Below is a list of such information, along with explanations for their
256 necessity and reasons why they might not be fo    256 necessity and reasons why they might not be found within a PSE controller node:
257                                                   257 
258 1. **Powered Pairs Configuration**                258 1. **Powered Pairs Configuration**
259                                                   259 
260    - *Description:* Identifies the pairs used     260    - *Description:* Identifies the pairs used for power delivery in the
261      Ethernet cable.                              261      Ethernet cable.
262    - *Necessity:* Essential to ensure the corr    262    - *Necessity:* Essential to ensure the correct pairs are powered according
263      to the board's design.                       263      to the board's design.
264    - *PSE Controller Node:* Typically lacks de    264    - *PSE Controller Node:* Typically lacks details on physical pair usage,
265      focusing on power regulation.                265      focusing on power regulation.
266                                                   266 
267 2. **Polarity of Powered Pairs**                  267 2. **Polarity of Powered Pairs**
268                                                   268 
269    - *Description:* Specifies the polarity (po    269    - *Description:* Specifies the polarity (positive or negative) for each
270      powered pair.                                270      powered pair.
271    - *Necessity:* Critical for safe and effect    271    - *Necessity:* Critical for safe and effective power transmission to PDs.
272    - *PSE Controller Node:* Polarity managemen    272    - *PSE Controller Node:* Polarity management may exceed the standard
273      functionalities of PSE controllers.          273      functionalities of PSE controllers.
274                                                   274 
275 3. **PSE Cells Association**                      275 3. **PSE Cells Association**
276                                                   276 
277    - *Description:* Details the association of    277    - *Description:* Details the association of PSE cells with Ethernet ports or
278      pairs in multi-cell configurations.          278      pairs in multi-cell configurations.
279    - *Necessity:* Allows for optimized power r    279    - *Necessity:* Allows for optimized power resource allocation in complex
280      systems.                                     280      systems.
281    - *PSE Controller Node:* Controllers may no    281    - *PSE Controller Node:* Controllers may not manage cell associations
282      directly, focusing instead on power flow     282      directly, focusing instead on power flow regulation.
283                                                   283 
284 4. **Support for PoE Standards**                  284 4. **Support for PoE Standards**
285                                                   285 
286    - *Description:* Lists the PoE standards an    286    - *Description:* Lists the PoE standards and configurations supported by the
287      system.                                      287      system.
288    - *Necessity:* Ensures system compatibility    288    - *Necessity:* Ensures system compatibility with various PDs and adherence
289      to industry standards.                       289      to industry standards.
290    - *PSE Controller Node:* Specific capabilit    290    - *PSE Controller Node:* Specific capabilities may depend on the overall PSE
291      PI design rather than the controller alon    291      PI design rather than the controller alone. Multiple PSE cells per PI
292      do not necessarily imply support for mult    292      do not necessarily imply support for multiple PoE standards.
293                                                   293 
294 5. **Protection Mechanisms**                      294 5. **Protection Mechanisms**
295                                                   295 
296    - *Description:* Outlines additional protec    296    - *Description:* Outlines additional protection mechanisms, such as
297      overcurrent protection and thermal manage    297      overcurrent protection and thermal management.
298    - *Necessity:* Provides extra safety and st    298    - *Necessity:* Provides extra safety and stability, complementing PSE
299      controller protections.                      299      controller protections.
300    - *PSE Controller Node:* Some protections m    300    - *PSE Controller Node:* Some protections may be implemented via
301      board-specific hardware or algorithms ext    301      board-specific hardware or algorithms external to the controller.
                                                      

~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~

kernel.org | git.kernel.org | LWN.net | Project Home | SVN repository | Mail admin

Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.

sflogo.php