1 .. SPDX-License-Identifier: GPL-2.0 1 .. SPDX-License-Identifier: GPL-2.0
2 2
3 ========================= 3 =========================
4 TPM FIFO interface driver 4 TPM FIFO interface driver
5 ========================= 5 =========================
6 6
7 TCG PTP Specification defines two interface ty 7 TCG PTP Specification defines two interface types: FIFO and CRB. The former is
8 based on sequenced read and write operations, 8 based on sequenced read and write operations, and the latter is based on a
9 buffer containing the full command or response 9 buffer containing the full command or response.
10 10
11 FIFO (First-In-First-Out) interface is used by 11 FIFO (First-In-First-Out) interface is used by the tpm_tis_core dependent
12 drivers. Originally Linux had only a driver ca 12 drivers. Originally Linux had only a driver called tpm_tis, which covered
13 memory mapped (aka MMIO) interface but it was 13 memory mapped (aka MMIO) interface but it was later on extended to cover other
14 physical interfaces supported by the TCG stand 14 physical interfaces supported by the TCG standard.
15 15
16 For historical reasons above the original MMIO 16 For historical reasons above the original MMIO driver is called tpm_tis and the
17 framework for FIFO drivers is named as tpm_tis 17 framework for FIFO drivers is named as tpm_tis_core. The postfix "tis" in
18 tpm_tis comes from the TPM Interface Specifica 18 tpm_tis comes from the TPM Interface Specification, which is the hardware
19 interface specification for TPM 1.x chips. 19 interface specification for TPM 1.x chips.
20 20
21 Communication is based on a 20 KiB buffer shar 21 Communication is based on a 20 KiB buffer shared by the TPM chip through a
22 hardware bus or memory map, depending on the p 22 hardware bus or memory map, depending on the physical wiring. The buffer is
23 further split into five equal-size 4 KiB buffe 23 further split into five equal-size 4 KiB buffers, which provide equivalent
24 sets of registers for communication between th 24 sets of registers for communication between the CPU and TPM. These
25 communication endpoints are called localities 25 communication endpoints are called localities in the TCG terminology.
26 26
27 When the kernel wants to send commands to the 27 When the kernel wants to send commands to the TPM chip, it first reserves
28 locality 0 by setting the requestUse bit in th 28 locality 0 by setting the requestUse bit in the TPM_ACCESS register. The bit is
29 cleared by the chip when the access is granted 29 cleared by the chip when the access is granted. Once it completes its
30 communication, the kernel writes the TPM_ACCES 30 communication, the kernel writes the TPM_ACCESS.activeLocality bit. This
31 informs the chip that the locality has been re 31 informs the chip that the locality has been relinquished.
32 32
33 Pending localities are served in order by the 33 Pending localities are served in order by the chip in descending order, one at
34 a time: 34 a time:
35 35
36 - Locality 0 has the lowest priority. 36 - Locality 0 has the lowest priority.
37 - Locality 5 has the highest priority. 37 - Locality 5 has the highest priority.
38 38
39 Further information on the purpose and meaning 39 Further information on the purpose and meaning of the localities can be found
40 in section 3.2 of the TCG PC Client Platform T 40 in section 3.2 of the TCG PC Client Platform TPM Profile Specification.
41 41
42 References 42 References
43 ========== 43 ==========
44 44
45 TCG PC Client Platform TPM Profile (PTP) Speci 45 TCG PC Client Platform TPM Profile (PTP) Specification
46 https://trustedcomputinggroup.org/resource/pc- 46 https://trustedcomputinggroup.org/resource/pc-client-platform-tpm-profile-ptp-specification/
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