~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~

TOMOYO Linux Cross Reference
Linux/Documentation/sound/hd-audio/realtek-pc-beep.rst

Version: ~ [ linux-6.12-rc7 ] ~ [ linux-6.11.7 ] ~ [ linux-6.10.14 ] ~ [ linux-6.9.12 ] ~ [ linux-6.8.12 ] ~ [ linux-6.7.12 ] ~ [ linux-6.6.60 ] ~ [ linux-6.5.13 ] ~ [ linux-6.4.16 ] ~ [ linux-6.3.13 ] ~ [ linux-6.2.16 ] ~ [ linux-6.1.116 ] ~ [ linux-6.0.19 ] ~ [ linux-5.19.17 ] ~ [ linux-5.18.19 ] ~ [ linux-5.17.15 ] ~ [ linux-5.16.20 ] ~ [ linux-5.15.171 ] ~ [ linux-5.14.21 ] ~ [ linux-5.13.19 ] ~ [ linux-5.12.19 ] ~ [ linux-5.11.22 ] ~ [ linux-5.10.229 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.285 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.323 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.336 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.337 ] ~ [ linux-4.4.302 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.12 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

Diff markup

Differences between /Documentation/sound/hd-audio/realtek-pc-beep.rst (Version linux-6.12-rc7) and /Documentation/sound/hd-audio/realtek-pc-beep.rst (Version linux-5.19.17)


  1 ===============================                     1 ===============================
  2 Realtek PC Beep Hidden Register                     2 Realtek PC Beep Hidden Register
  3 ===============================                     3 ===============================
  4                                                     4 
  5 This file documents the "PC Beep Hidden Regist      5 This file documents the "PC Beep Hidden Register", which is present in certain
  6 Realtek HDA codecs and controls a muxer and pa      6 Realtek HDA codecs and controls a muxer and pair of passthrough mixers that can
  7 route audio between pins but aren't themselves      7 route audio between pins but aren't themselves exposed as HDA widgets. As far
  8 as I can tell, these hidden routes are designe      8 as I can tell, these hidden routes are designed to allow flexible PC Beep output
  9 for codecs that don't have mixer widgets in th      9 for codecs that don't have mixer widgets in their output paths. Why it's easier
 10 to hide a mixer behind an undocumented vendor      10 to hide a mixer behind an undocumented vendor register than to just expose it
 11 as a widget, I have no idea.                       11 as a widget, I have no idea.
 12                                                    12 
 13 Register Description                               13 Register Description
 14 ====================                               14 ====================
 15                                                    15 
 16 The register is accessed via processing coeffi     16 The register is accessed via processing coefficient 0x36 on NID 20h. Bits not
 17 identified below have no discernible effect on     17 identified below have no discernible effect on my machine, a Dell XPS 13 9350::
 18                                                    18 
 19   MSB                           LSB                19   MSB                           LSB
 20   +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+                20   +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
 21   | |h|S|L|         | B |R|       | Known bits     21   | |h|S|L|         | B |R|       | Known bits
 22   +=+=+=+=+=+=+=+=+=+=+=+=+=+=+=+=+                22   +=+=+=+=+=+=+=+=+=+=+=+=+=+=+=+=+
 23   |0|0|1|1|  0x7  |0|0x0|1|  0x7  | Reset valu     23   |0|0|1|1|  0x7  |0|0x0|1|  0x7  | Reset value
 24   +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+                24   +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
 25                                                    25 
 26 1Ah input select (B): 2 bits                       26 1Ah input select (B): 2 bits
 27   When zero, expose the PC Beep line (from the     27   When zero, expose the PC Beep line (from the internal beep generator, when
 28   enabled with the Set Beep Generation verb on     28   enabled with the Set Beep Generation verb on NID 01h, or else from the
 29   external PCBEEP pin) on the 1Ah pin node. Wh     29   external PCBEEP pin) on the 1Ah pin node. When nonzero, expose the headphone
 30   jack (or possibly Line In on some machines)      30   jack (or possibly Line In on some machines) input instead. If PC Beep is
 31   selected, the 1Ah boost control has no effec     31   selected, the 1Ah boost control has no effect.
 32                                                    32 
 33 Amplify 1Ah loopback, left (L): 1 bit              33 Amplify 1Ah loopback, left (L): 1 bit
 34   Amplify the left channel of 1Ah before mixin     34   Amplify the left channel of 1Ah before mixing it into outputs as specified
 35   by h and S bits. Does not affect the level o     35   by h and S bits. Does not affect the level of 1Ah exposed to other widgets.
 36                                                    36 
 37 Amplify 1Ah loopback, right (R): 1 bit             37 Amplify 1Ah loopback, right (R): 1 bit
 38   Amplify the right channel of 1Ah before mixi     38   Amplify the right channel of 1Ah before mixing it into outputs as specified
 39   by h and S bits. Does not affect the level o     39   by h and S bits. Does not affect the level of 1Ah exposed to other widgets.
 40                                                    40 
 41 Loopback 1Ah to 21h [active low] (h): 1 bit        41 Loopback 1Ah to 21h [active low] (h): 1 bit
 42   When zero, mix 1Ah (possibly with amplificat     42   When zero, mix 1Ah (possibly with amplification, depending on L and R bits)
 43   into 21h (headphone jack on my machine). Mix     43   into 21h (headphone jack on my machine). Mixed signal respects the mute
 44   setting on 21h.                                  44   setting on 21h.
 45                                                    45 
 46 Loopback 1Ah to 14h (S): 1 bit                     46 Loopback 1Ah to 14h (S): 1 bit
 47   When one, mix 1Ah (possibly with amplificati     47   When one, mix 1Ah (possibly with amplification, depending on L and R bits)
 48   into 14h (internal speaker on my machine). M     48   into 14h (internal speaker on my machine). Mixed signal **ignores** the mute
 49   setting on 14h and is present whenever 14h i     49   setting on 14h and is present whenever 14h is configured as an output.
 50                                                    50 
 51 Path diagrams                                      51 Path diagrams
 52 =============                                      52 =============
 53                                                    53 
 54 1Ah input selection (DIV is the PC Beep divide     54 1Ah input selection (DIV is the PC Beep divider set on NID 01h)::
 55                                                    55 
 56   <Beep generator>   <PCBEEP pin>    <Headphon     56   <Beep generator>   <PCBEEP pin>    <Headphone jack>
 57           |                |                |      57           |                |                |
 58           +--DIV--+--!DIV--+       {1Ah boost      58           +--DIV--+--!DIV--+       {1Ah boost control}
 59                   |                         |      59                   |                         |
 60                   +--(b == 0)--+--(b != 0)--+      60                   +--(b == 0)--+--(b != 0)--+
 61                                |                   61                                |
 62                >1Ah (Beep/Headphone Mic/Line I     62                >1Ah (Beep/Headphone Mic/Line In)<
 63                                                    63 
 64 Loopback of 1Ah to 21h/14h::                       64 Loopback of 1Ah to 21h/14h::
 65                                                    65 
 66                <1Ah (Beep/Headphone Mic/Line I     66                <1Ah (Beep/Headphone Mic/Line In)>
 67                                |                   67                                |
 68                         {amplify if L/R}           68                         {amplify if L/R}
 69                                |                   69                                |
 70                   +-----!h-----+-----S-----+       70                   +-----!h-----+-----S-----+
 71                   |                        |       71                   |                        |
 72           {21h mute control}               |       72           {21h mute control}               |
 73                   |                        |       73                   |                        |
 74           >21h (Headphone)<     >14h (Internal     74           >21h (Headphone)<     >14h (Internal Speaker)<
 75                                                    75 
 76 Background                                         76 Background
 77 ==========                                         77 ==========
 78                                                    78 
 79 All Realtek HDA codecs have a vendor-defined w     79 All Realtek HDA codecs have a vendor-defined widget with node ID 20h which
 80 provides access to a bank of registers that co     80 provides access to a bank of registers that control various codec functions.
 81 Registers are read and written via the standar     81 Registers are read and written via the standard HDA processing coefficient
 82 verbs (Set/Get Coefficient Index, Set/Get Proc     82 verbs (Set/Get Coefficient Index, Set/Get Processing Coefficient). The node is
 83 named "Realtek Vendor Registers" in public dat     83 named "Realtek Vendor Registers" in public datasheets' verb listings and,
 84 apart from that, is entirely undocumented.         84 apart from that, is entirely undocumented.
 85                                                    85 
 86 This particular register, exposed at coefficie     86 This particular register, exposed at coefficient 0x36 and named in commits from
 87 Realtek, is of note: unlike most registers, wh     87 Realtek, is of note: unlike most registers, which seem to control detailed
 88 amplifier parameters not in scope of the HDA s     88 amplifier parameters not in scope of the HDA specification, it controls audio
 89 routing which could just as easily have been d     89 routing which could just as easily have been defined using standard HDA mixer
 90 and selector widgets.                              90 and selector widgets.
 91                                                    91 
 92 Specifically, it selects between two sources f     92 Specifically, it selects between two sources for the input pin widget with Node
 93 ID (NID) 1Ah: the widget's signal can come eit     93 ID (NID) 1Ah: the widget's signal can come either from an audio jack (on my
 94 laptop, a Dell XPS 13 9350, it's the headphone     94 laptop, a Dell XPS 13 9350, it's the headphone jack, but comments in Realtek
 95 commits indicate that it might be a Line In on     95 commits indicate that it might be a Line In on some machines) or from the PC
 96 Beep line (which is itself multiplexed between     96 Beep line (which is itself multiplexed between the codec's internal beep
 97 generator and external PCBEEP pin, depending o     97 generator and external PCBEEP pin, depending on if the beep generator is
 98 enabled via verbs on NID 01h). Additionally, i     98 enabled via verbs on NID 01h). Additionally, it can mix (with optional
 99 amplification) that signal onto the 21h and/or     99 amplification) that signal onto the 21h and/or 14h output pins.
100                                                   100 
101 The register's reset value is 0x3717, correspo    101 The register's reset value is 0x3717, corresponding to PC Beep on 1Ah that is
102 then amplified and mixed into both the headpho    102 then amplified and mixed into both the headphones and the speakers. Not only
103 does this violate the HDA specification, which    103 does this violate the HDA specification, which says that "[a vendor defined
104 beep input pin] connection may be maintained *    104 beep input pin] connection may be maintained *only* while the Link reset
105 (**RST#**) is asserted", it means that we cann    105 (**RST#**) is asserted", it means that we cannot ignore the register if we care
106 about the input that 1Ah would otherwise expos    106 about the input that 1Ah would otherwise expose or if the PCBEEP trace is
107 poorly shielded and picks up chassis noise (bo    107 poorly shielded and picks up chassis noise (both of which are the case on my
108 machine).                                         108 machine).
109                                                   109 
110 Unfortunately, there are lots of ways to get t    110 Unfortunately, there are lots of ways to get this register configuration wrong.
111 Linux, it seems, has gone through most of them    111 Linux, it seems, has gone through most of them. For one, the register resets
112 after S3 suspend: judging by existing code, th    112 after S3 suspend: judging by existing code, this isn't the case for all vendor
113 registers, and it's led to some fixes that imp    113 registers, and it's led to some fixes that improve behavior on cold boot but
114 don't last after suspend. Other fixes have suc    114 don't last after suspend. Other fixes have successfully switched the 1Ah input
115 away from PC Beep but have failed to disable b    115 away from PC Beep but have failed to disable both loopback paths. On my
116 machine, this means that the headphone input i    116 machine, this means that the headphone input is amplified and looped back to
117 the headphone output, which uses the exact sam    117 the headphone output, which uses the exact same pins! As you might expect, this
118 causes terrible headphone noise, the character    118 causes terrible headphone noise, the character of which is controlled by the
119 1Ah boost control. (If you've seen instruction    119 1Ah boost control. (If you've seen instructions online to fix XPS 13 headphone
120 noise by changing "Headphone Mic Boost" in ALS    120 noise by changing "Headphone Mic Boost" in ALSA, now you know why.)
121                                                   121 
122 The information here has been obtained through    122 The information here has been obtained through black-box reverse engineering of
123 the ALC256 codec's behavior and is not guarant    123 the ALC256 codec's behavior and is not guaranteed to be correct. It likely
124 also applies for the ALC255, ALC257, ALC235, a    124 also applies for the ALC255, ALC257, ALC235, and ALC236, since those codecs
125 seem to be close relatives of the ALC256. (The    125 seem to be close relatives of the ALC256. (They all share one initialization
126 function.) Additionally, other codecs like the    126 function.) Additionally, other codecs like the ALC225 and ALC285 also have this
127 register, judging by existing fixups in ``patc    127 register, judging by existing fixups in ``patch_realtek.c``, but specific
128 data (e.g. node IDs, bit positions, pin mappin    128 data (e.g. node IDs, bit positions, pin mappings) for those codecs may differ
129 from what I've described here.                    129 from what I've described here.
                                                      

~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~

kernel.org | git.kernel.org | LWN.net | Project Home | SVN repository | Mail admin

Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.

sflogo.php