1 ====================================
2 Overview of Linux kernel SPI support
3 ====================================
4
5 02-Feb-2012
6
7 What is SPI?
8 ------------
9 The "Serial Peripheral Interface" (SPI) is a s
10 link used to connect microcontrollers to senso
11 It's a simple "de facto" standard, not complic
12 standardization body. SPI uses a host/target
13
14 The three signal wires hold a clock (SCK, ofte
15 and parallel data lines with "Master Out, Slav
16 Slave Out" (MISO) signals. (Other names are a
17 clocking modes through which data is exchanged
18 commonly used. Each clock cycle shifts data o
19 doesn't cycle except when there is a data bit
20 are used though; not every protocol uses those
21
22 SPI hosts use a fourth "chip select" line to a
23 device, so those three signal wires may be con
24 in parallel. All SPI targets support chipsele
25 low signals, labeled nCSx for target 'x' (e.g.
26 other signals, often including an interrupt to
27
28 Unlike serial busses like USB or SMBus, even l
29 SPI target functions are usually not interoper
30 (except for commodities like SPI memory chips)
31
32 - SPI may be used for request/response style
33 touchscreen sensors and memory chips.
34
35 - It may also be used to stream data in eith
36 or both of them at the same time (full dup
37
38 - Some devices may use eight bit words. Oth
39 lengths, such as streams of 12-bit or 20-b
40
41 - Words are usually sent with their most sig
42 but sometimes the least significant bit (L
43
44 - Sometimes SPI is used to daisy-chain devic
45
46 In the same way, SPI targets will only rarely
47 discovery/enumeration protocol. The tree of ta
48 a given SPI host controller will normally be s
49 configuration tables.
50
51 SPI is only one of the names used by such four
52 most controllers have no problem handling "Mic
53 half-duplex SPI, for request/response protocol
54 Serial Protocol"), PSP ("Programmable Serial P
55 related protocols.
56
57 Some chips eliminate a signal line by combinin
58 limiting themselves to half-duplex at the hard
59 some SPI chips have this signal mode as a stra
60 can be accessed using the same programming int
61 course they won't handle full duplex transfers
62 chips described as using "three wire" signalin
63 (That data line is sometimes called MOMI or SI
64
65 Microcontrollers often support both host and t
66 protocol. This document (and Linux) supports
67 sides of SPI interactions.
68
69
70 Who uses it? On what kinds of systems?
71 ---------------------------------------
72 Linux developers using SPI are probably writin
73 systems boards. SPI is used to control extern
74 protocol supported by every MMC or SD memory c
75 cards, predating MMC cards but using the same
76 support only SPI.) Some PC hardware uses SPI
77
78 SPI target chips range from digital/analog con
79 sensors and codecs, to memory, to peripherals
80 or Ethernet adapters; and more.
81
82 Most systems using SPI will integrate a few de
83 Some provide SPI links on expansion connectors
84 dedicated SPI controller exists, GPIO pins can
85 low speed "bitbanging" adapter. Very few syst
86 controller; the reasons to use SPI focus on lo
87 and if dynamic reconfiguration is important, U
88 appropriate low-pincount peripheral bus.
89
90 Many microcontrollers that can run Linux integ
91 interfaces with SPI modes. Given SPI support,
92 cards without needing a special purpose MMC/SD
93
94
95 I'm confused. What are these four SPI "clock
96 ----------------------------------------------
97 It's easy to be confused here, and the vendor
98 find isn't necessarily helpful. The four mode
99
100 - CPOL indicates the initial clock polarity.
101 clock starts low, so the first (leading) ed
102 the second (trailing) edge is falling. CPO
103 starts high, so the first (leading) edge is
104
105 - CPHA indicates the clock phase used to samp
106 sample on the leading edge, CPHA=1 means th
107
108 Since the signal needs to stabilize before
109 implies that its data is written half a clo
110 clock edge. The chipselect may have made i
111
112 Chip specs won't always say "uses SPI mode X"
113 but their timing diagrams will make the CPOL a
114
115 In the SPI mode number, CPOL is the high order
116 low order bit. So when a chip's timing diagra
117 starting low (CPOL=0) and data stabilized for
118 trailing clock edge (CPHA=1), that's SPI mode
119
120 Note that the clock mode is relevant as soon a
121 active. So the host must set the clock to ina
122 a target, and the target can tell the chosen p
123 clock level when its select line goes active.
124 support for example both modes 0 and 3: they
125 and always clock data in/out on rising clock e
126
127
128 How do these driver programming interfaces wor
129 ----------------------------------------------
130 The <linux/spi/spi.h> header file includes ker
131 main source code, and you should certainly rea
132 kernel API document. This is just an overview
133 picture before those details.
134
135 SPI requests always go into I/O queues. Reque
136 are always executed in FIFO order, and complet
137 completion callbacks. There are also some sim
138 for those calls, including ones for common tra
139 a command and then reading its response.
140
141 There are two types of SPI driver, here called
142
143 Controller drivers ...
144 controllers may be built into System-O
145 processors, and often support both Con
146 These drivers touch hardware registers
147 Or they can be PIO bitbangers, needing
148
149 Protocol drivers ...
150 these pass messages through the contro
151 driver to communicate with a target or
152 other side of an SPI link.
153
154 So for example one protocol driver might talk
155 data to filesystems stored on SPI flash like D
156 control audio interfaces, present touchscreen
157 or monitor temperature and voltage levels duri
158 And those might all be sharing the same contro
159
160 A "struct spi_device" encapsulates the control
161 those two types of drivers.
162
163 There is a minimal core of SPI programming int
164 using the driver model to connect controller a
165 device tables provided by board specific initi
166 shows up in sysfs in several locations::
167
168 /sys/devices/.../CTLR ... physical node for
169
170 /sys/devices/.../CTLR/spiB.C ... spi_device
171 chipselect C, accessed through CTLR.
172
173 /sys/bus/spi/devices/spiB.C ... symlink to
174 .../CTLR/spiB.C device
175
176 /sys/devices/.../CTLR/spiB.C/modalias ... i
177 that should be used with this device (
178
179 /sys/bus/spi/drivers/D ... driver for one o
180
181 /sys/class/spi_master/spiB ... symlink to a
182 class related state for the SPI host c
183 All spiB.* devices share one physical
184 MOSI, and MISO.
185
186 /sys/devices/.../CTLR/slave ... virtual fil
187 target device for an SPI target contro
188 Writing the driver name of an SPI targ
189 registers the target device; writing "
190 device.
191 Reading from this file shows the name
192 if not registered).
193
194 /sys/class/spi_slave/spiB ... symlink to a
195 class related state for the SPI target
196 registered, a single spiB.* device is
197 the physical SPI bus segment with othe
198
199 At this time, the only class-specific state is
200 so those /sys/class entries are only useful to
201
202
203 How does board-specific init code declare SPI
204 ----------------------------------------------
205 Linux needs several kinds of information to pr
206 That information is normally provided by board
207 chips that do support some of automated discov
208
209 Declare Controllers
210 ^^^^^^^^^^^^^^^^^^^
211
212 The first kind of information is a list of wha
213 For System-on-Chip (SOC) based boards, these w
214 devices, and the controller may need some plat
215 operate properly. The "struct platform_device
216 like the physical address of the controller's
217
218 Platforms will often abstract the "register SP
219 maybe coupling it with code to initialize pin
220 the arch/.../mach-*/board-*.c files for severa
221 same basic controller setup code. This is bec
222 SPI-capable controllers, and only the ones act
223 board should normally be set up and registered
224
225 So for example arch/.../mach-*/board-*.c files
226
227 #include <mach/spi.h> /* for mysoc_s
228
229 /* if your mach-* infrastructure doesn
230 * run on multiple boards, pdata would
231 */
232 static struct mysoc_spi_data pdata __i
233
234 static __init board_init(void)
235 {
236 ...
237 /* this board only uses SPI co
238 mysoc_register_spi(2, &pdata);
239 ...
240 }
241
242 And SOC-specific utility code might look somet
243
244 #include <mach/spi.h>
245
246 static struct platform_device spi2 = {
247
248 void mysoc_register_spi(unsigned n, st
249 {
250 struct mysoc_spi_data *pdata2;
251
252 pdata2 = kmalloc(sizeof *pdata
253 *pdata2 = pdata;
254 ...
255 if (n == 2) {
256 spi2->dev.platform_dat
257 register_platform_devi
258
259 /* also: set up pin mo
260 * visible on the rele
261 * production boards m
262 * developer boards wi
263 */
264 }
265 ...
266 }
267
268 Notice how the platform_data for boards may be
269 same SOC controller is used. For example, on
270 an external clock, where another derives the S
271 settings of some master clock.
272
273 Declare target Devices
274 ^^^^^^^^^^^^^^^^^^^^^^
275
276 The second kind of information is a list of wh
277 on the target board, often with some board-spe
278 driver to work correctly.
279
280 Normally your arch/.../mach-*/board-*.c files
281 listing the SPI devices on each board. (This
282 small handful.) That might look like::
283
284 static struct ads7846_platform_data ad
285 .vref_delay_usecs = 100,
286 .x_plate_ohms = 580,
287 .y_plate_ohms = 410,
288 };
289
290 static struct spi_board_info spi_board
291 {
292 .modalias = "ads7846",
293 .platform_data = &ads_info,
294 .mode = SPI_MODE_0,
295 .irq = GPIO_IRQ(31)
296 .max_speed_hz = 120000 /* ma
297 .bus_num = 1,
298 .chip_select = 0,
299 },
300 };
301
302 Again, notice how board-specific information i
303 several types. This example shows generic con
304 clock to allow (a function of board voltage in
305 is wired, plus chip-specific constraints like
306 changed by the capacitance at one pin.
307
308 (There's also "controller_data", information t
309 controller driver. An example would be periph
310 data or chipselect callbacks. This is stored
311
312 The board_info should provide enough informati
313 without the chip's driver being loaded. The m
314 that is likely the SPI_CS_HIGH bit in the spi_
315 sharing a bus with a device that interprets ch
316 not possible until the infrastructure knows ho
317
318 Then your board initialization code would regi
319 infrastructure, so that it's available later w
320 driver is registered::
321
322 spi_register_board_info(spi_board_info
323
324 Like with other static board-specific setup, y
325
326 The widely used "card" style computers bundle
327 onto a card that's maybe just thirty square ce
328 your ``arch/.../mach-.../board-*.c`` file woul
329 about the devices on the mainboard into which
330 certainly includes SPI devices hooked up throu
331
332
333 Non-static Configurations
334 ^^^^^^^^^^^^^^^^^^^^^^^^^
335
336 When Linux includes support for MMC/SD/SDIO/Da
337 configurations will also be dynamic. Fortunat
338 basic device identification probes, so they sh
339
340
341 How do I write an "SPI Protocol Driver"?
342 ----------------------------------------
343 Most SPI drivers are currently kernel drivers,
344 for userspace drivers. Here we talk only abou
345
346 SPI protocol drivers somewhat resemble platfor
347
348 static struct spi_driver CHIP_driver =
349 .driver = {
350 .name = "CHI
351 .pm = &CHI
352 },
353
354 .probe = CHIP_probe,
355 .remove = CHIP_remove,
356 };
357
358 The driver core will automatically attempt to
359 device whose board_info gave a modalias of "CH
360 might look like this unless you're creating a
361 a bus (appearing under /sys/class/spi_master).
362
363 ::
364
365 static int CHIP_probe(struct spi_devic
366 {
367 struct CHIP
368 struct CHIP_platform_data
369
370 /* assuming the driver require
371 pdata = &spi->dev.platform_dat
372 if (!pdata)
373 return -ENODEV;
374
375 /* get memory for driver's per
376 chip = kzalloc(sizeof *chip, G
377 if (!chip)
378 return -ENOMEM;
379 spi_set_drvdata(spi, chip);
380
381 ... etc
382 return 0;
383 }
384
385 As soon as it enters probe(), the driver may i
386 the SPI device using "struct spi_message". Wh
387 or after probe() fails, the driver guarantees
388 any more such messages.
389
390 - An spi_message is a sequence of protocol o
391 as one atomic sequence. SPI driver contro
392
393 + when bidirectional reads and writes st
394 sequence of spi_transfer requests is a
395
396 + which I/O buffers are used ... each sp
397 buffer for each transfer direction, su
398 (two pointers, maybe the same one in b
399 duplex (one pointer is NULL) transfers
400
401 + optionally defining short delays after
402 the spi_transfer.delay.value setting (
403 only protocol effect, if the buffer le
404 when specifying this delay the default
405 is microseconds, however this can be a
406 or nanoseconds if needed;
407
408 + whether the chipselect becomes inactiv
409 any delay ... by using the spi_transfe
410
411 + hinting whether the next message is li
412 device ... using the spi_transfer.cs_c
413 transfer in that atomic group, and pot
414 for chip deselect and select operation
415
416 - Follow standard kernel rules, and provide
417 your messages. That way controller driver
418 to make extra copies unless the hardware r
419 around hardware errata that force the use
420
421 - The basic I/O primitive is spi_async(). A
422 issued in any context (irq handler, task,
423 is reported using a callback provided with
424 After any detected error, the chip is dese
425 of that spi_message is aborted.
426
427 - There are also synchronous wrappers like s
428 like spi_read(), spi_write(), and spi_writ
429 may be issued only in contexts that may sl
430 clean (and small, and "optional") layers o
431
432 - The spi_write_then_read() call, and conven
433 it, should only be used with small amounts
434 cost of an extra copy may be ignored. It'
435 common RPC-style requests, such as writing
436 and reading a sixteen bit response -- spi_
437 wrappers, doing exactly that.
438
439 Some drivers may need to modify spi_device cha
440 transfer mode, wordsize, or clock rate. This
441 which would normally be called from probe() be
442 done to the device. However, that can also be
443 that no message is pending for that device.
444
445 While "spi_device" would be the bottom boundar
446 upper boundaries might include sysfs (especial
447 the input layer, ALSA, networking, MTD, the ch
448 or other Linux subsystems.
449
450 Note that there are two types of memory your d
451 of interacting with SPI devices.
452
453 - I/O buffers use the usual Linux rules, and
454 You'd normally allocate them from the heap
455 Don't use the stack, or anything that's de
456
457 - The spi_message and spi_transfer metadata
458 I/O buffers into a group of protocol trans
459 be allocated anywhere it's convenient, inc
460 other allocate-once driver data structures
461
462 If you like, spi_message_alloc() and spi_messa
463 routines are available to allocate and zero-in
464 with several transfers.
465
466
467 How do I write an "SPI Controller Driver"?
468 ----------------------------------------------
469 An SPI controller will probably be registered
470 a driver to bind to the device, whichever bus
471
472 The main task of this type of driver is to pro
473 Use spi_alloc_host() to allocate the host cont
474 spi_controller_get_devdata() to get the driver
475 device.
476
477 ::
478
479 struct spi_controller *ctlr;
480 struct CONTROLLER *c;
481
482 ctlr = spi_alloc_host(dev, sizeof *c);
483 if (!ctlr)
484 return -ENODEV;
485
486 c = spi_controller_get_devdata(ctlr);
487
488 The driver will initialize the fields of that
489 number (maybe the same as the platform device
490 interact with the SPI core and SPI protocol dr
491 its own internal state. (See below about bus
492
493 After you initialize the spi_controller, then
494 publish it to the rest of the system. At that
495 controller and any predeclared spi devices wil
496 the driver model core will take care of bindin
497
498 If you need to remove your SPI controller driv
499 will reverse the effect of spi_register_contro
500
501
502 Bus Numbering
503 ^^^^^^^^^^^^^
504
505 Bus numbering is important, since that's how L
506 SPI bus (shared SCK, MOSI, MISO). Valid bus n
507 SOC systems, the bus numbers should match the
508 manufacturer. For example, hardware controlle
509 and spi_board_info for devices connected to it
510
511 If you don't have such hardware-assigned bus n
512 you can't just assign them, then provide a neg
513 then be replaced by a dynamically assigned num
514 this as a non-static configuration (see above)
515
516
517 SPI Host Controller Methods
518 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
519
520 ``ctlr->setup(struct spi_device *spi)``
521 This sets up the device clock rate, SP
522 Drivers may change the defaults provid
523 call spi_setup(spi) to invoke this rou
524
525 Unless each SPI target has its own con
526 change them right away ... otherwise d
527 that's in progress for other SPI devic
528
529 .. note::
530
531 BUG ALERT: for some reason th
532 many spi_controller drivers se
533 When you code setup(), ASSUME
534 is actively processing transfe
535
536 ``ctlr->cleanup(struct spi_device *spi)``
537 Your controller driver may use spi_dev
538 state it dynamically associates with t
539 be sure to provide the cleanup() metho
540
541 ``ctlr->prepare_transfer_hardware(struct spi_c
542 This will be called by the queue mecha
543 that a message is coming in soon, so t
544 driver to prepare the transfer hardwar
545 This may sleep.
546
547 ``ctlr->unprepare_transfer_hardware(struct spi
548 This will be called by the queue mecha
549 that there are no more messages pendin
550 relax the hardware (e.g. by power mana
551
552 ``ctlr->transfer_one_message(struct spi_contro
553 The subsystem calls the driver to tran
554 queuing transfers that arrive in the m
555 finished with this message, it must ca
556 spi_finalize_current_message() so the
557 message. This may sleep.
558
559 ``ctrl->transfer_one(struct spi_controller *ct
560 The subsystem calls the driver to tran
561 queuing transfers that arrive in the m
562 finished with this transfer, it must c
563 spi_finalize_current_transfer() so the
564 transfer. This may sleep. Note: transf
565 are mutually exclusive; when both are
566 not call your transfer_one callback.
567
568 Return values:
569
570 * negative errno: error
571 * 0: transfer is finished
572 * 1: transfer is still in progress
573
574 ``ctrl->set_cs_timing(struct spi_device *spi,
575 This method allows SPI client drivers
576 for configuring device specific CS set
577 requirements.
578
579 Deprecated Methods
580 ^^^^^^^^^^^^^^^^^^
581
582 ``ctrl->transfer(struct spi_device *spi, struc
583 This must not sleep. Its responsibilit
584 transfer happens and its complete() ca
585 will normally happen later, after othe
586 if the controller is idle it will need
587 method is not used on queued controlle
588 transfer_one_message() and (un)prepare
589 implemented.
590
591
592 SPI Message Queue
593 ^^^^^^^^^^^^^^^^^
594
595 If you are happy with the standard queueing me
596 SPI subsystem, just implement the queued metho
597 the message queue has the upside of centralizi
598 providing pure process-context execution of me
599 can also be elevated to realtime priority on h
600
601 Unless the queueing mechanism in the SPI subsy
602 of the driver will be managing the I/O queue f
603 function transfer().
604
605 That queue could be purely conceptual. For ex
606 for low-frequency sensor access might be fine
607
608 But the queue will probably be very real, usin
609 often DMA (especially if the root filesystem i
610 execution contexts like IRQ handlers, tasklets
611 as keventd). Your driver can be as fancy, or
612 Such a transfer() method would normally just a
613 queue, and then start some asynchronous transf
614 already running).
615
616
617 Extensions to the SPI protocol
618 ------------------------------
619 The fact that SPI doesn't have a formal specif
620 manufacturers to implement the SPI protocol in
621 cases, SPI protocol implementations from diffe
622 each other. For example, in SPI mode 0 (CPOL=0
623 like the following:
624
625 ::
626
627 nCSx ___
628 \___________________________________
629 •
630 •
631 SCLK ___ ___ ___ ___
632 _______/ \___/ \___/ \___/ \___
633 • : ; : ; : ; : ;
634 • : ; : ; : ; : ;
635 MOSI XXX__________ _______
636 0xA5 XXX__/ 1 \_0_____/ 1 \_0_______
637 • ; ; ; ;
638 • ; ; ; ;
639 MISO XXX__________ _________________
640 0xBA XXX__/ 1 \_____0_/ 1 1
641
642 Legend::
643
644 • marks the start/end of transmission;
645 : marks when data is clocked into the periph
646 ; marks when data is clocked into the contro
647 X marks when line states are not specified.
648
649 In some few cases, chips extend the SPI protoc
650 that other SPI protocols don't (e.g. data line
651 asserted). Those distinct SPI protocols, modes
652 by different SPI mode flags.
653
654 MOSI idle state configuration
655 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
656
657 Common SPI protocol implementations don't spec
658 MOSI line when the controller is not clocking
659 peripherals that require specific MOSI line st
660 out. For example, if the peripheral expects th
661 controller is not clocking out data (``SPI_MOS
662 SPI mode 0 would look like the following:
663
664 ::
665
666 nCSx ___
667 \___________________________________
668 •
669 •
670 SCLK ___ ___ ___ ___
671 _______/ \___/ \___/ \___/ \___
672 • : ; : ; : ; : ;
673 • : ; : ; : ; : ;
674 MOSI _____ _______ _______
675 0x56 \_0_____/ 1 \_0_____/ 1 \_
676 • ; ; ; ;
677 • ; ; ; ;
678 MISO XXX__________ _________________
679 0xBA XXX__/ 1 \_____0_/ 1 1
680
681 Legend::
682
683 • marks the start/end of transmission;
684 : marks when data is clocked into the periph
685 ; marks when data is clocked into the contro
686 X marks when line states are not specified.
687
688 In this extension to the usual SPI protocol, t
689 be kept high when CS is asserted but the contr
690 the peripheral and also when CS is not asserte
691
692 Peripherals that require this extension must r
693 ``SPI_MOSI_IDLE_HIGH`` bit into the mode attri
694 spi_device`` and call spi_setup(). Controllers
695 should indicate it by setting ``SPI_MOSI_IDLE_
696 of their ``struct spi_controller``. The config
697 analogous but uses the ``SPI_MOSI_IDLE_LOW`` m
698
699
700 THANKS TO
701 ---------
702 Contributors to Linux-SPI discussions include
703 by last name):
704
705 - Mark Brown
706 - David Brownell
707 - Russell King
708 - Grant Likely
709 - Dmitry Pervushin
710 - Stephen Street
711 - Mark Underwood
712 - Andrew Victor
713 - Linus Walleij
714 - Vitaly Wool
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
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