1 .. SPDX-License-Identifier: GPL-2.0 1 .. SPDX-License-Identifier: GPL-2.0
2 2
3 ================= 3 =================
4 KVM Lock Overview 4 KVM Lock Overview
5 ================= 5 =================
6 6
7 1. Acquisition Orders 7 1. Acquisition Orders
8 --------------------- 8 ---------------------
9 9
10 The acquisition orders for mutexes are as foll 10 The acquisition orders for mutexes are as follows:
11 11
12 - cpus_read_lock() is taken outside kvm_lock <<
13 <<
14 - kvm_usage_lock is taken outside cpus_read_lo <<
15 <<
16 - kvm->lock is taken outside vcpu->mutex 12 - kvm->lock is taken outside vcpu->mutex
17 13
18 - kvm->lock is taken outside kvm->slots_lock a 14 - kvm->lock is taken outside kvm->slots_lock and kvm->irq_lock
19 15
20 - kvm->slots_lock is taken outside kvm->irq_lo 16 - kvm->slots_lock is taken outside kvm->irq_lock, though acquiring
21 them together is quite rare. 17 them together is quite rare.
22 18
23 - kvm->mn_active_invalidate_count ensures that 19 - kvm->mn_active_invalidate_count ensures that pairs of
24 invalidate_range_start() and invalidate_rang 20 invalidate_range_start() and invalidate_range_end() callbacks
25 use the same memslots array. kvm->slots_loc 21 use the same memslots array. kvm->slots_lock and kvm->slots_arch_lock
26 are taken on the waiting side when modifying !! 22 are taken on the waiting side in install_new_memslots, so MMU notifiers
27 must not take either kvm->slots_lock or kvm- 23 must not take either kvm->slots_lock or kvm->slots_arch_lock.
28 24
29 cpus_read_lock() vs kvm_lock: <<
30 <<
31 - Taking cpus_read_lock() outside of kvm_lock <<
32 being the official ordering, as it is quite <<
33 cpus_read_lock() while holding kvm_lock. Us <<
34 e.g. avoid complex operations when possible. <<
35 <<
36 For SRCU: 25 For SRCU:
37 26
38 - ``synchronize_srcu(&kvm->srcu)`` is called i 27 - ``synchronize_srcu(&kvm->srcu)`` is called inside critical sections
39 for kvm->lock, vcpu->mutex and kvm->slots_lo 28 for kvm->lock, vcpu->mutex and kvm->slots_lock. These locks _cannot_
40 be taken inside a kvm->srcu read-side critic 29 be taken inside a kvm->srcu read-side critical section; that is, the
41 following is broken:: 30 following is broken::
42 31
43 srcu_read_lock(&kvm->srcu); 32 srcu_read_lock(&kvm->srcu);
44 mutex_lock(&kvm->slots_lock); 33 mutex_lock(&kvm->slots_lock);
45 34
46 - kvm->slots_arch_lock instead is released bef 35 - kvm->slots_arch_lock instead is released before the call to
47 ``synchronize_srcu()``. It _can_ therefore 36 ``synchronize_srcu()``. It _can_ therefore be taken inside a
48 kvm->srcu read-side critical section, for ex 37 kvm->srcu read-side critical section, for example while processing
49 a vmexit. 38 a vmexit.
50 39
51 On x86: 40 On x86:
52 41
53 - vcpu->mutex is taken outside kvm->arch.hyper 42 - vcpu->mutex is taken outside kvm->arch.hyperv.hv_lock and kvm->arch.xen.xen_lock
54 43
55 - kvm->arch.mmu_lock is an rwlock; critical se !! 44 - kvm->arch.mmu_lock is an rwlock. kvm->arch.tdp_mmu_pages_lock and
56 kvm->arch.tdp_mmu_pages_lock and kvm->arch.m !! 45 kvm->arch.mmu_unsync_pages_lock are taken inside kvm->arch.mmu_lock, and
57 also take kvm->arch.mmu_lock !! 46 cannot be taken without already holding kvm->arch.mmu_lock (typically with
>> 47 ``read_lock`` for the TDP MMU, thus the need for additional spinlocks).
58 48
59 Everything else is a leaf: no other lock is ta 49 Everything else is a leaf: no other lock is taken inside the critical
60 sections. 50 sections.
61 51
62 2. Exception 52 2. Exception
63 ------------ 53 ------------
64 54
65 Fast page fault: 55 Fast page fault:
66 56
67 Fast page fault is the fast path which fixes t 57 Fast page fault is the fast path which fixes the guest page fault out of
68 the mmu-lock on x86. Currently, the page fault 58 the mmu-lock on x86. Currently, the page fault can be fast in one of the
69 following two cases: 59 following two cases:
70 60
71 1. Access Tracking: The SPTE is not present, b 61 1. Access Tracking: The SPTE is not present, but it is marked for access
72 tracking. That means we need to restore the 62 tracking. That means we need to restore the saved R/X bits. This is
73 described in more detail later below. 63 described in more detail later below.
74 64
75 2. Write-Protection: The SPTE is present and t 65 2. Write-Protection: The SPTE is present and the fault is caused by
76 write-protect. That means we just need to c 66 write-protect. That means we just need to change the W bit of the spte.
77 67
78 What we use to avoid all the races is the Host !! 68 What we use to avoid all the race is the Host-writable bit and MMU-writable bit
79 on the spte: 69 on the spte:
80 70
81 - Host-writable means the gfn is writable in t 71 - Host-writable means the gfn is writable in the host kernel page tables and in
82 its KVM memslot. 72 its KVM memslot.
83 - MMU-writable means the gfn is writable in th 73 - MMU-writable means the gfn is writable in the guest's mmu and it is not
84 write-protected by shadow page write-protect 74 write-protected by shadow page write-protection.
85 75
86 On fast page fault path, we will use cmpxchg t 76 On fast page fault path, we will use cmpxchg to atomically set the spte W
87 bit if spte.HOST_WRITEABLE = 1 and spte.WRITE_ 77 bit if spte.HOST_WRITEABLE = 1 and spte.WRITE_PROTECT = 1, to restore the saved
88 R/X bits if for an access-traced spte, or both 78 R/X bits if for an access-traced spte, or both. This is safe because whenever
89 changing these bits can be detected by cmpxchg 79 changing these bits can be detected by cmpxchg.
90 80
91 But we need carefully check these cases: 81 But we need carefully check these cases:
92 82
93 1) The mapping from gfn to pfn 83 1) The mapping from gfn to pfn
94 84
95 The mapping from gfn to pfn may be changed sin 85 The mapping from gfn to pfn may be changed since we can only ensure the pfn
96 is not changed during cmpxchg. This is a ABA p 86 is not changed during cmpxchg. This is a ABA problem, for example, below case
97 will happen: 87 will happen:
98 88
99 +--------------------------------------------- 89 +------------------------------------------------------------------------+
100 | At the beginning:: 90 | At the beginning:: |
101 | 91 | |
102 | gpte = gfn1 92 | gpte = gfn1 |
103 | gfn1 is mapped to pfn1 on host 93 | gfn1 is mapped to pfn1 on host |
104 | spte is the shadow page table entry co 94 | spte is the shadow page table entry corresponding with gpte and |
105 | spte = pfn1 95 | spte = pfn1 |
106 +--------------------------------------------- 96 +------------------------------------------------------------------------+
107 | On fast page fault path: 97 | On fast page fault path: |
108 +------------------------------------+-------- 98 +------------------------------------+-----------------------------------+
109 | CPU 0: | CPU 1: 99 | CPU 0: | CPU 1: |
110 +------------------------------------+-------- 100 +------------------------------------+-----------------------------------+
111 | :: | 101 | :: | |
112 | | 102 | | |
113 | old_spte = *spte; | 103 | old_spte = *spte; | |
114 +------------------------------------+-------- 104 +------------------------------------+-----------------------------------+
115 | | pfn1 is 105 | | pfn1 is swapped out:: |
116 | | 106 | | |
117 | | spte 107 | | spte = 0; |
118 | | 108 | | |
119 | | pfn1 is 109 | | pfn1 is re-alloced for gfn2. |
120 | | 110 | | |
121 | | gpte is 111 | | gpte is changed to point to |
122 | | gfn2 by 112 | | gfn2 by the guest:: |
123 | | 113 | | |
124 | | spte 114 | | spte = pfn1; |
125 +------------------------------------+-------- 115 +------------------------------------+-----------------------------------+
126 | :: 116 | :: |
127 | 117 | |
128 | if (cmpxchg(spte, old_spte, old_spte+W) 118 | if (cmpxchg(spte, old_spte, old_spte+W) |
129 | mark_page_dirty(vcpu->kvm, gfn1) 119 | mark_page_dirty(vcpu->kvm, gfn1) |
130 | OOPS!!! 120 | OOPS!!! |
131 +--------------------------------------------- 121 +------------------------------------------------------------------------+
132 122
133 We dirty-log for gfn1, that means gfn2 is lost 123 We dirty-log for gfn1, that means gfn2 is lost in dirty-bitmap.
134 124
135 For direct sp, we can easily avoid it since th 125 For direct sp, we can easily avoid it since the spte of direct sp is fixed
136 to gfn. For indirect sp, we disabled fast pag 126 to gfn. For indirect sp, we disabled fast page fault for simplicity.
137 127
138 A solution for indirect sp could be to pin the 128 A solution for indirect sp could be to pin the gfn, for example via
139 gfn_to_pfn_memslot_atomic, before the cmpxchg. !! 129 kvm_vcpu_gfn_to_pfn_atomic, before the cmpxchg. After the pinning:
140 130
141 - We have held the refcount of pfn; that means !! 131 - We have held the refcount of pfn that means the pfn can not be freed and
142 be reused for another gfn. 132 be reused for another gfn.
143 - The pfn is writable and therefore it cannot 133 - The pfn is writable and therefore it cannot be shared between different gfns
144 by KSM. 134 by KSM.
145 135
146 Then, we can ensure the dirty bitmaps is corre 136 Then, we can ensure the dirty bitmaps is correctly set for a gfn.
147 137
148 2) Dirty bit tracking 138 2) Dirty bit tracking
149 139
150 In the origin code, the spte can be fast updat 140 In the origin code, the spte can be fast updated (non-atomically) if the
151 spte is read-only and the Accessed bit has alr 141 spte is read-only and the Accessed bit has already been set since the
152 Accessed bit and Dirty bit can not be lost. 142 Accessed bit and Dirty bit can not be lost.
153 143
154 But it is not true after fast page fault since 144 But it is not true after fast page fault since the spte can be marked
155 writable between reading spte and updating spt 145 writable between reading spte and updating spte. Like below case:
156 146
157 +--------------------------------------------- 147 +------------------------------------------------------------------------+
158 | At the beginning:: 148 | At the beginning:: |
159 | 149 | |
160 | spte.W = 0 150 | spte.W = 0 |
161 | spte.Accessed = 1 151 | spte.Accessed = 1 |
162 +------------------------------------+-------- 152 +------------------------------------+-----------------------------------+
163 | CPU 0: | CPU 1: 153 | CPU 0: | CPU 1: |
164 +------------------------------------+-------- 154 +------------------------------------+-----------------------------------+
165 | In mmu_spte_clear_track_bits():: | 155 | In mmu_spte_clear_track_bits():: | |
166 | | 156 | | |
167 | old_spte = *spte; | 157 | old_spte = *spte; | |
168 | | 158 | | |
169 | | 159 | | |
170 | /* 'if' condition is satisfied. */| 160 | /* 'if' condition is satisfied. */| |
171 | if (old_spte.Accessed == 1 && | 161 | if (old_spte.Accessed == 1 && | |
172 | old_spte.W == 0) | 162 | old_spte.W == 0) | |
173 | spte = 0ull; | 163 | spte = 0ull; | |
174 +------------------------------------+-------- 164 +------------------------------------+-----------------------------------+
175 | | on fast 165 | | on fast page fault path:: |
176 | | 166 | | |
177 | | spte 167 | | spte.W = 1 |
178 | | 168 | | |
179 | | memory 169 | | memory write on the spte:: |
180 | | 170 | | |
181 | | spte 171 | | spte.Dirty = 1 |
182 +------------------------------------+-------- 172 +------------------------------------+-----------------------------------+
183 | :: | 173 | :: | |
184 | | 174 | | |
185 | else | 175 | else | |
186 | old_spte = xchg(spte, 0ull) | 176 | old_spte = xchg(spte, 0ull) | |
187 | if (old_spte.Accessed == 1) | 177 | if (old_spte.Accessed == 1) | |
188 | kvm_set_pfn_accessed(spte.pfn);| 178 | kvm_set_pfn_accessed(spte.pfn);| |
189 | if (old_spte.Dirty == 1) | 179 | if (old_spte.Dirty == 1) | |
190 | kvm_set_pfn_dirty(spte.pfn); | 180 | kvm_set_pfn_dirty(spte.pfn); | |
191 | OOPS!!! | 181 | OOPS!!! | |
192 +------------------------------------+-------- 182 +------------------------------------+-----------------------------------+
193 183
194 The Dirty bit is lost in this case. 184 The Dirty bit is lost in this case.
195 185
196 In order to avoid this kind of issue, we alway 186 In order to avoid this kind of issue, we always treat the spte as "volatile"
197 if it can be updated out of mmu-lock [see spte !! 187 if it can be updated out of mmu-lock, see spte_has_volatile_bits(), it means,
198 the spte is always atomically updated in this 188 the spte is always atomically updated in this case.
199 189
200 3) flush tlbs due to spte updated 190 3) flush tlbs due to spte updated
201 191
202 If the spte is updated from writable to read-o !! 192 If the spte is updated from writable to readonly, we should flush all TLBs,
203 otherwise rmap_write_protect will find a read- 193 otherwise rmap_write_protect will find a read-only spte, even though the
204 writable spte might be cached on a CPU's TLB. 194 writable spte might be cached on a CPU's TLB.
205 195
206 As mentioned before, the spte can be updated t 196 As mentioned before, the spte can be updated to writable out of mmu-lock on
207 fast page fault path. In order to easily audit !! 197 fast page fault path, in order to easily audit the path, we see if TLBs need
208 to be flushed caused this reason in mmu_spte_u !! 198 be flushed caused by this reason in mmu_spte_update() since this is a common
209 function to update spte (present -> present). 199 function to update spte (present -> present).
210 200
211 Since the spte is "volatile" if it can be upda 201 Since the spte is "volatile" if it can be updated out of mmu-lock, we always
212 atomically update the spte and the race caused !! 202 atomically update the spte, the race caused by fast page fault can be avoided,
213 See the comments in spte_has_volatile_bits() a 203 See the comments in spte_has_volatile_bits() and mmu_spte_update().
214 204
215 Lockless Access Tracking: 205 Lockless Access Tracking:
216 206
217 This is used for Intel CPUs that are using EPT 207 This is used for Intel CPUs that are using EPT but do not support the EPT A/D
218 bits. In this case, PTEs are tagged as A/D dis 208 bits. In this case, PTEs are tagged as A/D disabled (using ignored bits), and
219 when the KVM MMU notifier is called to track a 209 when the KVM MMU notifier is called to track accesses to a page (via
220 kvm_mmu_notifier_clear_flush_young), it marks 210 kvm_mmu_notifier_clear_flush_young), it marks the PTE not-present in hardware
221 by clearing the RWX bits in the PTE and storin 211 by clearing the RWX bits in the PTE and storing the original R & X bits in more
222 unused/ignored bits. When the VM tries to acce 212 unused/ignored bits. When the VM tries to access the page later on, a fault is
223 generated and the fast page fault mechanism de 213 generated and the fast page fault mechanism described above is used to
224 atomically restore the PTE to a Present state. 214 atomically restore the PTE to a Present state. The W bit is not saved when the
225 PTE is marked for access tracking and during r 215 PTE is marked for access tracking and during restoration to the Present state,
226 the W bit is set depending on whether or not i 216 the W bit is set depending on whether or not it was a write access. If it
227 wasn't, then the W bit will remain clear until 217 wasn't, then the W bit will remain clear until a write access happens, at which
228 time it will be set using the Dirty tracking m 218 time it will be set using the Dirty tracking mechanism described above.
229 219
230 3. Reference 220 3. Reference
231 ------------ 221 ------------
232 222
233 ``kvm_lock`` 223 ``kvm_lock``
234 ^^^^^^^^^^^^ 224 ^^^^^^^^^^^^
235 225
236 :Type: mutex 226 :Type: mutex
237 :Arch: any 227 :Arch: any
238 :Protects: - vm_list 228 :Protects: - vm_list
239 229
240 ``kvm_usage_lock`` !! 230 ``kvm_count_lock``
241 ^^^^^^^^^^^^^^^^^^ 231 ^^^^^^^^^^^^^^^^^^
242 232
243 :Type: mutex !! 233 :Type: raw_spinlock_t
244 :Arch: any 234 :Arch: any
245 :Protects: - kvm_usage_count !! 235 :Protects: - hardware virtualization enable/disable
246 - hardware virtualization enab !! 236 :Comment: 'raw' because hardware enabling/disabling must be atomic /wrt
247 :Comment: Exists to allow taking cpus_re !! 237 migration.
248 protected, which simplifies th <<
249 238
250 ``kvm->mn_invalidate_lock`` 239 ``kvm->mn_invalidate_lock``
251 ^^^^^^^^^^^^^^^^^^^^^^^^^^^ 240 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
252 241
253 :Type: spinlock_t 242 :Type: spinlock_t
254 :Arch: any 243 :Arch: any
255 :Protects: mn_active_invalidate_count, mn 244 :Protects: mn_active_invalidate_count, mn_memslots_update_rcuwait
256 245
257 ``kvm_arch::tsc_write_lock`` 246 ``kvm_arch::tsc_write_lock``
258 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 247 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
259 248
260 :Type: raw_spinlock_t 249 :Type: raw_spinlock_t
261 :Arch: x86 250 :Arch: x86
262 :Protects: - kvm_arch::{last_tsc_write,la 251 :Protects: - kvm_arch::{last_tsc_write,last_tsc_nsec,last_tsc_offset}
263 - tsc offset in vmcb 252 - tsc offset in vmcb
264 :Comment: 'raw' because updating the tsc 253 :Comment: 'raw' because updating the tsc offsets must not be preempted.
265 254
266 ``kvm->mmu_lock`` 255 ``kvm->mmu_lock``
267 ^^^^^^^^^^^^^^^^^ 256 ^^^^^^^^^^^^^^^^^
268 :Type: spinlock_t or rwlock_t 257 :Type: spinlock_t or rwlock_t
269 :Arch: any 258 :Arch: any
270 :Protects: -shadow page/shadow tlb entry 259 :Protects: -shadow page/shadow tlb entry
271 :Comment: it is a spinlock since it is u 260 :Comment: it is a spinlock since it is used in mmu notifier.
272 261
273 ``kvm->srcu`` 262 ``kvm->srcu``
274 ^^^^^^^^^^^^^ 263 ^^^^^^^^^^^^^
275 :Type: srcu lock 264 :Type: srcu lock
276 :Arch: any 265 :Arch: any
277 :Protects: - kvm->memslots 266 :Protects: - kvm->memslots
278 - kvm->buses 267 - kvm->buses
279 :Comment: The srcu read lock must be hel 268 :Comment: The srcu read lock must be held while accessing memslots (e.g.
280 when using gfn_to_* functions) 269 when using gfn_to_* functions) and while accessing in-kernel
281 MMIO/PIO address->device struc 270 MMIO/PIO address->device structure mapping (kvm->buses).
282 The srcu index can be stored i 271 The srcu index can be stored in kvm_vcpu->srcu_idx per vcpu
283 if it is needed by multiple fu 272 if it is needed by multiple functions.
284 273
285 ``kvm->slots_arch_lock`` 274 ``kvm->slots_arch_lock``
286 ^^^^^^^^^^^^^^^^^^^^^^^^ 275 ^^^^^^^^^^^^^^^^^^^^^^^^
287 :Type: mutex 276 :Type: mutex
288 :Arch: any (only needed on x86 though 277 :Arch: any (only needed on x86 though)
289 :Protects: any arch-specific fields of me 278 :Protects: any arch-specific fields of memslots that have to be modified
290 in a ``kvm->srcu`` read-side c 279 in a ``kvm->srcu`` read-side critical section.
291 :Comment: must be held before reading th 280 :Comment: must be held before reading the pointer to the current memslots,
292 until after all changes to the 281 until after all changes to the memslots are complete
293 282
294 ``wakeup_vcpus_on_cpu_lock`` 283 ``wakeup_vcpus_on_cpu_lock``
295 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 284 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
296 :Type: spinlock_t 285 :Type: spinlock_t
297 :Arch: x86 286 :Arch: x86
298 :Protects: wakeup_vcpus_on_cpu 287 :Protects: wakeup_vcpus_on_cpu
299 :Comment: This is a per-CPU lock and it 288 :Comment: This is a per-CPU lock and it is used for VT-d posted-interrupts.
300 When VT-d posted-interrupts ar !! 289 When VT-d posted-interrupts is supported and the VM has assigned
301 devices, we put the blocked vC 290 devices, we put the blocked vCPU on the list blocked_vcpu_on_cpu
302 protected by blocked_vcpu_on_c !! 291 protected by blocked_vcpu_on_cpu_lock, when VT-d hardware issues
303 wakeup notification event sinc 292 wakeup notification event since external interrupts from the
304 assigned devices happens, we w 293 assigned devices happens, we will find the vCPU on the list to
305 wakeup. 294 wakeup.
306 <<
307 ``vendor_module_lock`` <<
308 ^^^^^^^^^^^^^^^^^^^^^^ <<
309 :Type: mutex <<
310 :Arch: x86 <<
311 :Protects: loading a vendor module (kvm_a <<
312 :Comment: Exists because using kvm_lock <<
313 in notifiers, e.g. __kvmclock_cpufreq_noti <<
314 cpu_hotplug_lock is held, e.g. from cpufre <<
315 operations need to take cpu_hotplug_lock w <<
316 updating static calls. <<
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