1 .. SPDX-License-Identifier: GPL-2.0 1 .. SPDX-License-Identifier: GPL-2.0
2 2
3 ================= 3 =================
4 KVM Lock Overview 4 KVM Lock Overview
5 ================= 5 =================
6 6
7 1. Acquisition Orders 7 1. Acquisition Orders
8 --------------------- 8 ---------------------
9 9
10 The acquisition orders for mutexes are as foll 10 The acquisition orders for mutexes are as follows:
11 11
12 - cpus_read_lock() is taken outside kvm_lock <<
13 <<
14 - kvm_usage_lock is taken outside cpus_read_lo <<
15 <<
16 - kvm->lock is taken outside vcpu->mutex 12 - kvm->lock is taken outside vcpu->mutex
17 13
18 - kvm->lock is taken outside kvm->slots_lock a 14 - kvm->lock is taken outside kvm->slots_lock and kvm->irq_lock
19 15
20 - kvm->slots_lock is taken outside kvm->irq_lo 16 - kvm->slots_lock is taken outside kvm->irq_lock, though acquiring
21 them together is quite rare. 17 them together is quite rare.
22 18
23 - kvm->mn_active_invalidate_count ensures that !! 19 On x86, vcpu->mutex is taken outside kvm->arch.hyperv.hv_lock.
24 invalidate_range_start() and invalidate_rang <<
25 use the same memslots array. kvm->slots_loc <<
26 are taken on the waiting side when modifying <<
27 must not take either kvm->slots_lock or kvm- <<
28 <<
29 cpus_read_lock() vs kvm_lock: <<
30 <<
31 - Taking cpus_read_lock() outside of kvm_lock <<
32 being the official ordering, as it is quite <<
33 cpus_read_lock() while holding kvm_lock. Us <<
34 e.g. avoid complex operations when possible. <<
35 <<
36 For SRCU: <<
37 <<
38 - ``synchronize_srcu(&kvm->srcu)`` is called i <<
39 for kvm->lock, vcpu->mutex and kvm->slots_lo <<
40 be taken inside a kvm->srcu read-side critic <<
41 following is broken:: <<
42 <<
43 srcu_read_lock(&kvm->srcu); <<
44 mutex_lock(&kvm->slots_lock); <<
45 <<
46 - kvm->slots_arch_lock instead is released bef <<
47 ``synchronize_srcu()``. It _can_ therefore <<
48 kvm->srcu read-side critical section, for ex <<
49 a vmexit. <<
50 <<
51 On x86: <<
52 <<
53 - vcpu->mutex is taken outside kvm->arch.hyper <<
54 <<
55 - kvm->arch.mmu_lock is an rwlock; critical se <<
56 kvm->arch.tdp_mmu_pages_lock and kvm->arch.m <<
57 also take kvm->arch.mmu_lock <<
58 20
59 Everything else is a leaf: no other lock is ta 21 Everything else is a leaf: no other lock is taken inside the critical
60 sections. 22 sections.
61 23
62 2. Exception 24 2. Exception
63 ------------ 25 ------------
64 26
65 Fast page fault: 27 Fast page fault:
66 28
67 Fast page fault is the fast path which fixes t 29 Fast page fault is the fast path which fixes the guest page fault out of
68 the mmu-lock on x86. Currently, the page fault 30 the mmu-lock on x86. Currently, the page fault can be fast in one of the
69 following two cases: 31 following two cases:
70 32
71 1. Access Tracking: The SPTE is not present, b 33 1. Access Tracking: The SPTE is not present, but it is marked for access
72 tracking. That means we need to restore the !! 34 tracking i.e. the SPTE_SPECIAL_MASK is set. That means we need to
73 described in more detail later below. !! 35 restore the saved R/X bits. This is described in more detail later below.
74 <<
75 2. Write-Protection: The SPTE is present and t <<
76 write-protect. That means we just need to c <<
77 <<
78 What we use to avoid all the races is the Host <<
79 on the spte: <<
80 36
81 - Host-writable means the gfn is writable in t !! 37 2. Write-Protection: The SPTE is present and the fault is
82 its KVM memslot. !! 38 caused by write-protect. That means we just need to change the W bit of
83 - MMU-writable means the gfn is writable in th !! 39 the spte.
84 write-protected by shadow page write-protect !! 40
>> 41 What we use to avoid all the race is the SPTE_HOST_WRITEABLE bit and
>> 42 SPTE_MMU_WRITEABLE bit on the spte:
>> 43
>> 44 - SPTE_HOST_WRITEABLE means the gfn is writable on host.
>> 45 - SPTE_MMU_WRITEABLE means the gfn is writable on mmu. The bit is set when
>> 46 the gfn is writable on guest mmu and it is not write-protected by shadow
>> 47 page write-protection.
85 48
86 On fast page fault path, we will use cmpxchg t 49 On fast page fault path, we will use cmpxchg to atomically set the spte W
87 bit if spte.HOST_WRITEABLE = 1 and spte.WRITE_ !! 50 bit if spte.SPTE_HOST_WRITEABLE = 1 and spte.SPTE_WRITE_PROTECT = 1, or
88 R/X bits if for an access-traced spte, or both !! 51 restore the saved R/X bits if VMX_EPT_TRACK_ACCESS mask is set, or both. This
89 changing these bits can be detected by cmpxchg !! 52 is safe because whenever changing these bits can be detected by cmpxchg.
90 53
91 But we need carefully check these cases: 54 But we need carefully check these cases:
92 55
93 1) The mapping from gfn to pfn 56 1) The mapping from gfn to pfn
94 57
95 The mapping from gfn to pfn may be changed sin 58 The mapping from gfn to pfn may be changed since we can only ensure the pfn
96 is not changed during cmpxchg. This is a ABA p 59 is not changed during cmpxchg. This is a ABA problem, for example, below case
97 will happen: 60 will happen:
98 61
99 +--------------------------------------------- 62 +------------------------------------------------------------------------+
100 | At the beginning:: 63 | At the beginning:: |
101 | 64 | |
102 | gpte = gfn1 65 | gpte = gfn1 |
103 | gfn1 is mapped to pfn1 on host 66 | gfn1 is mapped to pfn1 on host |
104 | spte is the shadow page table entry co 67 | spte is the shadow page table entry corresponding with gpte and |
105 | spte = pfn1 68 | spte = pfn1 |
106 +--------------------------------------------- 69 +------------------------------------------------------------------------+
107 | On fast page fault path: 70 | On fast page fault path: |
108 +------------------------------------+-------- 71 +------------------------------------+-----------------------------------+
109 | CPU 0: | CPU 1: 72 | CPU 0: | CPU 1: |
110 +------------------------------------+-------- 73 +------------------------------------+-----------------------------------+
111 | :: | 74 | :: | |
112 | | 75 | | |
113 | old_spte = *spte; | 76 | old_spte = *spte; | |
114 +------------------------------------+-------- 77 +------------------------------------+-----------------------------------+
115 | | pfn1 is 78 | | pfn1 is swapped out:: |
116 | | 79 | | |
117 | | spte 80 | | spte = 0; |
118 | | 81 | | |
119 | | pfn1 is 82 | | pfn1 is re-alloced for gfn2. |
120 | | 83 | | |
121 | | gpte is 84 | | gpte is changed to point to |
122 | | gfn2 by 85 | | gfn2 by the guest:: |
123 | | 86 | | |
124 | | spte 87 | | spte = pfn1; |
125 +------------------------------------+-------- 88 +------------------------------------+-----------------------------------+
126 | :: 89 | :: |
127 | 90 | |
128 | if (cmpxchg(spte, old_spte, old_spte+W) 91 | if (cmpxchg(spte, old_spte, old_spte+W) |
129 | mark_page_dirty(vcpu->kvm, gfn1) 92 | mark_page_dirty(vcpu->kvm, gfn1) |
130 | OOPS!!! 93 | OOPS!!! |
131 +--------------------------------------------- 94 +------------------------------------------------------------------------+
132 95
133 We dirty-log for gfn1, that means gfn2 is lost 96 We dirty-log for gfn1, that means gfn2 is lost in dirty-bitmap.
134 97
135 For direct sp, we can easily avoid it since th 98 For direct sp, we can easily avoid it since the spte of direct sp is fixed
136 to gfn. For indirect sp, we disabled fast pag !! 99 to gfn. For indirect sp, before we do cmpxchg, we call gfn_to_pfn_atomic()
>> 100 to pin gfn to pfn, because after gfn_to_pfn_atomic():
137 101
138 A solution for indirect sp could be to pin the !! 102 - We have held the refcount of pfn that means the pfn can not be freed and
139 gfn_to_pfn_memslot_atomic, before the cmpxchg. <<
140 <<
141 - We have held the refcount of pfn; that means <<
142 be reused for another gfn. 103 be reused for another gfn.
143 - The pfn is writable and therefore it cannot !! 104 - The pfn is writable that means it can not be shared between different gfns
144 by KSM. 105 by KSM.
145 106
146 Then, we can ensure the dirty bitmaps is corre 107 Then, we can ensure the dirty bitmaps is correctly set for a gfn.
147 108
>> 109 Currently, to simplify the whole things, we disable fast page fault for
>> 110 indirect shadow page.
>> 111
148 2) Dirty bit tracking 112 2) Dirty bit tracking
149 113
150 In the origin code, the spte can be fast updat 114 In the origin code, the spte can be fast updated (non-atomically) if the
151 spte is read-only and the Accessed bit has alr 115 spte is read-only and the Accessed bit has already been set since the
152 Accessed bit and Dirty bit can not be lost. 116 Accessed bit and Dirty bit can not be lost.
153 117
154 But it is not true after fast page fault since 118 But it is not true after fast page fault since the spte can be marked
155 writable between reading spte and updating spt 119 writable between reading spte and updating spte. Like below case:
156 120
157 +--------------------------------------------- 121 +------------------------------------------------------------------------+
158 | At the beginning:: 122 | At the beginning:: |
159 | 123 | |
160 | spte.W = 0 124 | spte.W = 0 |
161 | spte.Accessed = 1 125 | spte.Accessed = 1 |
162 +------------------------------------+-------- 126 +------------------------------------+-----------------------------------+
163 | CPU 0: | CPU 1: 127 | CPU 0: | CPU 1: |
164 +------------------------------------+-------- 128 +------------------------------------+-----------------------------------+
165 | In mmu_spte_clear_track_bits():: | 129 | In mmu_spte_clear_track_bits():: | |
166 | | 130 | | |
167 | old_spte = *spte; | 131 | old_spte = *spte; | |
168 | | 132 | | |
169 | | 133 | | |
170 | /* 'if' condition is satisfied. */| 134 | /* 'if' condition is satisfied. */| |
171 | if (old_spte.Accessed == 1 && | 135 | if (old_spte.Accessed == 1 && | |
172 | old_spte.W == 0) | 136 | old_spte.W == 0) | |
173 | spte = 0ull; | 137 | spte = 0ull; | |
174 +------------------------------------+-------- 138 +------------------------------------+-----------------------------------+
175 | | on fast 139 | | on fast page fault path:: |
176 | | 140 | | |
177 | | spte 141 | | spte.W = 1 |
178 | | 142 | | |
179 | | memory 143 | | memory write on the spte:: |
180 | | 144 | | |
181 | | spte 145 | | spte.Dirty = 1 |
182 +------------------------------------+-------- 146 +------------------------------------+-----------------------------------+
183 | :: | 147 | :: | |
184 | | 148 | | |
185 | else | 149 | else | |
186 | old_spte = xchg(spte, 0ull) | 150 | old_spte = xchg(spte, 0ull) | |
187 | if (old_spte.Accessed == 1) | 151 | if (old_spte.Accessed == 1) | |
188 | kvm_set_pfn_accessed(spte.pfn);| 152 | kvm_set_pfn_accessed(spte.pfn);| |
189 | if (old_spte.Dirty == 1) | 153 | if (old_spte.Dirty == 1) | |
190 | kvm_set_pfn_dirty(spte.pfn); | 154 | kvm_set_pfn_dirty(spte.pfn); | |
191 | OOPS!!! | 155 | OOPS!!! | |
192 +------------------------------------+-------- 156 +------------------------------------+-----------------------------------+
193 157
194 The Dirty bit is lost in this case. 158 The Dirty bit is lost in this case.
195 159
196 In order to avoid this kind of issue, we alway 160 In order to avoid this kind of issue, we always treat the spte as "volatile"
197 if it can be updated out of mmu-lock [see spte !! 161 if it can be updated out of mmu-lock, see spte_has_volatile_bits(), it means,
198 the spte is always atomically updated in this 162 the spte is always atomically updated in this case.
199 163
200 3) flush tlbs due to spte updated 164 3) flush tlbs due to spte updated
201 165
202 If the spte is updated from writable to read-o !! 166 If the spte is updated from writable to readonly, we should flush all TLBs,
203 otherwise rmap_write_protect will find a read- 167 otherwise rmap_write_protect will find a read-only spte, even though the
204 writable spte might be cached on a CPU's TLB. 168 writable spte might be cached on a CPU's TLB.
205 169
206 As mentioned before, the spte can be updated t 170 As mentioned before, the spte can be updated to writable out of mmu-lock on
207 fast page fault path. In order to easily audit !! 171 fast page fault path, in order to easily audit the path, we see if TLBs need
208 to be flushed caused this reason in mmu_spte_u !! 172 be flushed caused by this reason in mmu_spte_update() since this is a common
209 function to update spte (present -> present). 173 function to update spte (present -> present).
210 174
211 Since the spte is "volatile" if it can be upda 175 Since the spte is "volatile" if it can be updated out of mmu-lock, we always
212 atomically update the spte and the race caused !! 176 atomically update the spte, the race caused by fast page fault can be avoided,
213 See the comments in spte_has_volatile_bits() a 177 See the comments in spte_has_volatile_bits() and mmu_spte_update().
214 178
215 Lockless Access Tracking: 179 Lockless Access Tracking:
216 180
217 This is used for Intel CPUs that are using EPT 181 This is used for Intel CPUs that are using EPT but do not support the EPT A/D
218 bits. In this case, PTEs are tagged as A/D dis !! 182 bits. In this case, when the KVM MMU notifier is called to track accesses to a
219 when the KVM MMU notifier is called to track a !! 183 page (via kvm_mmu_notifier_clear_flush_young), it marks the PTE as not-present
220 kvm_mmu_notifier_clear_flush_young), it marks !! 184 by clearing the RWX bits in the PTE and storing the original R & X bits in
221 by clearing the RWX bits in the PTE and storin !! 185 some unused/ignored bits. In addition, the SPTE_SPECIAL_MASK is also set on the
222 unused/ignored bits. When the VM tries to acce !! 186 PTE (using the ignored bit 62). When the VM tries to access the page later on,
223 generated and the fast page fault mechanism de !! 187 a fault is generated and the fast page fault mechanism described above is used
224 atomically restore the PTE to a Present state. !! 188 to atomically restore the PTE to a Present state. The W bit is not saved when
225 PTE is marked for access tracking and during r !! 189 the PTE is marked for access tracking and during restoration to the Present
226 the W bit is set depending on whether or not i !! 190 state, the W bit is set depending on whether or not it was a write access. If
227 wasn't, then the W bit will remain clear until !! 191 it wasn't, then the W bit will remain clear until a write access happens, at
228 time it will be set using the Dirty tracking m !! 192 which time it will be set using the Dirty tracking mechanism described above.
229 193
230 3. Reference 194 3. Reference
231 ------------ 195 ------------
232 196
233 ``kvm_lock`` !! 197 :Name: kvm_lock
234 ^^^^^^^^^^^^ <<
235 <<
236 :Type: mutex 198 :Type: mutex
237 :Arch: any 199 :Arch: any
238 :Protects: - vm_list 200 :Protects: - vm_list
239 201
240 ``kvm_usage_lock`` !! 202 :Name: kvm_count_lock
241 ^^^^^^^^^^^^^^^^^^ !! 203 :Type: raw_spinlock_t
242 <<
243 :Type: mutex <<
244 :Arch: any 204 :Arch: any
245 :Protects: - kvm_usage_count !! 205 :Protects: - hardware virtualization enable/disable
246 - hardware virtualization enab !! 206 :Comment: 'raw' because hardware enabling/disabling must be atomic /wrt
247 :Comment: Exists to allow taking cpus_re !! 207 migration.
248 protected, which simplifies th <<
249 <<
250 ``kvm->mn_invalidate_lock`` <<
251 ^^^^^^^^^^^^^^^^^^^^^^^^^^^ <<
252 <<
253 :Type: spinlock_t <<
254 :Arch: any <<
255 :Protects: mn_active_invalidate_count, mn <<
256 <<
257 ``kvm_arch::tsc_write_lock`` <<
258 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^ <<
259 208
260 :Type: raw_spinlock_t !! 209 :Name: kvm_arch::tsc_write_lock
>> 210 :Type: raw_spinlock
261 :Arch: x86 211 :Arch: x86
262 :Protects: - kvm_arch::{last_tsc_write,la 212 :Protects: - kvm_arch::{last_tsc_write,last_tsc_nsec,last_tsc_offset}
263 - tsc offset in vmcb 213 - tsc offset in vmcb
264 :Comment: 'raw' because updating the tsc 214 :Comment: 'raw' because updating the tsc offsets must not be preempted.
265 215
266 ``kvm->mmu_lock`` !! 216 :Name: kvm->mmu_lock
267 ^^^^^^^^^^^^^^^^^ !! 217 :Type: spinlock_t
268 :Type: spinlock_t or rwlock_t <<
269 :Arch: any 218 :Arch: any
270 :Protects: -shadow page/shadow tlb entry 219 :Protects: -shadow page/shadow tlb entry
271 :Comment: it is a spinlock since it is u 220 :Comment: it is a spinlock since it is used in mmu notifier.
272 221
273 ``kvm->srcu`` !! 222 :Name: kvm->srcu
274 ^^^^^^^^^^^^^ <<
275 :Type: srcu lock 223 :Type: srcu lock
276 :Arch: any 224 :Arch: any
277 :Protects: - kvm->memslots 225 :Protects: - kvm->memslots
278 - kvm->buses 226 - kvm->buses
279 :Comment: The srcu read lock must be hel 227 :Comment: The srcu read lock must be held while accessing memslots (e.g.
280 when using gfn_to_* functions) 228 when using gfn_to_* functions) and while accessing in-kernel
281 MMIO/PIO address->device struc 229 MMIO/PIO address->device structure mapping (kvm->buses).
282 The srcu index can be stored i 230 The srcu index can be stored in kvm_vcpu->srcu_idx per vcpu
283 if it is needed by multiple fu 231 if it is needed by multiple functions.
284 232
285 ``kvm->slots_arch_lock`` !! 233 :Name: blocked_vcpu_on_cpu_lock
286 ^^^^^^^^^^^^^^^^^^^^^^^^ <<
287 :Type: mutex <<
288 :Arch: any (only needed on x86 though <<
289 :Protects: any arch-specific fields of me <<
290 in a ``kvm->srcu`` read-side c <<
291 :Comment: must be held before reading th <<
292 until after all changes to the <<
293 <<
294 ``wakeup_vcpus_on_cpu_lock`` <<
295 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^ <<
296 :Type: spinlock_t 234 :Type: spinlock_t
297 :Arch: x86 235 :Arch: x86
298 :Protects: wakeup_vcpus_on_cpu !! 236 :Protects: blocked_vcpu_on_cpu
299 :Comment: This is a per-CPU lock and it 237 :Comment: This is a per-CPU lock and it is used for VT-d posted-interrupts.
300 When VT-d posted-interrupts ar !! 238 When VT-d posted-interrupts is supported and the VM has assigned
301 devices, we put the blocked vC 239 devices, we put the blocked vCPU on the list blocked_vcpu_on_cpu
302 protected by blocked_vcpu_on_c !! 240 protected by blocked_vcpu_on_cpu_lock, when VT-d hardware issues
303 wakeup notification event sinc 241 wakeup notification event since external interrupts from the
304 assigned devices happens, we w 242 assigned devices happens, we will find the vCPU on the list to
305 wakeup. 243 wakeup.
306 <<
307 ``vendor_module_lock`` <<
308 ^^^^^^^^^^^^^^^^^^^^^^ <<
309 :Type: mutex <<
310 :Arch: x86 <<
311 :Protects: loading a vendor module (kvm_a <<
312 :Comment: Exists because using kvm_lock <<
313 in notifiers, e.g. __kvmclock_cpufreq_noti <<
314 cpu_hotplug_lock is held, e.g. from cpufre <<
315 operations need to take cpu_hotplug_lock w <<
316 updating static calls. <<
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