1 .. SPDX-License-Identifier: GPL-2.0 1 .. SPDX-License-Identifier: GPL-2.0
2 2
3 ======================================= 3 =======================================
4 Known limitations of CPU virtualization 4 Known limitations of CPU virtualization
5 ======================================= 5 =======================================
6 6
7 Whenever perfect emulation of a CPU feature is 7 Whenever perfect emulation of a CPU feature is impossible or too hard, KVM
8 has to choose between not implementing the fea 8 has to choose between not implementing the feature at all or introducing
9 behavioral differences between virtual machine 9 behavioral differences between virtual machines and bare metal systems.
10 10
11 This file documents some of the known limitati 11 This file documents some of the known limitations that KVM has in
12 virtualizing CPU features. 12 virtualizing CPU features.
13 13
14 x86 14 x86
15 === 15 ===
16 16
17 ``KVM_GET_SUPPORTED_CPUID`` issues 17 ``KVM_GET_SUPPORTED_CPUID`` issues
18 ---------------------------------- 18 ----------------------------------
19 19
20 x87 features 20 x87 features
21 ~~~~~~~~~~~~ 21 ~~~~~~~~~~~~
22 22
23 Unlike most other CPUID feature bits, CPUID[EA 23 Unlike most other CPUID feature bits, CPUID[EAX=7,ECX=0]:EBX[6]
24 (FDP_EXCPTN_ONLY) and CPUID[EAX=7,ECX=0]:EBX]1 24 (FDP_EXCPTN_ONLY) and CPUID[EAX=7,ECX=0]:EBX]13] (ZERO_FCS_FDS) are
25 clear if the features are present and set if t 25 clear if the features are present and set if the features are not present.
26 26
27 Clearing these bits in CPUID has no effect on 27 Clearing these bits in CPUID has no effect on the operation of the guest;
28 if these bits are set on hardware, the feature 28 if these bits are set on hardware, the features will not be present on
29 any virtual machine that runs on that hardware 29 any virtual machine that runs on that hardware.
30 30
31 **Workaround:** It is recommended to always se 31 **Workaround:** It is recommended to always set these bits in guest CPUID.
32 Note however that any software (e.g ``WIN87EM. 32 Note however that any software (e.g ``WIN87EM.DLL``) expecting these features
33 to be present likely predates these CPUID feat 33 to be present likely predates these CPUID feature bits, and therefore
34 doesn't know to check for them anyway. 34 doesn't know to check for them anyway.
35 35
36 Nested virtualization features 36 Nested virtualization features
37 ------------------------------ 37 ------------------------------
38 38
39 TBD 39 TBD
40 40
41 x2APIC 41 x2APIC
42 ------ 42 ------
43 When KVM_X2APIC_API_USE_32BIT_IDS is enabled, 43 When KVM_X2APIC_API_USE_32BIT_IDS is enabled, KVM activates a hack/quirk that
44 allows sending events to a single vCPU using i 44 allows sending events to a single vCPU using its x2APIC ID even if the target
45 vCPU has legacy xAPIC enabled, e.g. to bring u 45 vCPU has legacy xAPIC enabled, e.g. to bring up hotplugged vCPUs via INIT-SIPI
46 on VMs with > 255 vCPUs. A side effect of the 46 on VMs with > 255 vCPUs. A side effect of the quirk is that, if multiple vCPUs
47 have the same physical APIC ID, KVM will deliv 47 have the same physical APIC ID, KVM will deliver events targeting that APIC ID
48 only to the vCPU with the lowest vCPU ID. If 48 only to the vCPU with the lowest vCPU ID. If KVM_X2APIC_API_USE_32BIT_IDS is
49 not enabled, KVM follows x86 architecture when 49 not enabled, KVM follows x86 architecture when processing interrupts (all vCPUs
50 matching the target APIC ID receive the interr 50 matching the target APIC ID receive the interrupt).
51 51
52 MTRRs 52 MTRRs
53 ----- 53 -----
54 KVM does not virtualize guest MTRR memory type 54 KVM does not virtualize guest MTRR memory types. KVM emulates accesses to MTRR
55 MSRs, i.e. {RD,WR}MSR in the guest will behave 55 MSRs, i.e. {RD,WR}MSR in the guest will behave as expected, but KVM does not
56 honor guest MTRRs when determining the effecti 56 honor guest MTRRs when determining the effective memory type, and instead
57 treats all of guest memory as having Writeback 57 treats all of guest memory as having Writeback (WB) MTRRs.
58 58
59 CR0.CD 59 CR0.CD
60 ------ 60 ------
61 KVM does not virtualize CR0.CD on Intel CPUs. 61 KVM does not virtualize CR0.CD on Intel CPUs. Similar to MTRR MSRs, KVM
62 emulates CR0.CD accesses so that loads and sto 62 emulates CR0.CD accesses so that loads and stores from/to CR0 behave as
63 expected, but setting CR0.CD=1 has no impact o 63 expected, but setting CR0.CD=1 has no impact on the cachaeability of guest
64 memory. 64 memory.
65 65
66 Note, this erratum does not affect AMD CPUs, w 66 Note, this erratum does not affect AMD CPUs, which fully virtualize CR0.CD in
67 hardware, i.e. put the CPU caches into "no fil 67 hardware, i.e. put the CPU caches into "no fill" mode when CR0.CD=1, even when
68 running in the guest. 68 running in the guest.
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