1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux 1
2 #ifndef _UAPI__ASM_ALPHA_FPU_H
3 #define _UAPI__ASM_ALPHA_FPU_H
4
5
6 /*
7 * Alpha floating-point control register defin
8 */
9 #define FPCR_DNOD (1UL<<47) /* den
10 #define FPCR_DNZ (1UL<<48) /* den
11 #define FPCR_INVD (1UL<<49) /* inv
12 #define FPCR_DZED (1UL<<50) /* div
13 #define FPCR_OVFD (1UL<<51) /* ove
14 #define FPCR_INV (1UL<<52) /* inv
15 #define FPCR_DZE (1UL<<53) /* div
16 #define FPCR_OVF (1UL<<54) /* ove
17 #define FPCR_UNF (1UL<<55) /* und
18 #define FPCR_INE (1UL<<56) /* ine
19 #define FPCR_IOV (1UL<<57) /* int
20 #define FPCR_UNDZ (1UL<<60) /* und
21 #define FPCR_UNFD (1UL<<61) /* und
22 #define FPCR_INED (1UL<<62) /* ine
23 #define FPCR_SUM (1UL<<63) /* sum
24
25 #define FPCR_DYN_SHIFT 58 /* fir
26 #define FPCR_DYN_CHOPPED (0x0UL << FPCR_DYN_SH
27 #define FPCR_DYN_MINUS (0x1UL << FPCR_DYN_SH
28 #define FPCR_DYN_NORMAL (0x2UL << FPCR_DYN_SH
29 #define FPCR_DYN_PLUS (0x3UL << FPCR_DYN_SH
30 #define FPCR_DYN_MASK (0x3UL << FPCR_DYN_SH
31
32 #define FPCR_MASK 0xffff800000000000L
33
34 /*
35 * IEEE trap enables are implemented in softwa
36 * bits are stored in the "ieee_state" field o
37 * Thus, the bits are defined so as not to con
38 * floating-point enable bit (which is archite
39 * we want to make these bits compatible with
40 * ieee_set_fp_control() etc. can be implement
41 * compatibly. The corresponding definitions
42 * /usr/include/machine/fpu.h under OSF/1.
43 */
44 #define IEEE_TRAP_ENABLE_INV (1UL<<1)
45 #define IEEE_TRAP_ENABLE_DZE (1UL<<2)
46 #define IEEE_TRAP_ENABLE_OVF (1UL<<3)
47 #define IEEE_TRAP_ENABLE_UNF (1UL<<4)
48 #define IEEE_TRAP_ENABLE_INE (1UL<<5)
49 #define IEEE_TRAP_ENABLE_DNO (1UL<<6)
50 #define IEEE_TRAP_ENABLE_MASK (IEEE_TRAP_ENA
51 IEEE_TRAP_ENA
52 IEEE_TRAP_ENA
53
54 /* Denorm and Underflow flushing */
55 #define IEEE_MAP_DMZ (1UL<<12)
56 #define IEEE_MAP_UMZ (1UL<<13)
57
58 #define IEEE_MAP_MASK (IEEE_MAP_DMZ
59
60 /* status bits coming from fpcr: */
61 #define IEEE_STATUS_INV (1UL<<17)
62 #define IEEE_STATUS_DZE (1UL<<18)
63 #define IEEE_STATUS_OVF (1UL<<19)
64 #define IEEE_STATUS_UNF (1UL<<20)
65 #define IEEE_STATUS_INE (1UL<<21)
66 #define IEEE_STATUS_DNO (1UL<<22)
67
68 #define IEEE_STATUS_MASK (IEEE_STATUS_I
69 IEEE_STATUS_O
70 IEEE_STATUS_I
71
72 #define IEEE_SW_MASK (IEEE_TRAP_ENA
73 IEEE_STATUS_M
74
75 #define IEEE_CURRENT_RM_SHIFT 32
76 #define IEEE_CURRENT_RM_MASK (3UL<<IEEE_CUR
77
78 #define IEEE_STATUS_TO_EXCSUM_SHIFT 16
79
80 #define IEEE_INHERIT (1UL<<63) /* inh
81
82 /*
83 * Convert the software IEEE trap enable and s
84 * hardware fpcr format.
85 *
86 * Digital Unix engineers receive my thanks fo
87 * software bits identical to the hardware bit
88 * receive my thanks for making all the not-im
89 * RAZ forcing us to use system calls to read/
90 */
91
92 static inline unsigned long
93 ieee_swcr_to_fpcr(unsigned long sw)
94 {
95 unsigned long fp;
96 fp = (sw & IEEE_STATUS_MASK) << 35;
97 fp |= (sw & IEEE_MAP_DMZ) << 36;
98 fp |= (sw & IEEE_STATUS_MASK ? FPCR_SU
99 fp |= (~sw & (IEEE_TRAP_ENABLE_INV
100 | IEEE_TRAP_ENABLE_DZE
101 | IEEE_TRAP_ENABLE_OVF))
102 fp |= (~sw & (IEEE_TRAP_ENABLE_UNF | I
103 fp |= (sw & IEEE_MAP_UMZ ? FPCR_UNDZ |
104 fp |= (~sw & IEEE_TRAP_ENABLE_DNO) <<
105 return fp;
106 }
107
108 static inline unsigned long
109 ieee_fpcr_to_swcr(unsigned long fp)
110 {
111 unsigned long sw;
112 sw = (fp >> 35) & IEEE_STATUS_MASK;
113 sw |= (fp >> 36) & IEEE_MAP_DMZ;
114 sw |= (~fp >> 48) & (IEEE_TRAP_ENABLE_
115 | IEEE_TRAP_ENABL
116 | IEEE_TRAP_ENABL
117 sw |= (~fp >> 57) & (IEEE_TRAP_ENABLE_
118 sw |= (fp >> 47) & IEEE_MAP_UMZ;
119 sw |= (~fp >> 41) & IEEE_TRAP_ENABLE_D
120 return sw;
121 }
122
123
124 #endif /* _UAPI__ASM_ALPHA_FPU_H */
125
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