1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Generate definitions needed by assembly lan !! 3 * asm-offsets.c: Calculate pt_regs and task_struct offsets.
4 * This code generates raw asm output which is !! 4 *
5 * and format the required data. !! 5 * Copyright (C) 1996 David S. Miller
>> 6 * Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003 Ralf Baechle
>> 7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
>> 8 *
>> 9 * Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
>> 10 * Copyright (C) 2000 MIPS Technologies, Inc.
6 */ 11 */
7 !! 12 #include <linux/compat.h>
8 #include <linux/types.h> 13 #include <linux/types.h>
9 #include <linux/stddef.h> <<
10 #include <linux/sched.h> 14 #include <linux/sched.h>
11 #include <linux/ptrace.h> !! 15 #include <linux/mm.h>
12 #include <linux/kbuild.h> 16 #include <linux/kbuild.h>
13 #include <asm/machvec.h> !! 17 #include <linux/suspend.h>
>> 18 #include <asm/cpu-info.h>
>> 19 #include <asm/pm.h>
>> 20 #include <asm/ptrace.h>
>> 21 #include <asm/processor.h>
>> 22 #include <asm/smp-cps.h>
>> 23
>> 24 #include <linux/kvm_host.h>
>> 25
>> 26 void output_ptreg_defines(void)
>> 27 {
>> 28 COMMENT("MIPS pt_regs offsets.");
>> 29 OFFSET(PT_R0, pt_regs, regs[0]);
>> 30 OFFSET(PT_R1, pt_regs, regs[1]);
>> 31 OFFSET(PT_R2, pt_regs, regs[2]);
>> 32 OFFSET(PT_R3, pt_regs, regs[3]);
>> 33 OFFSET(PT_R4, pt_regs, regs[4]);
>> 34 OFFSET(PT_R5, pt_regs, regs[5]);
>> 35 OFFSET(PT_R6, pt_regs, regs[6]);
>> 36 OFFSET(PT_R7, pt_regs, regs[7]);
>> 37 OFFSET(PT_R8, pt_regs, regs[8]);
>> 38 OFFSET(PT_R9, pt_regs, regs[9]);
>> 39 OFFSET(PT_R10, pt_regs, regs[10]);
>> 40 OFFSET(PT_R11, pt_regs, regs[11]);
>> 41 OFFSET(PT_R12, pt_regs, regs[12]);
>> 42 OFFSET(PT_R13, pt_regs, regs[13]);
>> 43 OFFSET(PT_R14, pt_regs, regs[14]);
>> 44 OFFSET(PT_R15, pt_regs, regs[15]);
>> 45 OFFSET(PT_R16, pt_regs, regs[16]);
>> 46 OFFSET(PT_R17, pt_regs, regs[17]);
>> 47 OFFSET(PT_R18, pt_regs, regs[18]);
>> 48 OFFSET(PT_R19, pt_regs, regs[19]);
>> 49 OFFSET(PT_R20, pt_regs, regs[20]);
>> 50 OFFSET(PT_R21, pt_regs, regs[21]);
>> 51 OFFSET(PT_R22, pt_regs, regs[22]);
>> 52 OFFSET(PT_R23, pt_regs, regs[23]);
>> 53 OFFSET(PT_R24, pt_regs, regs[24]);
>> 54 OFFSET(PT_R25, pt_regs, regs[25]);
>> 55 OFFSET(PT_R26, pt_regs, regs[26]);
>> 56 OFFSET(PT_R27, pt_regs, regs[27]);
>> 57 OFFSET(PT_R28, pt_regs, regs[28]);
>> 58 OFFSET(PT_R29, pt_regs, regs[29]);
>> 59 OFFSET(PT_R30, pt_regs, regs[30]);
>> 60 OFFSET(PT_R31, pt_regs, regs[31]);
>> 61 OFFSET(PT_LO, pt_regs, lo);
>> 62 OFFSET(PT_HI, pt_regs, hi);
>> 63 #ifdef CONFIG_CPU_HAS_SMARTMIPS
>> 64 OFFSET(PT_ACX, pt_regs, acx);
>> 65 #endif
>> 66 OFFSET(PT_EPC, pt_regs, cp0_epc);
>> 67 OFFSET(PT_BVADDR, pt_regs, cp0_badvaddr);
>> 68 OFFSET(PT_STATUS, pt_regs, cp0_status);
>> 69 OFFSET(PT_CAUSE, pt_regs, cp0_cause);
>> 70 #ifdef CONFIG_CPU_CAVIUM_OCTEON
>> 71 OFFSET(PT_MPL, pt_regs, mpl);
>> 72 OFFSET(PT_MTP, pt_regs, mtp);
>> 73 #endif /* CONFIG_CPU_CAVIUM_OCTEON */
>> 74 DEFINE(PT_SIZE, sizeof(struct pt_regs));
>> 75 BLANK();
>> 76 }
>> 77
>> 78 void output_task_defines(void)
>> 79 {
>> 80 COMMENT("MIPS task_struct offsets.");
>> 81 OFFSET(TASK_STATE, task_struct, state);
>> 82 OFFSET(TASK_THREAD_INFO, task_struct, stack);
>> 83 OFFSET(TASK_FLAGS, task_struct, flags);
>> 84 OFFSET(TASK_MM, task_struct, mm);
>> 85 OFFSET(TASK_PID, task_struct, pid);
>> 86 #if defined(CONFIG_STACKPROTECTOR)
>> 87 OFFSET(TASK_STACK_CANARY, task_struct, stack_canary);
>> 88 #endif
>> 89 DEFINE(TASK_STRUCT_SIZE, sizeof(struct task_struct));
>> 90 BLANK();
>> 91 }
>> 92
>> 93 void output_thread_info_defines(void)
>> 94 {
>> 95 COMMENT("MIPS thread_info offsets.");
>> 96 OFFSET(TI_TASK, thread_info, task);
>> 97 OFFSET(TI_FLAGS, thread_info, flags);
>> 98 OFFSET(TI_TP_VALUE, thread_info, tp_value);
>> 99 OFFSET(TI_CPU, thread_info, cpu);
>> 100 OFFSET(TI_PRE_COUNT, thread_info, preempt_count);
>> 101 OFFSET(TI_ADDR_LIMIT, thread_info, addr_limit);
>> 102 OFFSET(TI_REGS, thread_info, regs);
>> 103 DEFINE(_THREAD_SIZE, THREAD_SIZE);
>> 104 DEFINE(_THREAD_MASK, THREAD_MASK);
>> 105 DEFINE(_IRQ_STACK_SIZE, IRQ_STACK_SIZE);
>> 106 DEFINE(_IRQ_STACK_START, IRQ_STACK_START);
>> 107 BLANK();
>> 108 }
>> 109
>> 110 void output_thread_defines(void)
>> 111 {
>> 112 COMMENT("MIPS specific thread_struct offsets.");
>> 113 OFFSET(THREAD_REG16, task_struct, thread.reg16);
>> 114 OFFSET(THREAD_REG17, task_struct, thread.reg17);
>> 115 OFFSET(THREAD_REG18, task_struct, thread.reg18);
>> 116 OFFSET(THREAD_REG19, task_struct, thread.reg19);
>> 117 OFFSET(THREAD_REG20, task_struct, thread.reg20);
>> 118 OFFSET(THREAD_REG21, task_struct, thread.reg21);
>> 119 OFFSET(THREAD_REG22, task_struct, thread.reg22);
>> 120 OFFSET(THREAD_REG23, task_struct, thread.reg23);
>> 121 OFFSET(THREAD_REG29, task_struct, thread.reg29);
>> 122 OFFSET(THREAD_REG30, task_struct, thread.reg30);
>> 123 OFFSET(THREAD_REG31, task_struct, thread.reg31);
>> 124 OFFSET(THREAD_STATUS, task_struct,
>> 125 thread.cp0_status);
>> 126 OFFSET(THREAD_FPU, task_struct, thread.fpu);
14 127
15 static void __used foo(void) !! 128 OFFSET(THREAD_BVADDR, task_struct, \
>> 129 thread.cp0_badvaddr);
>> 130 OFFSET(THREAD_BUADDR, task_struct, \
>> 131 thread.cp0_baduaddr);
>> 132 OFFSET(THREAD_ECODE, task_struct, \
>> 133 thread.error_code);
>> 134 OFFSET(THREAD_TRAPNO, task_struct, thread.trap_nr);
>> 135 BLANK();
>> 136 }
>> 137
>> 138 void output_thread_fpu_defines(void)
16 { 139 {
17 DEFINE(TI_FLAGS, offsetof(struct threa !! 140 OFFSET(THREAD_FPR0, task_struct, thread.fpu.fpr[0]);
18 DEFINE(TI_FP, offsetof(struct thread_i !! 141 OFFSET(THREAD_FPR1, task_struct, thread.fpu.fpr[1]);
19 DEFINE(TI_STATUS, offsetof(struct thre !! 142 OFFSET(THREAD_FPR2, task_struct, thread.fpu.fpr[2]);
>> 143 OFFSET(THREAD_FPR3, task_struct, thread.fpu.fpr[3]);
>> 144 OFFSET(THREAD_FPR4, task_struct, thread.fpu.fpr[4]);
>> 145 OFFSET(THREAD_FPR5, task_struct, thread.fpu.fpr[5]);
>> 146 OFFSET(THREAD_FPR6, task_struct, thread.fpu.fpr[6]);
>> 147 OFFSET(THREAD_FPR7, task_struct, thread.fpu.fpr[7]);
>> 148 OFFSET(THREAD_FPR8, task_struct, thread.fpu.fpr[8]);
>> 149 OFFSET(THREAD_FPR9, task_struct, thread.fpu.fpr[9]);
>> 150 OFFSET(THREAD_FPR10, task_struct, thread.fpu.fpr[10]);
>> 151 OFFSET(THREAD_FPR11, task_struct, thread.fpu.fpr[11]);
>> 152 OFFSET(THREAD_FPR12, task_struct, thread.fpu.fpr[12]);
>> 153 OFFSET(THREAD_FPR13, task_struct, thread.fpu.fpr[13]);
>> 154 OFFSET(THREAD_FPR14, task_struct, thread.fpu.fpr[14]);
>> 155 OFFSET(THREAD_FPR15, task_struct, thread.fpu.fpr[15]);
>> 156 OFFSET(THREAD_FPR16, task_struct, thread.fpu.fpr[16]);
>> 157 OFFSET(THREAD_FPR17, task_struct, thread.fpu.fpr[17]);
>> 158 OFFSET(THREAD_FPR18, task_struct, thread.fpu.fpr[18]);
>> 159 OFFSET(THREAD_FPR19, task_struct, thread.fpu.fpr[19]);
>> 160 OFFSET(THREAD_FPR20, task_struct, thread.fpu.fpr[20]);
>> 161 OFFSET(THREAD_FPR21, task_struct, thread.fpu.fpr[21]);
>> 162 OFFSET(THREAD_FPR22, task_struct, thread.fpu.fpr[22]);
>> 163 OFFSET(THREAD_FPR23, task_struct, thread.fpu.fpr[23]);
>> 164 OFFSET(THREAD_FPR24, task_struct, thread.fpu.fpr[24]);
>> 165 OFFSET(THREAD_FPR25, task_struct, thread.fpu.fpr[25]);
>> 166 OFFSET(THREAD_FPR26, task_struct, thread.fpu.fpr[26]);
>> 167 OFFSET(THREAD_FPR27, task_struct, thread.fpu.fpr[27]);
>> 168 OFFSET(THREAD_FPR28, task_struct, thread.fpu.fpr[28]);
>> 169 OFFSET(THREAD_FPR29, task_struct, thread.fpu.fpr[29]);
>> 170 OFFSET(THREAD_FPR30, task_struct, thread.fpu.fpr[30]);
>> 171 OFFSET(THREAD_FPR31, task_struct, thread.fpu.fpr[31]);
>> 172
>> 173 OFFSET(THREAD_FCR31, task_struct, thread.fpu.fcr31);
>> 174 OFFSET(THREAD_MSA_CSR, task_struct, thread.fpu.msacsr);
20 BLANK(); 175 BLANK();
>> 176 }
21 177
22 DEFINE(SIZEOF_PT_REGS, sizeof(struct p !! 178 void output_mm_defines(void)
>> 179 {
>> 180 COMMENT("Size of struct page");
>> 181 DEFINE(STRUCT_PAGE_SIZE, sizeof(struct page));
>> 182 BLANK();
>> 183 COMMENT("Linux mm_struct offsets.");
>> 184 OFFSET(MM_USERS, mm_struct, mm_users);
>> 185 OFFSET(MM_PGD, mm_struct, pgd);
>> 186 OFFSET(MM_CONTEXT, mm_struct, context);
>> 187 BLANK();
>> 188 DEFINE(_PGD_T_SIZE, sizeof(pgd_t));
>> 189 DEFINE(_PMD_T_SIZE, sizeof(pmd_t));
>> 190 DEFINE(_PTE_T_SIZE, sizeof(pte_t));
23 BLANK(); 191 BLANK();
>> 192 DEFINE(_PGD_T_LOG2, PGD_T_LOG2);
>> 193 #ifndef __PAGETABLE_PMD_FOLDED
>> 194 DEFINE(_PMD_T_LOG2, PMD_T_LOG2);
>> 195 #endif
>> 196 DEFINE(_PTE_T_LOG2, PTE_T_LOG2);
>> 197 BLANK();
>> 198 DEFINE(_PGD_ORDER, PGD_ORDER);
>> 199 #ifndef __PAGETABLE_PMD_FOLDED
>> 200 DEFINE(_PMD_ORDER, PMD_ORDER);
>> 201 #endif
>> 202 DEFINE(_PTE_ORDER, PTE_ORDER);
>> 203 BLANK();
>> 204 DEFINE(_PMD_SHIFT, PMD_SHIFT);
>> 205 DEFINE(_PGDIR_SHIFT, PGDIR_SHIFT);
>> 206 BLANK();
>> 207 DEFINE(_PTRS_PER_PGD, PTRS_PER_PGD);
>> 208 DEFINE(_PTRS_PER_PMD, PTRS_PER_PMD);
>> 209 DEFINE(_PTRS_PER_PTE, PTRS_PER_PTE);
>> 210 BLANK();
>> 211 DEFINE(_PAGE_SHIFT, PAGE_SHIFT);
>> 212 DEFINE(_PAGE_SIZE, PAGE_SIZE);
>> 213 BLANK();
>> 214 }
>> 215
>> 216 #ifdef CONFIG_32BIT
>> 217 void output_sc_defines(void)
>> 218 {
>> 219 COMMENT("Linux sigcontext offsets.");
>> 220 OFFSET(SC_REGS, sigcontext, sc_regs);
>> 221 OFFSET(SC_FPREGS, sigcontext, sc_fpregs);
>> 222 OFFSET(SC_ACX, sigcontext, sc_acx);
>> 223 OFFSET(SC_MDHI, sigcontext, sc_mdhi);
>> 224 OFFSET(SC_MDLO, sigcontext, sc_mdlo);
>> 225 OFFSET(SC_PC, sigcontext, sc_pc);
>> 226 OFFSET(SC_FPC_CSR, sigcontext, sc_fpc_csr);
>> 227 OFFSET(SC_FPC_EIR, sigcontext, sc_fpc_eir);
>> 228 OFFSET(SC_HI1, sigcontext, sc_hi1);
>> 229 OFFSET(SC_LO1, sigcontext, sc_lo1);
>> 230 OFFSET(SC_HI2, sigcontext, sc_hi2);
>> 231 OFFSET(SC_LO2, sigcontext, sc_lo2);
>> 232 OFFSET(SC_HI3, sigcontext, sc_hi3);
>> 233 OFFSET(SC_LO3, sigcontext, sc_lo3);
>> 234 BLANK();
>> 235 }
>> 236 #endif
>> 237
>> 238 #ifdef CONFIG_64BIT
>> 239 void output_sc_defines(void)
>> 240 {
>> 241 COMMENT("Linux sigcontext offsets.");
>> 242 OFFSET(SC_REGS, sigcontext, sc_regs);
>> 243 OFFSET(SC_FPREGS, sigcontext, sc_fpregs);
>> 244 OFFSET(SC_MDHI, sigcontext, sc_mdhi);
>> 245 OFFSET(SC_MDLO, sigcontext, sc_mdlo);
>> 246 OFFSET(SC_PC, sigcontext, sc_pc);
>> 247 OFFSET(SC_FPC_CSR, sigcontext, sc_fpc_csr);
>> 248 BLANK();
>> 249 }
>> 250 #endif
>> 251
>> 252 void output_signal_defined(void)
>> 253 {
>> 254 COMMENT("Linux signal numbers.");
>> 255 DEFINE(_SIGHUP, SIGHUP);
>> 256 DEFINE(_SIGINT, SIGINT);
>> 257 DEFINE(_SIGQUIT, SIGQUIT);
>> 258 DEFINE(_SIGILL, SIGILL);
>> 259 DEFINE(_SIGTRAP, SIGTRAP);
>> 260 DEFINE(_SIGIOT, SIGIOT);
>> 261 DEFINE(_SIGABRT, SIGABRT);
>> 262 DEFINE(_SIGEMT, SIGEMT);
>> 263 DEFINE(_SIGFPE, SIGFPE);
>> 264 DEFINE(_SIGKILL, SIGKILL);
>> 265 DEFINE(_SIGBUS, SIGBUS);
>> 266 DEFINE(_SIGSEGV, SIGSEGV);
>> 267 DEFINE(_SIGSYS, SIGSYS);
>> 268 DEFINE(_SIGPIPE, SIGPIPE);
>> 269 DEFINE(_SIGALRM, SIGALRM);
>> 270 DEFINE(_SIGTERM, SIGTERM);
>> 271 DEFINE(_SIGUSR1, SIGUSR1);
>> 272 DEFINE(_SIGUSR2, SIGUSR2);
>> 273 DEFINE(_SIGCHLD, SIGCHLD);
>> 274 DEFINE(_SIGPWR, SIGPWR);
>> 275 DEFINE(_SIGWINCH, SIGWINCH);
>> 276 DEFINE(_SIGURG, SIGURG);
>> 277 DEFINE(_SIGIO, SIGIO);
>> 278 DEFINE(_SIGSTOP, SIGSTOP);
>> 279 DEFINE(_SIGTSTP, SIGTSTP);
>> 280 DEFINE(_SIGCONT, SIGCONT);
>> 281 DEFINE(_SIGTTIN, SIGTTIN);
>> 282 DEFINE(_SIGTTOU, SIGTTOU);
>> 283 DEFINE(_SIGVTALRM, SIGVTALRM);
>> 284 DEFINE(_SIGPROF, SIGPROF);
>> 285 DEFINE(_SIGXCPU, SIGXCPU);
>> 286 DEFINE(_SIGXFSZ, SIGXFSZ);
>> 287 BLANK();
>> 288 }
>> 289
>> 290 #ifdef CONFIG_CPU_CAVIUM_OCTEON
>> 291 void output_octeon_cop2_state_defines(void)
>> 292 {
>> 293 COMMENT("Octeon specific octeon_cop2_state offsets.");
>> 294 OFFSET(OCTEON_CP2_CRC_IV, octeon_cop2_state, cop2_crc_iv);
>> 295 OFFSET(OCTEON_CP2_CRC_LENGTH, octeon_cop2_state, cop2_crc_length);
>> 296 OFFSET(OCTEON_CP2_CRC_POLY, octeon_cop2_state, cop2_crc_poly);
>> 297 OFFSET(OCTEON_CP2_LLM_DAT, octeon_cop2_state, cop2_llm_dat);
>> 298 OFFSET(OCTEON_CP2_3DES_IV, octeon_cop2_state, cop2_3des_iv);
>> 299 OFFSET(OCTEON_CP2_3DES_KEY, octeon_cop2_state, cop2_3des_key);
>> 300 OFFSET(OCTEON_CP2_3DES_RESULT, octeon_cop2_state, cop2_3des_result);
>> 301 OFFSET(OCTEON_CP2_AES_INP0, octeon_cop2_state, cop2_aes_inp0);
>> 302 OFFSET(OCTEON_CP2_AES_IV, octeon_cop2_state, cop2_aes_iv);
>> 303 OFFSET(OCTEON_CP2_AES_KEY, octeon_cop2_state, cop2_aes_key);
>> 304 OFFSET(OCTEON_CP2_AES_KEYLEN, octeon_cop2_state, cop2_aes_keylen);
>> 305 OFFSET(OCTEON_CP2_AES_RESULT, octeon_cop2_state, cop2_aes_result);
>> 306 OFFSET(OCTEON_CP2_GFM_MULT, octeon_cop2_state, cop2_gfm_mult);
>> 307 OFFSET(OCTEON_CP2_GFM_POLY, octeon_cop2_state, cop2_gfm_poly);
>> 308 OFFSET(OCTEON_CP2_GFM_RESULT, octeon_cop2_state, cop2_gfm_result);
>> 309 OFFSET(OCTEON_CP2_HSH_DATW, octeon_cop2_state, cop2_hsh_datw);
>> 310 OFFSET(OCTEON_CP2_HSH_IVW, octeon_cop2_state, cop2_hsh_ivw);
>> 311 OFFSET(OCTEON_CP2_SHA3, octeon_cop2_state, cop2_sha3);
>> 312 OFFSET(THREAD_CP2, task_struct, thread.cp2);
>> 313 OFFSET(THREAD_CVMSEG, task_struct, thread.cvmseg.cvmseg);
>> 314 BLANK();
>> 315 }
>> 316 #endif
>> 317
>> 318 #ifdef CONFIG_HIBERNATION
>> 319 void output_pbe_defines(void)
>> 320 {
>> 321 COMMENT(" Linux struct pbe offsets. ");
>> 322 OFFSET(PBE_ADDRESS, pbe, address);
>> 323 OFFSET(PBE_ORIG_ADDRESS, pbe, orig_address);
>> 324 OFFSET(PBE_NEXT, pbe, next);
>> 325 DEFINE(PBE_SIZE, sizeof(struct pbe));
>> 326 BLANK();
>> 327 }
>> 328 #endif
>> 329
>> 330 #ifdef CONFIG_CPU_PM
>> 331 void output_pm_defines(void)
>> 332 {
>> 333 COMMENT(" PM offsets. ");
>> 334 #ifdef CONFIG_EVA
>> 335 OFFSET(SSS_SEGCTL0, mips_static_suspend_state, segctl[0]);
>> 336 OFFSET(SSS_SEGCTL1, mips_static_suspend_state, segctl[1]);
>> 337 OFFSET(SSS_SEGCTL2, mips_static_suspend_state, segctl[2]);
>> 338 #endif
>> 339 OFFSET(SSS_SP, mips_static_suspend_state, sp);
>> 340 BLANK();
>> 341 }
>> 342 #endif
>> 343
>> 344 void output_kvm_defines(void)
>> 345 {
>> 346 COMMENT(" KVM/MIPS Specific offsets. ");
>> 347
>> 348 OFFSET(VCPU_FPR0, kvm_vcpu_arch, fpu.fpr[0]);
>> 349 OFFSET(VCPU_FPR1, kvm_vcpu_arch, fpu.fpr[1]);
>> 350 OFFSET(VCPU_FPR2, kvm_vcpu_arch, fpu.fpr[2]);
>> 351 OFFSET(VCPU_FPR3, kvm_vcpu_arch, fpu.fpr[3]);
>> 352 OFFSET(VCPU_FPR4, kvm_vcpu_arch, fpu.fpr[4]);
>> 353 OFFSET(VCPU_FPR5, kvm_vcpu_arch, fpu.fpr[5]);
>> 354 OFFSET(VCPU_FPR6, kvm_vcpu_arch, fpu.fpr[6]);
>> 355 OFFSET(VCPU_FPR7, kvm_vcpu_arch, fpu.fpr[7]);
>> 356 OFFSET(VCPU_FPR8, kvm_vcpu_arch, fpu.fpr[8]);
>> 357 OFFSET(VCPU_FPR9, kvm_vcpu_arch, fpu.fpr[9]);
>> 358 OFFSET(VCPU_FPR10, kvm_vcpu_arch, fpu.fpr[10]);
>> 359 OFFSET(VCPU_FPR11, kvm_vcpu_arch, fpu.fpr[11]);
>> 360 OFFSET(VCPU_FPR12, kvm_vcpu_arch, fpu.fpr[12]);
>> 361 OFFSET(VCPU_FPR13, kvm_vcpu_arch, fpu.fpr[13]);
>> 362 OFFSET(VCPU_FPR14, kvm_vcpu_arch, fpu.fpr[14]);
>> 363 OFFSET(VCPU_FPR15, kvm_vcpu_arch, fpu.fpr[15]);
>> 364 OFFSET(VCPU_FPR16, kvm_vcpu_arch, fpu.fpr[16]);
>> 365 OFFSET(VCPU_FPR17, kvm_vcpu_arch, fpu.fpr[17]);
>> 366 OFFSET(VCPU_FPR18, kvm_vcpu_arch, fpu.fpr[18]);
>> 367 OFFSET(VCPU_FPR19, kvm_vcpu_arch, fpu.fpr[19]);
>> 368 OFFSET(VCPU_FPR20, kvm_vcpu_arch, fpu.fpr[20]);
>> 369 OFFSET(VCPU_FPR21, kvm_vcpu_arch, fpu.fpr[21]);
>> 370 OFFSET(VCPU_FPR22, kvm_vcpu_arch, fpu.fpr[22]);
>> 371 OFFSET(VCPU_FPR23, kvm_vcpu_arch, fpu.fpr[23]);
>> 372 OFFSET(VCPU_FPR24, kvm_vcpu_arch, fpu.fpr[24]);
>> 373 OFFSET(VCPU_FPR25, kvm_vcpu_arch, fpu.fpr[25]);
>> 374 OFFSET(VCPU_FPR26, kvm_vcpu_arch, fpu.fpr[26]);
>> 375 OFFSET(VCPU_FPR27, kvm_vcpu_arch, fpu.fpr[27]);
>> 376 OFFSET(VCPU_FPR28, kvm_vcpu_arch, fpu.fpr[28]);
>> 377 OFFSET(VCPU_FPR29, kvm_vcpu_arch, fpu.fpr[29]);
>> 378 OFFSET(VCPU_FPR30, kvm_vcpu_arch, fpu.fpr[30]);
>> 379 OFFSET(VCPU_FPR31, kvm_vcpu_arch, fpu.fpr[31]);
>> 380
>> 381 OFFSET(VCPU_FCR31, kvm_vcpu_arch, fpu.fcr31);
>> 382 OFFSET(VCPU_MSA_CSR, kvm_vcpu_arch, fpu.msacsr);
>> 383 BLANK();
>> 384 }
>> 385
>> 386 #ifdef CONFIG_MIPS_CPS
>> 387 void output_cps_defines(void)
>> 388 {
>> 389 COMMENT(" MIPS CPS offsets. ");
>> 390
>> 391 OFFSET(COREBOOTCFG_VPEMASK, core_boot_config, vpe_mask);
>> 392 OFFSET(COREBOOTCFG_VPECONFIG, core_boot_config, vpe_config);
>> 393 DEFINE(COREBOOTCFG_SIZE, sizeof(struct core_boot_config));
24 394
25 DEFINE(HAE_CACHE, offsetof(struct alph !! 395 OFFSET(VPEBOOTCFG_PC, vpe_boot_config, pc);
26 DEFINE(HAE_REG, offsetof(struct alpha_ !! 396 OFFSET(VPEBOOTCFG_SP, vpe_boot_config, sp);
>> 397 OFFSET(VPEBOOTCFG_GP, vpe_boot_config, gp);
>> 398 DEFINE(VPEBOOTCFG_SIZE, sizeof(struct vpe_boot_config));
27 } 399 }
>> 400 #endif
28 401
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