1 /* SPDX-License-Identifier: GPL-2.0 */ 1
2 /*
3 * linux/arch/alpha/kernel/machvec_impl.h
4 *
5 * Copyright (C) 1997, 1998 Richard Hend
6 *
7 * This file has goodies to help simplify inst
8 */
9
10 /* Whee. These systems don't have an HAE:
11 IRONGATE, MARVEL, POLARIS, TSUNAMI, TIT
12 Fix things up for the GENERIC kernel by def
13 to be that of the cache. Now we can read an
14 #define IRONGATE_HAE_ADDRESS (&alpha_mv.hae
15 #define MARVEL_HAE_ADDRESS (&alpha_mv.hae
16 #define POLARIS_HAE_ADDRESS (&alpha_mv.hae
17 #define TSUNAMI_HAE_ADDRESS (&alpha_mv.hae
18 #define TITAN_HAE_ADDRESS (&alpha_mv.hae
19 #define WILDFIRE_HAE_ADDRESS (&alpha_mv.hae
20
21 #ifdef CIA_ONE_HAE_WINDOW
22 #define CIA_HAE_ADDRESS (&alpha_mv.hae
23 #endif
24 #ifdef MCPCIA_ONE_HAE_WINDOW
25 #define MCPCIA_HAE_ADDRESS (&alpha_mv.hae
26 #endif
27 #ifdef T2_ONE_HAE_WINDOW
28 #define T2_HAE_ADDRESS (&alpha_mv.hae
29 #endif
30
31 /* Only a few systems don't define IACK_SC, ha
32 the SRM console. But splitting out that on
33 seems like such a pain. Define this to get
34 #define JENSEN_IACK_SC 1
35 #define T2_IACK_SC 1
36 #define WILDFIRE_IACK_SC 1 /* FIXME */
37
38 /*
39 * Some helpful macros for filling in the blan
40 */
41
42 #define CAT1(x,y) x##y
43 #define CAT(x,y) CAT1(x,y)
44
45 #define DO_DEFAULT_RTC .rtc_p
46
47 #define DO_EV5_MMU
48 .max_asn = EV5_MA
49
50 #define DO_EV6_MMU
51 .max_asn = EV6_MA
52
53 #define DO_EV7_MMU
54 .max_asn = EV6_MA
55
56 #define IO_LITE(UP,low)
57 .hae_register = (unsigned long
58 .iack_sc = CAT(UP,_IACK_S
59 .mv_ioread8 = CAT(low,_iorea
60 .mv_ioread16 = CAT(low,_iorea
61 .mv_ioread32 = CAT(low,_iorea
62 .mv_ioread64 = CAT(low,_iorea
63 .mv_iowrite8 = CAT(low,_iowri
64 .mv_iowrite16 = CAT(low,_iowri
65 .mv_iowrite32 = CAT(low,_iowri
66 .mv_iowrite64 = CAT(low,_iowri
67 .mv_readb = CAT(low,_readb
68 .mv_readw = CAT(low,_readw
69 .mv_readl = CAT(low,_readl
70 .mv_readq = CAT(low,_readq
71 .mv_writeb = CAT(low,_write
72 .mv_writew = CAT(low,_write
73 .mv_writel = CAT(low,_write
74 .mv_writeq = CAT(low,_write
75 .mv_ioportmap = CAT(low,_iopor
76 .mv_ioremap = CAT(low,_iorem
77 .mv_iounmap = CAT(low,_iounm
78 .mv_is_ioaddr = CAT(low,_is_io
79 .mv_is_mmio = CAT(low,_is_mm
80
81 #define IO(UP,low)
82 IO_LITE(UP,low),
83 .pci_ops = &CAT(low,_pci_
84 .mv_pci_tbi = CAT(low,_pci_t
85
86 #define DO_APECS_IO IO(APECS,apecs)
87 #define DO_CIA_IO IO(CIA,cia)
88 #define DO_IRONGATE_IO IO(IRONGATE,irongate)
89 #define DO_LCA_IO IO(LCA,lca)
90 #define DO_MARVEL_IO IO(MARVEL,marvel)
91 #define DO_MCPCIA_IO IO(MCPCIA,mcpcia)
92 #define DO_POLARIS_IO IO(POLARIS,polaris)
93 #define DO_T2_IO IO(T2,t2)
94 #define DO_TSUNAMI_IO IO(TSUNAMI,tsunami)
95 #define DO_TITAN_IO IO(TITAN,titan)
96 #define DO_WILDFIRE_IO IO(WILDFIRE,wildfire)
97
98 #define DO_PYXIS_IO IO_LITE(CIA,cia_bwx),
99 .pci_ops = &cia_pci_op
100 .mv_pci_tbi = cia_pci_
101
102 /*
103 * In a GENERIC kernel, we have lots of these
104 * all but one of which we want to go away. I
105 * we want only one, ever.
106 *
107 * Accomplish this in the GENERIC kernel by pu
108 * in the .init.data section where they'll go
109 * one we want to the real alpha_mv vector in
110 *
111 * Accomplish this in a non-GENERIC kernel by
112 * one of the vectors, which will not reside i
113 * alias this one vector to alpha_mv, so no co
114 *
115 * Upshot: set __initdata to nothing for non-G
116 */
117
118 #ifdef CONFIG_ALPHA_GENERIC
119 #define __initmv __initdata
120 #define ALIAS_MV(x)
121 #else
122 #define __initmv __refdata
123
124 /* GCC actually has a syntax for defining alia
125 delusion that you shouldn't be able to decl
126 else beforehand. Fine. We'll do it oursel
127 #if 0
128 #define ALIAS_MV(system) \
129 struct alpha_machine_vector alpha_mv __attri
130 EXPORT_SYMBOL(alpha_mv);
131 #else
132 #define ALIAS_MV(system) \
133 asm(".global alpha_mv\nalpha_mv = " #system
134 EXPORT_SYMBOL(alpha_mv);
135 #endif
136 #endif /* GENERIC */
137
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