1 /* SPDX-License-Identifier: GPL-2.0 */ 1 /* SPDX-License-Identifier: GPL-2.0 */
>> 2 #include <asm/asm-offsets.h>
>> 3 #include <asm/thread_info.h>
>> 4
>> 5 #define PAGE_SIZE _PAGE_SIZE
>> 6
>> 7 /*
>> 8 * Put .bss..swapper_pg_dir as the first thing in .bss. This will
>> 9 * ensure that it has .bss alignment (64K).
>> 10 */
>> 11 #define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
2 12
>> 13 /* Cavium Octeon should not have a separate PT_NOTE Program Header. */
>> 14 #ifndef CONFIG_CAVIUM_OCTEON_SOC
3 #define EMITS_PT_NOTE 15 #define EMITS_PT_NOTE
4 #define RO_EXCEPTION_TABLE_ALIGN 16 !! 16 #endif
>> 17
>> 18 #define RUNTIME_DISCARD_EXIT
5 19
6 #include <asm-generic/vmlinux.lds.h> 20 #include <asm-generic/vmlinux.lds.h>
7 #include <asm/thread_info.h> !! 21
8 #include <asm/cache.h> !! 22 #undef mips
9 #include <asm/page.h> !! 23 #define mips mips
10 #include <asm/setup.h> !! 24 OUTPUT_ARCH(mips)
11 !! 25 ENTRY(kernel_entry)
12 OUTPUT_FORMAT("elf64-alpha") !! 26 PHDRS {
13 OUTPUT_ARCH(alpha) !! 27 text PT_LOAD FLAGS(7); /* RWX */
14 ENTRY(__start) !! 28 #ifndef CONFIG_CAVIUM_OCTEON_SOC
15 PHDRS { text PT_LOAD; note PT_NOTE; } !! 29 note PT_NOTE FLAGS(4); /* R__ */
16 jiffies = jiffies_64; !! 30 #endif /* CAVIUM_OCTEON_SOC */
17 SECTIONS !! 31 }
18 { !! 32
19 #ifdef CONFIG_ALPHA_LEGACY_START_ADDRESS !! 33 #ifdef CONFIG_32BIT
20 . = 0xfffffc0000310000; !! 34 #ifdef CONFIG_CPU_LITTLE_ENDIAN
>> 35 jiffies = jiffies_64;
>> 36 #else
>> 37 jiffies = jiffies_64 + 4;
>> 38 #endif
21 #else 39 #else
22 . = 0xfffffc0001010000; !! 40 jiffies = jiffies_64;
23 #endif 41 #endif
24 42
>> 43 SECTIONS
>> 44 {
>> 45 #ifdef CONFIG_BOOT_ELF64
>> 46 /* Read-only sections, merged into text segment: */
>> 47 /* . = 0xc000000000000000; */
>> 48
>> 49 /* This is the value for an Origin kernel, taken from an IRIX kernel. */
>> 50 /* . = 0xc00000000001c000; */
>> 51
>> 52 /* Set the vaddr for the text segment to a value
>> 53 * >= 0xa800 0000 0001 9000 if no symmon is going to configured
>> 54 * >= 0xa800 0000 0030 0000 otherwise
>> 55 */
>> 56
>> 57 /* . = 0xa800000000300000; */
>> 58 . = 0xffffffff80300000;
>> 59 #endif
>> 60 . = LINKER_LOAD_ADDRESS;
>> 61 /* read-only */
25 _text = .; /* Text and read-only 62 _text = .; /* Text and read-only data */
26 .text : { 63 .text : {
27 HEAD_TEXT <<
28 TEXT_TEXT 64 TEXT_TEXT
29 SCHED_TEXT 65 SCHED_TEXT
30 LOCK_TEXT 66 LOCK_TEXT
>> 67 KPROBES_TEXT
>> 68 IRQENTRY_TEXT
>> 69 SOFTIRQENTRY_TEXT
31 *(.fixup) 70 *(.fixup)
32 *(.gnu.warning) 71 *(.gnu.warning)
33 } :text !! 72 . = ALIGN(16);
34 swapper_pg_dir = SWAPPER_PGD; !! 73 *(.got) /* Global offset table */
>> 74 } :text = 0
35 _etext = .; /* End of text section 75 _etext = .; /* End of text section */
36 76
>> 77 EXCEPTION_TABLE(16)
>> 78
>> 79 /* Exception table for data bus errors */
>> 80 __dbe_table : {
>> 81 __start___dbe_table = .;
>> 82 KEEP(*(__dbe_table))
>> 83 __stop___dbe_table = .;
>> 84 }
>> 85
>> 86 _sdata = .; /* Start of data section */
37 RO_DATA(4096) 87 RO_DATA(4096)
38 88
39 /* Will be freed after init */ !! 89 /* writeable */
40 __init_begin = ALIGN(PAGE_SIZE); !! 90 .data : { /* Data */
>> 91 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */
>> 92
>> 93 INIT_TASK_DATA(THREAD_SIZE)
>> 94 NOSAVE_DATA
>> 95 PAGE_ALIGNED_DATA(PAGE_SIZE)
>> 96 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
>> 97 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
>> 98 DATA_DATA
>> 99 CONSTRUCTORS
>> 100 }
>> 101 BUG_TABLE
>> 102 _gp = . + 0x8000;
>> 103 .lit8 : {
>> 104 *(.lit8)
>> 105 }
>> 106 .lit4 : {
>> 107 *(.lit4)
>> 108 }
>> 109 /* We want the small data sections together, so single-instruction offsets
>> 110 can access them all, and initialized data all before uninitialized, so
>> 111 we can shorten the on-disk segment size. */
>> 112 .sdata : {
>> 113 *(.sdata)
>> 114 }
>> 115 _edata = .; /* End of data section */
>> 116
>> 117 /* will be freed after init */
>> 118 . = ALIGN(PAGE_SIZE); /* Init code and data */
>> 119 __init_begin = .;
41 INIT_TEXT_SECTION(PAGE_SIZE) 120 INIT_TEXT_SECTION(PAGE_SIZE)
42 INIT_DATA_SECTION(16) 121 INIT_DATA_SECTION(16)
43 PERCPU_SECTION(L1_CACHE_BYTES) <<
44 /* Align to THREAD_SIZE rather than PA <<
45 needed for the THREAD_SIZE aligned <<
46 . = ALIGN(THREAD_SIZE); <<
47 __init_end = .; <<
48 /* Freed after init ends here */ <<
49 122
50 _sdata = .; /* Start of rw data se !! 123 . = ALIGN(4);
51 _data = .; !! 124 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
52 RW_DATA(L1_CACHE_BYTES, PAGE_SIZE, THR !! 125 __mips_machines_start = .;
>> 126 KEEP(*(.mips.machines.init))
>> 127 __mips_machines_end = .;
>> 128 }
53 129
54 .got : { !! 130 /* .exit.text is discarded at runtime, not link time, to deal with
55 *(.got) !! 131 * references from .rodata
>> 132 */
>> 133 .exit.text : {
>> 134 EXIT_TEXT
56 } 135 }
57 .sdata : { !! 136 .exit.data : {
58 *(.sdata) !! 137 EXIT_DATA
59 } 138 }
60 _edata = .; /* End of data section !! 139 #ifdef CONFIG_SMP
>> 140 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
>> 141 #endif
61 142
62 BSS_SECTION(0, 0, 0) !! 143 .rel.dyn : ALIGN(8) {
63 _end = .; !! 144 *(.rel)
>> 145 *(.rel*)
>> 146 }
64 147
65 .mdebug 0 : { !! 148 #ifdef CONFIG_MIPS_ELF_APPENDED_DTB
66 *(.mdebug) !! 149 STRUCT_ALIGN();
>> 150 .appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) {
>> 151 *(.appended_dtb)
>> 152 KEEP(*(.appended_dtb))
>> 153 }
>> 154 #endif
>> 155
>> 156 #ifdef CONFIG_RELOCATABLE
>> 157 . = ALIGN(4);
>> 158
>> 159 .data.reloc : {
>> 160 _relocation_start = .;
>> 161 /*
>> 162 * Space for relocation table
>> 163 * This needs to be filled so that the
>> 164 * relocs tool can overwrite the content.
>> 165 * An invalid value is left at the start of the
>> 166 * section to abort relocation if the table
>> 167 * has not been filled in.
>> 168 */
>> 169 LONG(0xFFFFFFFF);
>> 170 FILL(0);
>> 171 . += CONFIG_RELOCATION_TABLE_SIZE - 4;
>> 172 _relocation_end = .;
>> 173 }
>> 174 #endif
>> 175
>> 176 #ifdef CONFIG_MIPS_RAW_APPENDED_DTB
>> 177 .fill : {
>> 178 FILL(0);
>> 179 BYTE(0);
>> 180 STRUCT_ALIGN();
>> 181 }
>> 182 __appended_dtb = .;
>> 183 /* leave space for appended DTB */
>> 184 . += 0x100000;
>> 185 #endif
>> 186 /*
>> 187 * Align to 64K in attempt to eliminate holes before the
>> 188 * .bss..swapper_pg_dir section at the start of .bss. This
>> 189 * also satisfies PAGE_SIZE alignment as the largest page size
>> 190 * allowed is 64K.
>> 191 */
>> 192 . = ALIGN(0x10000);
>> 193 __init_end = .;
>> 194 /* freed after init ends here */
>> 195
>> 196 /*
>> 197 * Force .bss to 64K alignment so that .bss..swapper_pg_dir
>> 198 * gets that alignment. .sbss should be empty, so there will be
>> 199 * no holes after __init_end. */
>> 200 BSS_SECTION(0, 0x10000, 8)
>> 201
>> 202 _end = . ;
>> 203
>> 204 /* These mark the ABI of the kernel for debuggers. */
>> 205 .mdebug.abi32 : {
>> 206 KEEP(*(.mdebug.abi32))
>> 207 }
>> 208 .mdebug.abi64 : {
>> 209 KEEP(*(.mdebug.abi64))
67 } 210 }
68 .note 0 : { !! 211
69 *(.note) !! 212 /* This is the MIPS specific mdebug section. */
>> 213 .mdebug : {
>> 214 *(.mdebug)
70 } 215 }
71 216
72 STABS_DEBUG 217 STABS_DEBUG
73 DWARF_DEBUG 218 DWARF_DEBUG
74 ELF_DETAILS 219 ELF_DETAILS
75 220
>> 221 /* These must appear regardless of . */
>> 222 .gptab.sdata : {
>> 223 *(.gptab.data)
>> 224 *(.gptab.sdata)
>> 225 }
>> 226 .gptab.sbss : {
>> 227 *(.gptab.bss)
>> 228 *(.gptab.sbss)
>> 229 }
>> 230
>> 231 /* Sections to be discarded */
76 DISCARDS 232 DISCARDS
>> 233 /DISCARD/ : {
>> 234 /* ABI crap starts here */
>> 235 *(.MIPS.abiflags)
>> 236 *(.MIPS.options)
>> 237 *(.gnu.attributes)
>> 238 *(.options)
>> 239 *(.pdr)
>> 240 *(.reginfo)
>> 241 }
77 } 242 }
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