1 # SPDX-License-Identifier: GPL-2.0-only !! 1 # SPDX-License-Identifier: GPL-2.0 2 # !! 2 config M68K 3 # Copyright (C) 2004, 2007-2010, 2011-2012 Syn !! 3 bool 4 # !! 4 default y 5 << 6 config ARC << 7 def_bool y << 8 select ARC_TIMERS << 9 select ARCH_HAS_CACHE_LINE_SIZE << 10 select ARCH_HAS_DEBUG_VM_PGTABLE << 11 select ARCH_HAS_DMA_PREP_COHERENT << 12 select ARCH_HAS_PTE_SPECIAL << 13 select ARCH_HAS_SETUP_DMA_OPS << 14 select ARCH_HAS_SYNC_DMA_FOR_CPU << 15 select ARCH_HAS_SYNC_DMA_FOR_DEVICE << 16 select ARCH_NEED_CMPXCHG_1_EMU << 17 select ARCH_SUPPORTS_ATOMIC_RMW if ARC << 18 select ARCH_32BIT_OFF_T 5 select ARCH_32BIT_OFF_T 19 select BUILDTIME_TABLE_SORT !! 6 select ARCH_HAS_BINFMT_FLAT 20 select CLONE_BACKWARDS !! 7 select ARCH_HAS_CPU_FINALIZE_INIT if MMU 21 select COMMON_CLK !! 8 select ARCH_HAS_CURRENT_STACK_POINTER 22 select DMA_DIRECT_REMAP !! 9 select ARCH_HAS_DMA_PREP_COHERENT if M68K_NONCOHERENT_DMA && !COLDFIRE 23 select GENERIC_ATOMIC64 if !ISA_ARCV2 !! 10 select ARCH_HAS_SYNC_DMA_FOR_DEVICE if M68K_NONCOHERENT_DMA 24 # for now, we don't need GENERIC_IRQ_P !! 11 select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS >> 12 select ARCH_MIGHT_HAVE_PC_PARPORT if ISA >> 13 select ARCH_NO_PREEMPT if !COLDFIRE >> 14 select ARCH_USE_MEMTEST if MMU_MOTOROLA >> 15 select ARCH_WANT_IPC_PARSE_VERSION >> 16 select BINFMT_FLAT_ARGVP_ENVP_ON_STACK >> 17 select DMA_DIRECT_REMAP if M68K_NONCOHERENT_DMA && !COLDFIRE >> 18 select GENERIC_ATOMIC64 >> 19 select GENERIC_CPU_DEVICES >> 20 select GENERIC_IOMAP 25 select GENERIC_IRQ_SHOW 21 select GENERIC_IRQ_SHOW 26 select GENERIC_PCI_IOMAP !! 22 select GENERIC_LIB_ASHLDI3 27 select GENERIC_PENDING_IRQ if SMP !! 23 select GENERIC_LIB_ASHRDI3 28 select GENERIC_SCHED_CLOCK !! 24 select GENERIC_LIB_LSHRDI3 29 select GENERIC_SMP_IDLE_THREAD !! 25 select HAS_IOPORT if PCI || ISA || ATARI_ROM_ISA 30 select GENERIC_IOREMAP !! 26 select HAVE_ARCH_SECCOMP 31 select GENERIC_STRNCPY_FROM_USER if MM !! 27 select HAVE_ARCH_SECCOMP_FILTER 32 select GENERIC_STRNLEN_USER if MMU !! 28 select HAVE_ASM_MODVERSIONS 33 select HAVE_ARCH_KGDB !! 29 select HAVE_DEBUG_BUGVERBOSE 34 select HAVE_ARCH_TRACEHOOK !! 30 select HAVE_EFFICIENT_UNALIGNED_ACCESS if !CPU_HAS_NO_UNALIGNED 35 select HAVE_ARCH_TRANSPARENT_HUGEPAGE << 36 select HAVE_DEBUG_STACKOVERFLOW << 37 select HAVE_DEBUG_KMEMLEAK << 38 select HAVE_IOREMAP_PROT << 39 select HAVE_KERNEL_GZIP << 40 select HAVE_KERNEL_LZMA << 41 select HAVE_KPROBES << 42 select HAVE_KRETPROBES << 43 select HAVE_REGS_AND_STACK_ACCESS_API << 44 select HAVE_MOD_ARCH_SPECIFIC 31 select HAVE_MOD_ARCH_SPECIFIC 45 select HAVE_PERF_EVENTS !! 32 select HAVE_UID16 46 select HAVE_SYSCALL_TRACEPOINTS !! 33 select MMU_GATHER_NO_RANGE if MMU 47 select IRQ_DOMAIN !! 34 select MODULES_USE_ELF_REL 48 select LOCK_MM_AND_FIND_VMA << 49 select MODULES_USE_ELF_RELA 35 select MODULES_USE_ELF_RELA 50 select OF !! 36 select NO_DMA if !MMU && !COLDFIRE 51 select OF_EARLY_FLATTREE !! 37 select OLD_SIGACTION 52 select PCI_SYSCALL if PCI !! 38 select OLD_SIGSUSPEND3 53 select HAVE_ARCH_JUMP_LABEL if ISA_ARC !! 39 select UACCESS_MEMCPY if !MMU 54 select TRACE_IRQFLAGS_SUPPORT !! 40 select ZONE_DMA 55 select HAVE_EBPF_JIT if ISA_ARCV2 << 56 << 57 config LOCKDEP_SUPPORT << 58 def_bool y << 59 << 60 config SCHED_OMIT_FRAME_POINTER << 61 def_bool y << 62 << 63 config GENERIC_CSUM << 64 def_bool y << 65 << 66 config ARCH_FLATMEM_ENABLE << 67 def_bool y << 68 41 69 config MMU !! 42 config CPU_BIG_ENDIAN 70 def_bool y 43 def_bool y 71 44 72 config NO_IOPORT_MAP !! 45 config ARCH_HAS_ILOG2_U32 73 def_bool y !! 46 bool 74 47 75 config GENERIC_CALIBRATE_DELAY !! 48 config ARCH_HAS_ILOG2_U64 76 def_bool y !! 49 bool 77 50 78 config GENERIC_HWEIGHT 51 config GENERIC_HWEIGHT 79 def_bool y !! 52 bool 80 << 81 config STACKTRACE_SUPPORT << 82 def_bool y << 83 select STACKTRACE << 84 << 85 menu "ARC Architecture Configuration" << 86 << 87 menu "ARC Platform/SoC/Board" << 88 << 89 source "arch/arc/plat-tb10x/Kconfig" << 90 source "arch/arc/plat-axs10x/Kconfig" << 91 source "arch/arc/plat-hsdk/Kconfig" << 92 << 93 endmenu << 94 << 95 choice << 96 prompt "ARC Instruction Set" << 97 default ISA_ARCV2 << 98 << 99 config ISA_ARCOMPACT << 100 bool "ARCompact ISA" << 101 select CPU_NO_EFFICIENT_FFS << 102 help << 103 The original ARC ISA of ARC600/700 c << 104 << 105 config ISA_ARCV2 << 106 bool "ARC ISA v2" << 107 select ARC_TIMERS_64BIT << 108 help << 109 ISA for the Next Generation ARC-HS c << 110 << 111 endchoice << 112 << 113 menu "ARC CPU Configuration" << 114 << 115 choice << 116 prompt "ARC Core" << 117 default ARC_CPU_770 if ISA_ARCOMPACT << 118 default ARC_CPU_HS if ISA_ARCV2 << 119 << 120 config ARC_CPU_770 << 121 bool "ARC770" << 122 depends on ISA_ARCOMPACT << 123 select ARC_HAS_SWAPE << 124 help << 125 Support for ARC770 core introduced w << 126 This core has a bunch of cool new fe << 127 -MMU-v3: Variable Page Sz (4k, 8k, 1 << 128 Shared Address Spaces (for << 129 -Caches: New Prog Model, Region Flus << 130 -Insns: endian swap, load-locked/sto << 131 << 132 config ARC_CPU_HS << 133 bool "ARC-HS" << 134 depends on ISA_ARCV2 << 135 help << 136 Support for ARC HS38x Cores based on << 137 The notable features are: << 138 - SMP configurations of up to 4 co << 139 - Optional L2 Cache and IO-Coheren << 140 - Revised Interrupt Architecture ( << 141 auto stack switch, auto regfil << 142 - MMUv4 (PIPT dcache, Huge Pages) << 143 - Instructions for << 144 * 64bit load/store: LDD, STD << 145 * Hardware assisted divide/rem << 146 * Function prologue/epilogue: << 147 * IRQ enable/disable: CLRI, SE << 148 * pop count: FFS, FLS << 149 * SETcc, BMSKN, XBFU... << 150 << 151 endchoice << 152 << 153 config ARC_TUNE_MCPU << 154 string "Override default -mcpu compile << 155 default "" << 156 help << 157 Override default -mcpu=xxx compiler << 158 the ISA version) with the specified << 159 NOTE: If specified flag isn't suppor << 160 ISA default value will be used as a << 161 << 162 config CPU_BIG_ENDIAN << 163 bool "Enable Big Endian Mode" << 164 help << 165 Build kernel for Big Endian Mode of << 166 << 167 config SMP << 168 bool "Symmetric Multi-Processing" << 169 select ARC_MCIP if ISA_ARCV2 << 170 help << 171 This enables support for systems wit << 172 << 173 if SMP << 174 << 175 config NR_CPUS << 176 int "Maximum number of CPUs (2-4096)" << 177 range 2 4096 << 178 default "4" << 179 << 180 config ARC_SMP_HALT_ON_RESET << 181 bool "Enable Halt-on-reset boot mode" << 182 help << 183 In SMP configuration cores can be co << 184 or they could all start at same time << 185 masters are parked until Master kick << 186 at designated entry point. For other << 187 entry point and spin wait for Master << 188 << 189 endif #SMP << 190 << 191 config ARC_MCIP << 192 bool "ARConnect Multicore IP (MCIP) Su << 193 depends on ISA_ARCV2 << 194 default y if SMP << 195 help << 196 This IP block enables SMP in ARC-HS3 << 197 It provides for cross-core interrupt << 198 hardware semaphores, shared memory,. << 199 << 200 menuconfig ARC_CACHE << 201 bool "Enable Cache Support" << 202 default y 53 default y 203 54 204 if ARC_CACHE !! 55 config GENERIC_CALIBRATE_DELAY 205 !! 56 bool 206 config ARC_CACHE_LINE_SHIFT << 207 int "Cache Line Length (as power of 2) << 208 range 5 7 << 209 default "6" << 210 help << 211 Starting with ARC700 4.9, Cache line << 212 This option specifies "N", with Line << 213 So line lengths of 32, 64, 128 are s << 214 Linux only supports same line length << 215 << 216 config ARC_HAS_ICACHE << 217 bool "Use Instruction Cache" << 218 default y 57 default y 219 58 220 config ARC_HAS_DCACHE !! 59 config GENERIC_CSUM 221 bool "Use Data Cache" !! 60 bool 222 default y << 223 61 224 config ARC_CACHE_PAGES !! 62 config TIME_LOW_RES 225 bool "Per Page Cache Control" !! 63 bool 226 default y 64 default y 227 depends on ARC_HAS_ICACHE || ARC_HAS_D << 228 help << 229 This can be used to over-ride the gl << 230 per-page basis (but only for pages a << 231 Kernel Virtual address or User Virtu << 232 TLB entries have a per-page Cache En << 233 Note that Global I/D ENABLE + Per Pa << 234 Global DISABLE + Per Page ENABLE won << 235 << 236 endif #ARC_CACHE << 237 << 238 config ARC_HAS_ICCM << 239 bool "Use ICCM" << 240 help << 241 Single Cycle RAMS to store Fast Path << 242 << 243 config ARC_ICCM_SZ << 244 int "ICCM Size in KB" << 245 default "64" << 246 depends on ARC_HAS_ICCM << 247 << 248 config ARC_HAS_DCCM << 249 bool "Use DCCM" << 250 help << 251 Single Cycle RAMS to store Fast Path << 252 << 253 config ARC_DCCM_SZ << 254 int "DCCM Size in KB" << 255 default "64" << 256 depends on ARC_HAS_DCCM << 257 << 258 config ARC_DCCM_BASE << 259 hex "DCCM map address" << 260 default "0xA0000000" << 261 depends on ARC_HAS_DCCM << 262 << 263 choice << 264 prompt "MMU Version" << 265 default ARC_MMU_V3 if ISA_ARCOMPACT << 266 default ARC_MMU_V4 if ISA_ARCV2 << 267 << 268 config ARC_MMU_V3 << 269 bool "MMU v3" << 270 depends on ISA_ARCOMPACT << 271 help << 272 Introduced with ARC700 4.10: New Fea << 273 Variable Page size (1k-16k), var JTL << 274 Shared Address Spaces (SASID) << 275 65 276 config ARC_MMU_V4 !! 66 config NO_IOPORT_MAP 277 bool "MMU v4" !! 67 def_bool y 278 depends on ISA_ARCV2 << 279 << 280 endchoice << 281 << 282 << 283 choice << 284 prompt "MMU Page Size" << 285 default ARC_PAGE_SIZE_8K << 286 << 287 config ARC_PAGE_SIZE_8K << 288 bool "8KB" << 289 select HAVE_PAGE_SIZE_8KB << 290 help << 291 Choose between 8k vs 16k << 292 << 293 config ARC_PAGE_SIZE_16K << 294 select HAVE_PAGE_SIZE_16KB << 295 bool "16KB" << 296 << 297 config ARC_PAGE_SIZE_4K << 298 bool "4KB" << 299 select HAVE_PAGE_SIZE_4KB << 300 depends on ARC_MMU_V3 || ARC_MMU_V4 << 301 << 302 endchoice << 303 << 304 choice << 305 prompt "MMU Super Page Size" << 306 depends on ISA_ARCV2 && TRANSPARENT_HU << 307 default ARC_HUGEPAGE_2M << 308 << 309 config ARC_HUGEPAGE_2M << 310 bool "2MB" << 311 << 312 config ARC_HUGEPAGE_16M << 313 bool "16MB" << 314 68 315 endchoice !! 69 config HZ >> 70 int >> 71 default 1000 if CLEOPATRA >> 72 default 100 316 73 317 config PGTABLE_LEVELS 74 config PGTABLE_LEVELS 318 int "Number of Page table levels" !! 75 default 2 if SUN3 || COLDFIRE 319 default 2 !! 76 default 3 320 << 321 config ARC_COMPACT_IRQ_LEVELS << 322 depends on ISA_ARCOMPACT << 323 bool "Setup Timer IRQ as high Priority << 324 # if SMP, LV2 enabled ONLY if ARC impl << 325 depends on !SMP << 326 << 327 config ARC_FPU_SAVE_RESTORE << 328 bool "Enable FPU state persistence acr << 329 help << 330 ARCompact FPU has internal registers << 331 Floating Point operations. There are << 332 for floating point exceptions and ro << 333 preserved across task context switch << 334 << 335 config ARC_CANT_LLSC << 336 def_bool n << 337 << 338 config ARC_HAS_LLSC << 339 bool "Insn: LLOCK/SCOND (efficient ato << 340 default y << 341 depends on !ARC_CANT_LLSC << 342 << 343 config ARC_HAS_SWAPE << 344 bool "Insn: SWAPE (endian-swap)" << 345 default y << 346 << 347 if ISA_ARCV2 << 348 << 349 config ARC_USE_UNALIGNED_MEM_ACCESS << 350 bool "Enable unaligned access in HW" << 351 default y << 352 select HAVE_EFFICIENT_UNALIGNED_ACCESS << 353 help << 354 The ARC HS architecture supports una << 355 which is disabled by default. Enable << 356 hardware and use software to use it << 357 << 358 config ARC_HAS_LL64 << 359 bool "Insn: 64bit LDD/STD" << 360 help << 361 Enable gcc to generate 64-bit load/s << 362 ISA mandates even/odd registers to a << 363 dest operands with 2 possible source << 364 default y << 365 << 366 config ARC_HAS_DIV_REM << 367 bool "Insn: div, divu, rem, remu" << 368 default y << 369 77 370 config ARC_HAS_ACCL_REGS !! 78 config MMU 371 bool "Reg Pair ACCL:ACCH (FPU and/or M !! 79 bool "MMU-based Paged Memory Management Support" 372 default y 80 default y 373 help 81 help 374 Depending on the configuration, CPU !! 82 Select if you want MMU-based virtualised addressing space 375 (also referred to as r58:r59). These !! 83 support by paged memory management. If unsure, say 'Y'. 376 kernel needs to save/restore per pro << 377 << 378 config ARC_DSP_HANDLED << 379 def_bool n << 380 << 381 config ARC_DSP_SAVE_RESTORE_REGS << 382 def_bool n << 383 << 384 choice << 385 prompt "DSP support" << 386 default ARC_DSP_NONE << 387 help << 388 Depending on the configuration, CPU << 389 (ACC0_GLO, ACC0_GHI, DSP_BFLY0, DSP_ << 390 Below are options describing how to << 391 interrupt entry / exit and in contex << 392 << 393 config ARC_DSP_NONE << 394 bool "No DSP extension presence in HW" << 395 help << 396 No DSP extension presence in HW << 397 << 398 config ARC_DSP_KERNEL << 399 bool "DSP extension in HW, no support << 400 select ARC_HAS_ACCL_REGS << 401 select ARC_DSP_HANDLED << 402 help << 403 DSP extension presence in HW, no sup << 404 applications. We don't save / restor << 405 some minimal preparations so userspa << 406 << 407 config ARC_DSP_USERSPACE << 408 bool "Support DSP for userspace apps" << 409 select ARC_HAS_ACCL_REGS << 410 select ARC_DSP_HANDLED << 411 select ARC_DSP_SAVE_RESTORE_REGS << 412 help << 413 DSP extension presence in HW, suppor << 414 run DSP-enabled userspace applicatio << 415 84 416 config ARC_DSP_AGU_USERSPACE !! 85 config MMU_MOTOROLA 417 bool "Support DSP with AGU for userspa !! 86 bool 418 select ARC_HAS_ACCL_REGS << 419 select ARC_DSP_HANDLED << 420 select ARC_DSP_SAVE_RESTORE_REGS << 421 help << 422 DSP and AGU extensions presence in H << 423 and AGU registers to run DSP-enabled << 424 endchoice << 425 << 426 config ARC_IRQ_NO_AUTOSAVE << 427 bool "Disable hardware autosave regfil << 428 default n << 429 help << 430 On HS cores, taken interrupt auto sa << 431 This is programmable and can be opti << 432 software INTERRUPT_PROLOGUE/EPILGUE << 433 87 434 config ARC_LPB_DISABLE !! 88 config MMU_COLDFIRE 435 bool "Disable loop buffer (LPB)" !! 89 bool 436 help << 437 On HS cores, loop buffer (LPB) is pr << 438 be optionally disabled. << 439 90 440 endif # ISA_ARCV2 !! 91 config MMU_SUN3 >> 92 bool >> 93 depends on MMU && !MMU_MOTOROLA && !MMU_COLDFIRE 441 94 442 endmenu # "ARC CPU Configuration" !! 95 config ARCH_SUPPORTS_KEXEC >> 96 def_bool M68KCLASSIC && MMU 443 97 444 config LINUX_LINK_BASE !! 98 config BOOTINFO_PROC 445 hex "Kernel link address" !! 99 bool "Export bootinfo in procfs" 446 default "0x80000000" !! 100 depends on KEXEC && M68KCLASSIC 447 help << 448 ARC700 divides the 32 bit phy addres << 449 -Lower 2G (0 - 0x7FFF_FFFF ) is user << 450 -Upper 2G (0x8000_0000 onwards) is u << 451 Typically Linux kernel is linked at << 452 hence the default value of 0x8zs. << 453 However some customers have peripher << 454 Linux needs to be scooted a bit. << 455 If you don't know what the above mea << 456 This needs to match memory start add << 457 << 458 config LINUX_RAM_BASE << 459 hex "RAM base address" << 460 default LINUX_LINK_BASE << 461 help 101 help 462 By default Linux is linked at base o !! 102 Say Y to export the bootinfo used to boot the kernel in a 463 cases (such as HSDK), Linux can't be !! 103 "bootinfo" file in procfs. This is useful with kexec. 464 this option. << 465 << 466 config HIGHMEM << 467 bool "High Memory Support" << 468 select HAVE_ARCH_PFN_VALID << 469 select KMAP_LOCAL << 470 help << 471 With ARC 2G:2G address split, only u << 472 kernel. Enable this to potentially a << 473 in future << 474 << 475 config ARC_HAS_PAE40 << 476 bool "Support for the 40-bit Physical << 477 depends on ISA_ARCV2 << 478 select HIGHMEM << 479 select PHYS_ADDR_T_64BIT << 480 help << 481 Enable access to physical memory bey << 482 ARC cores with 40 bit Physical Addre << 483 104 484 config ARC_KVADDR_SIZE !! 105 menu "Platform setup" 485 int "Kernel Virtual Address Space size << 486 range 0 512 << 487 default "256" << 488 help << 489 The kernel address space is carved o << 490 space for catering to vmalloc, modul << 491 not suffice vmalloc requirements of << 492 this to be stretched to 512 MB (by e << 493 kernel-user gutter) << 494 106 495 config ARC_CURR_IN_REG !! 107 source "arch/m68k/Kconfig.cpu" 496 bool "cache current task pointer in gp << 497 default y << 498 help << 499 This reserves gp register to point t << 500 kernel mode eliding memory access fo << 501 108 >> 109 source "arch/m68k/Kconfig.machine" 502 110 503 config ARC_EMUL_UNALIGNED !! 111 source "arch/m68k/Kconfig.bus" 504 bool "Emulate unaligned memory access << 505 select SYSCTL_ARCH_UNALIGN_NO_WARN << 506 select SYSCTL_ARCH_UNALIGN_ALLOW << 507 depends on ISA_ARCOMPACT << 508 help << 509 This enables misaligned 16 & 32 bit << 510 Use ONLY-IF-ABS-NECESSARY as it will << 511 potential bugs in code << 512 112 513 config HZ !! 113 endmenu 514 int "Timer Frequency" << 515 default 100 << 516 114 517 config ARC_METAWARE_HLINK !! 115 menu "Kernel Features" 518 bool "Support for Metaware debugger as << 519 help << 520 This options allows a Linux userland << 521 host file system (open/creat/read/wr << 522 Metaware Debugger. This can come in << 523 when there is no real usable periphe << 524 116 525 menuconfig ARC_DBG !! 117 endmenu 526 bool "ARC debugging" << 527 default y << 528 118 529 if ARC_DBG !! 119 if !MMU >> 120 menu "Power management options" 530 121 531 config ARC_DW2_UNWIND !! 122 config PM 532 bool "Enable DWARF specific kernel sta !! 123 bool "Power Management support" 533 default y << 534 select KALLSYMS << 535 help 124 help 536 Compiles the kernel with DWARF unwin !! 125 Support processor power management modes 537 to get stack backtraces. << 538 126 539 If you say Y here the resulting kern !! 127 endmenu 540 but not slower, and it will give ver << 541 If you don't debug the kernel, you c << 542 to solve problems without frame unwi << 543 << 544 config ARC_DBG_JUMP_LABEL << 545 bool "Paranoid checks in Static Keys ( << 546 depends on JUMP_LABEL << 547 default y if STATIC_KEYS_SELFTEST << 548 help << 549 Enable paranoid checks and self-test << 550 part of static keys (jump labels) re << 551 endif 128 endif 552 129 553 config ARC_BUILTIN_DTB_NAME !! 130 source "arch/m68k/Kconfig.devices" 554 string "Built in DTB" << 555 help << 556 Set the name of the DTB to embed in << 557 Leaving it blank selects the "nsim_7 << 558 << 559 endmenu # "ARC Architecture Configuration" << 560 << 561 config ARCH_FORCE_MAX_ORDER << 562 int "Maximum zone order" << 563 default "11" if ARC_HUGEPAGE_16M << 564 default "10" << 565 << 566 source "kernel/power/Kconfig" <<
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.