1 /* SPDX-License-Identifier: GPL-2.0-only */ !! 1 /* SPDX-License-Identifier: GPL-2.0 */
>> 2 #include <asm/asm-offsets.h>
>> 3 #include <asm/thread_info.h>
>> 4
>> 5 #define PAGE_SIZE _PAGE_SIZE
>> 6
2 /* 7 /*
3 * Copyright (C) 2004, 2007-2010, 2011-2012 Sy !! 8 * Put .bss..swapper_pg_dir as the first thing in .bss. This will
>> 9 * ensure that it has .bss alignment (64K).
4 */ 10 */
>> 11 #define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
5 12
6 #include <asm-generic/vmlinux.lds.h> !! 13 /* Cavium Octeon should not have a separate PT_NOTE Program Header. */
7 #include <asm/cache.h> !! 14 #ifndef CONFIG_CAVIUM_OCTEON_SOC
8 #include <asm/page.h> !! 15 #define EMITS_PT_NOTE
9 #include <asm/thread_info.h> !! 16 #endif
10 17
11 OUTPUT_ARCH(arc) !! 18 #define RUNTIME_DISCARD_EXIT
12 ENTRY(res_service) !! 19
>> 20 #include <asm-generic/vmlinux.lds.h>
13 21
14 #ifdef CONFIG_CPU_BIG_ENDIAN !! 22 #undef mips
15 jiffies = jiffies_64 + 4; !! 23 #define mips mips
>> 24 OUTPUT_ARCH(mips)
>> 25 ENTRY(kernel_entry)
>> 26 PHDRS {
>> 27 text PT_LOAD FLAGS(7); /* RWX */
>> 28 #ifndef CONFIG_CAVIUM_OCTEON_SOC
>> 29 note PT_NOTE FLAGS(4); /* R__ */
>> 30 #endif /* CAVIUM_OCTEON_SOC */
>> 31 }
>> 32
>> 33 #ifdef CONFIG_32BIT
>> 34 #ifdef CONFIG_CPU_LITTLE_ENDIAN
>> 35 jiffies = jiffies_64;
>> 36 #else
>> 37 jiffies = jiffies_64 + 4;
>> 38 #endif
16 #else 39 #else
17 jiffies = jiffies_64; !! 40 jiffies = jiffies_64;
18 #endif 41 #endif
19 42
20 SECTIONS 43 SECTIONS
21 { 44 {
22 /* !! 45 #ifdef CONFIG_BOOT_ELF64
23 * ICCM starts at 0x8000_0000. So if k !! 46 /* Read-only sections, merged into text segment: */
24 * address, make sure peripheral at 0x !! 47 /* . = 0xc000000000000000; */
25 * Essentially vector is also in ICCM. !! 48
>> 49 /* This is the value for an Origin kernel, taken from an IRIX kernel. */
>> 50 /* . = 0xc00000000001c000; */
>> 51
>> 52 /* Set the vaddr for the text segment to a value
>> 53 * >= 0xa800 0000 0001 9000 if no symmon is going to configured
>> 54 * >= 0xa800 0000 0030 0000 otherwise
26 */ 55 */
27 56
28 . = CONFIG_LINUX_LINK_BASE; !! 57 /* . = 0xa800000000300000; */
29 !! 58 . = 0xffffffff80300000;
30 _int_vec_base_lds = .; <<
31 .vector : { <<
32 *(.vector) <<
33 . = ALIGN(PAGE_SIZE); <<
34 } <<
35 <<
36 #ifdef CONFIG_ARC_HAS_ICCM <<
37 .text.arcfp : { <<
38 *(.text.arcfp) <<
39 . = ALIGN(CONFIG_ARC_ICCM_SZ * <<
40 } <<
41 #endif 59 #endif
42 !! 60 . = LINKER_LOAD_ADDRESS;
43 /* !! 61 /* read-only */
44 * The reason for having a separate su !! 62 _text = .; /* Text and read-only data */
45 * prevent objdump from including it i <<
46 * <<
47 * Reason for having .init.ramfs above <<
48 * binary blob is tucked away to one s <<
49 * between .init.text and .text, avoid <<
50 * errors because of calls from .init. <<
51 * Yes such calls do exist. e.g. <<
52 * decompress_inflate.c:gunzip( ) <<
53 */ <<
54 <<
55 __init_begin = .; <<
56 <<
57 .init.ramfs : { INIT_RAM_FS } <<
58 <<
59 . = ALIGN(PAGE_SIZE); <<
60 <<
61 HEAD_TEXT_SECTION <<
62 INIT_TEXT_SECTION(L1_CACHE_BYTES) <<
63 <<
64 /* INIT_DATA_SECTION open-coded: speci <<
65 .init.data : { <<
66 INIT_DATA <<
67 INIT_SETUP(L1_CACHE_BYTES) <<
68 INIT_CALLS <<
69 CON_INITCALL <<
70 } <<
71 <<
72 .init.arch.info : { <<
73 __arch_info_begin = .; <<
74 *(.arch.info.init) <<
75 __arch_info_end = .; <<
76 } <<
77 <<
78 PERCPU_SECTION(L1_CACHE_BYTES) <<
79 <<
80 . = ALIGN(PAGE_SIZE); <<
81 __init_end = .; <<
82 <<
83 .text : { 63 .text : {
84 _text = .; <<
85 _stext = .; <<
86 TEXT_TEXT 64 TEXT_TEXT
87 SCHED_TEXT 65 SCHED_TEXT
88 LOCK_TEXT 66 LOCK_TEXT
89 KPROBES_TEXT 67 KPROBES_TEXT
90 IRQENTRY_TEXT 68 IRQENTRY_TEXT
91 SOFTIRQENTRY_TEXT 69 SOFTIRQENTRY_TEXT
92 *(.fixup) 70 *(.fixup)
93 *(.gnu.warning) 71 *(.gnu.warning)
>> 72 . = ALIGN(16);
>> 73 *(.got) /* Global offset table */
>> 74 } :text = 0
>> 75 _etext = .; /* End of text section */
>> 76
>> 77 EXCEPTION_TABLE(16)
>> 78
>> 79 /* Exception table for data bus errors */
>> 80 __dbe_table : {
>> 81 __start___dbe_table = .;
>> 82 KEEP(*(__dbe_table))
>> 83 __stop___dbe_table = .;
>> 84 }
>> 85
>> 86 _sdata = .; /* Start of data section */
>> 87 RO_DATA(4096)
>> 88
>> 89 /* writeable */
>> 90 .data : { /* Data */
>> 91 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */
>> 92
>> 93 INIT_TASK_DATA(THREAD_SIZE)
>> 94 NOSAVE_DATA
>> 95 PAGE_ALIGNED_DATA(PAGE_SIZE)
>> 96 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
>> 97 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
>> 98 DATA_DATA
>> 99 CONSTRUCTORS
>> 100 }
>> 101 BUG_TABLE
>> 102 _gp = . + 0x8000;
>> 103 .lit8 : {
>> 104 *(.lit8)
>> 105 }
>> 106 .lit4 : {
>> 107 *(.lit4)
>> 108 }
>> 109 /* We want the small data sections together, so single-instruction offsets
>> 110 can access them all, and initialized data all before uninitialized, so
>> 111 we can shorten the on-disk segment size. */
>> 112 .sdata : {
>> 113 *(.sdata)
94 } 114 }
95 EXCEPTION_TABLE(L1_CACHE_BYTES) !! 115 _edata = .; /* End of data section */
96 _etext = .; <<
97 116
98 _sdata = .; !! 117 /* will be freed after init */
99 RO_DATA(PAGE_SIZE) !! 118 . = ALIGN(PAGE_SIZE); /* Init code and data */
>> 119 __init_begin = .;
>> 120 INIT_TEXT_SECTION(PAGE_SIZE)
>> 121 INIT_DATA_SECTION(16)
100 122
101 /* !! 123 . = ALIGN(4);
102 * 1. this is .data essentially !! 124 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
103 * 2. THREAD_SIZE for init.task, must !! 125 __mips_machines_start = .;
>> 126 KEEP(*(.mips.machines.init))
>> 127 __mips_machines_end = .;
>> 128 }
>> 129
>> 130 /* .exit.text is discarded at runtime, not link time, to deal with
>> 131 * references from .rodata
104 */ 132 */
105 RW_DATA(L1_CACHE_BYTES, PAGE_SIZE, THR !! 133 .exit.text : {
>> 134 EXIT_TEXT
>> 135 }
>> 136 .exit.data : {
>> 137 EXIT_DATA
>> 138 }
>> 139 #ifdef CONFIG_SMP
>> 140 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
>> 141 #endif
106 142
107 _edata = .; !! 143 .rel.dyn : ALIGN(8) {
>> 144 *(.rel)
>> 145 *(.rel*)
>> 146 }
108 147
109 BSS_SECTION(4, 4, 4) !! 148 #ifdef CONFIG_MIPS_ELF_APPENDED_DTB
>> 149 STRUCT_ALIGN();
>> 150 .appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) {
>> 151 *(.appended_dtb)
>> 152 KEEP(*(.appended_dtb))
>> 153 }
>> 154 #endif
>> 155
>> 156 #ifdef CONFIG_RELOCATABLE
>> 157 . = ALIGN(4);
110 158
111 #ifdef CONFIG_ARC_DW2_UNWIND !! 159 .data.reloc : {
112 . = ALIGN(PAGE_SIZE); !! 160 _relocation_start = .;
113 .eh_frame : { !! 161 /*
114 __start_unwind = .; !! 162 * Space for relocation table
115 *(.eh_frame) !! 163 * This needs to be filled so that the
116 __end_unwind = .; !! 164 * relocs tool can overwrite the content.
>> 165 * An invalid value is left at the start of the
>> 166 * section to abort relocation if the table
>> 167 * has not been filled in.
>> 168 */
>> 169 LONG(0xFFFFFFFF);
>> 170 FILL(0);
>> 171 . += CONFIG_RELOCATION_TABLE_SIZE - 4;
>> 172 _relocation_end = .;
117 } 173 }
118 #else <<
119 /DISCARD/ : { *(.eh_frame) } <<
120 #endif 174 #endif
121 175
122 . = ALIGN(PAGE_SIZE); !! 176 #ifdef CONFIG_MIPS_RAW_APPENDED_DTB
>> 177 .fill : {
>> 178 FILL(0);
>> 179 BYTE(0);
>> 180 STRUCT_ALIGN();
>> 181 }
>> 182 __appended_dtb = .;
>> 183 /* leave space for appended DTB */
>> 184 . += 0x100000;
>> 185 #endif
>> 186 /*
>> 187 * Align to 64K in attempt to eliminate holes before the
>> 188 * .bss..swapper_pg_dir section at the start of .bss. This
>> 189 * also satisfies PAGE_SIZE alignment as the largest page size
>> 190 * allowed is 64K.
>> 191 */
>> 192 . = ALIGN(0x10000);
>> 193 __init_end = .;
>> 194 /* freed after init ends here */
>> 195
>> 196 /*
>> 197 * Force .bss to 64K alignment so that .bss..swapper_pg_dir
>> 198 * gets that alignment. .sbss should be empty, so there will be
>> 199 * no holes after __init_end. */
>> 200 BSS_SECTION(0, 0x10000, 8)
>> 201
123 _end = . ; 202 _end = . ;
124 203
>> 204 /* These mark the ABI of the kernel for debuggers. */
>> 205 .mdebug.abi32 : {
>> 206 KEEP(*(.mdebug.abi32))
>> 207 }
>> 208 .mdebug.abi64 : {
>> 209 KEEP(*(.mdebug.abi64))
>> 210 }
>> 211
>> 212 /* This is the MIPS specific mdebug section. */
>> 213 .mdebug : {
>> 214 *(.mdebug)
>> 215 }
>> 216
125 STABS_DEBUG 217 STABS_DEBUG
>> 218 DWARF_DEBUG
126 ELF_DETAILS 219 ELF_DETAILS
127 DISCARDS <<
128 220
129 .arcextmap 0 : { !! 221 /* These must appear regardless of . */
130 *(.gnu.linkonce.arcextmap.*) !! 222 .gptab.sdata : {
131 *(.arcextmap.*) !! 223 *(.gptab.data)
132 } !! 224 *(.gptab.sdata)
133 !! 225 }
134 #ifndef CONFIG_DEBUG_INFO !! 226 .gptab.sbss : {
135 /DISCARD/ : { *(.debug_frame) } !! 227 *(.gptab.bss)
136 /DISCARD/ : { *(.debug_aranges) } !! 228 *(.gptab.sbss)
137 /DISCARD/ : { *(.debug_pubnames) } !! 229 }
138 /DISCARD/ : { *(.debug_info) } !! 230
139 /DISCARD/ : { *(.debug_abbrev) } !! 231 /* Sections to be discarded */
140 /DISCARD/ : { *(.debug_line) } !! 232 DISCARDS
141 /DISCARD/ : { *(.debug_str) } !! 233 /DISCARD/ : {
142 /DISCARD/ : { *(.debug_loc) } !! 234 /* ABI crap starts here */
143 /DISCARD/ : { *(.debug_macinfo) } !! 235 *(.MIPS.abiflags)
144 /DISCARD/ : { *(.debug_ranges) } !! 236 *(.MIPS.options)
145 #endif !! 237 *(.gnu.attributes)
146 !! 238 *(.options)
147 #ifdef CONFIG_ARC_HAS_DCCM !! 239 *(.pdr)
148 . = CONFIG_ARC_DCCM_BASE; !! 240 *(.reginfo)
149 __arc_dccm_base = .; <<
150 .data.arcfp : { <<
151 *(.data.arcfp) <<
152 } 241 }
153 . = ALIGN(CONFIG_ARC_DCCM_SZ * 1024); <<
154 #endif <<
155 } 242 }
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