1 /* SPDX-License-Identifier: GPL-2.0-only */ !! 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* 2 /*
3 * Copyright (C) 2004, 2007-2010, 2011-2012 Sy !! 3 * linux/arch/alpha/lib/memset.S
>> 4 *
>> 5 * This is an efficient (and small) implementation of the C library "memset()"
>> 6 * function for the alpha.
>> 7 *
>> 8 * (C) Copyright 1996 Linus Torvalds
>> 9 *
>> 10 * This routine is "moral-ware": you are free to use it any way you wish, and
>> 11 * the only obligation I put on you is a moral one: if you make any improvements
>> 12 * to the routine, please send me your improvements for me to use similarly.
>> 13 *
>> 14 * The scheduling comments are according to the EV5 documentation (and done by
>> 15 * hand, so they might well be incorrect, please do tell me about it..)
4 */ 16 */
5 !! 17 #include <linux/export.h>
6 #include <linux/linkage.h> !! 18 .set noat
7 !! 19 .set noreorder
8 #define SMALL 7 /* Must be at least 6 to dea !! 20 .text
9 !! 21 .globl memset
10 ENTRY_CFI(memset) !! 22 .globl __memset
11 mov_s r4,r0 !! 23 .globl ___memset
12 or r12,r0,r2 !! 24 .globl __memset16
13 bmsk.f r12,r12,1 !! 25 .globl __constant_c_memset
14 extb_s r1,r1 !! 26
15 asl r3,r1,8 !! 27 .ent ___memset
16 beq.d .Laligned !! 28 .align 5
17 or_s r1,r1,r3 !! 29 ___memset:
18 brls r2,SMALL,.Ltiny !! 30 .frame $30,0,$26,0
19 add r3,r2,r0 !! 31 .prologue 0
20 stb r1,[r3,-1] !! 32
21 bclr_s r3,r3,0 !! 33 and $17,255,$1 /* E1 */
22 stw r1,[r3,-2] !! 34 insbl $17,1,$17 /* .. E0 */
23 bmsk.f r12,r0,1 !! 35 bis $17,$1,$17 /* E0 (p-c latency, next cycle) */
24 add_s r2,r2,r12 !! 36 sll $17,16,$1 /* E1 (p-c latency, next cycle) */
25 sub.ne r2,r2,4 !! 37
26 stb.ab r1,[r4,1] !! 38 bis $17,$1,$17 /* E0 (p-c latency, next cycle) */
27 and r4,r4,-2 !! 39 sll $17,32,$1 /* E1 (p-c latency, next cycle) */
28 stw.ab r1,[r4,2] !! 40 bis $17,$1,$17 /* E0 (p-c latency, next cycle) */
29 and r4,r4,-4 !! 41 ldq_u $31,0($30) /* .. E1 */
30 .Laligned: ; This code address should be !! 42
31 asl r3,r1,16 !! 43 .align 5
32 lsr.f lp_count,r2,2 !! 44 __constant_c_memset:
33 or_s r1,r1,r3 !! 45 addq $18,$16,$6 /* E0 */
34 lpne .Loop_end !! 46 bis $16,$16,$0 /* .. E1 */
35 st.ab r1,[r4,4] !! 47 xor $16,$6,$1 /* E0 */
36 .Loop_end: !! 48 ble $18,end /* .. E1 */
37 j_s [blink] !! 49
38 !! 50 bic $1,7,$1 /* E0 */
39 .balign 4 !! 51 beq $1,within_one_quad /* .. E1 (note EV5 zero-latency forwarding) */
40 .Ltiny: !! 52 and $16,7,$3 /* E0 */
41 mov.f lp_count,r2 !! 53 beq $3,aligned /* .. E1 (note EV5 zero-latency forwarding) */
42 lpne .Ltiny_end !! 54
43 stb.ab r1,[r4,1] !! 55 ldq_u $4,0($16) /* E0 */
44 .Ltiny_end: !! 56 bis $16,$16,$5 /* .. E1 */
45 j_s [blink] !! 57 insql $17,$16,$2 /* E0 */
46 END_CFI(memset) !! 58 subq $3,8,$3 /* .. E1 */
47 !! 59
48 ; memzero: @r0 = mem, @r1 = size_t !! 60 addq $18,$3,$18 /* E0 $18 is new count ($3 is negative) */
49 ; memset: @r0 = mem, @r1 = char, @r2 = size_t !! 61 mskql $4,$16,$4 /* .. E1 (and possible load stall) */
50 !! 62 subq $16,$3,$16 /* E0 $16 is new aligned destination */
51 ENTRY_CFI(memzero) !! 63 bis $2,$4,$1 /* .. E1 */
52 ; adjust bzero args to memset args !! 64
53 mov r2, r1 !! 65 bis $31,$31,$31 /* E0 */
54 mov r1, 0 !! 66 ldq_u $31,0($30) /* .. E1 */
55 b memset ;tail call so need to tinker !! 67 stq_u $1,0($5) /* E0 */
56 END_CFI(memzero) !! 68 bis $31,$31,$31 /* .. E1 */
>> 69
>> 70 .align 4
>> 71 aligned:
>> 72 sra $18,3,$3 /* E0 */
>> 73 and $18,7,$18 /* .. E1 */
>> 74 bis $16,$16,$5 /* E0 */
>> 75 beq $3,no_quad /* .. E1 */
>> 76
>> 77 .align 3
>> 78 loop:
>> 79 stq $17,0($5) /* E0 */
>> 80 subq $3,1,$3 /* .. E1 */
>> 81 addq $5,8,$5 /* E0 */
>> 82 bne $3,loop /* .. E1 */
>> 83
>> 84 no_quad:
>> 85 bis $31,$31,$31 /* E0 */
>> 86 beq $18,end /* .. E1 */
>> 87 ldq $7,0($5) /* E0 */
>> 88 mskqh $7,$6,$2 /* .. E1 (and load stall) */
>> 89
>> 90 insqh $17,$6,$4 /* E0 */
>> 91 bis $2,$4,$1 /* .. E1 */
>> 92 stq $1,0($5) /* E0 */
>> 93 ret $31,($26),1 /* .. E1 */
>> 94
>> 95 .align 3
>> 96 within_one_quad:
>> 97 ldq_u $1,0($16) /* E0 */
>> 98 insql $17,$16,$2 /* E1 */
>> 99 mskql $1,$16,$4 /* E0 (after load stall) */
>> 100 bis $2,$4,$2 /* E0 */
>> 101
>> 102 mskql $2,$6,$4 /* E0 */
>> 103 mskqh $1,$6,$2 /* .. E1 */
>> 104 bis $2,$4,$1 /* E0 */
>> 105 stq_u $1,0($16) /* E0 */
>> 106
>> 107 end:
>> 108 ret $31,($26),1 /* E1 */
>> 109 .end ___memset
>> 110 EXPORT_SYMBOL(___memset)
>> 111 EXPORT_SYMBOL(__constant_c_memset)
>> 112
>> 113 .align 5
>> 114 .ent __memset16
>> 115 __memset16:
>> 116 .prologue 0
>> 117
>> 118 inswl $17,0,$1 /* E0 */
>> 119 inswl $17,2,$2 /* E0 */
>> 120 inswl $17,4,$3 /* E0 */
>> 121 or $1,$2,$1 /* .. E1 */
>> 122 inswl $17,6,$4 /* E0 */
>> 123 or $1,$3,$1 /* .. E1 */
>> 124 or $1,$4,$17 /* E0 */
>> 125 br __constant_c_memset /* .. E1 */
>> 126
>> 127 .end __memset16
>> 128 EXPORT_SYMBOL(__memset16)
>> 129
>> 130 memset = ___memset
>> 131 __memset = ___memset
>> 132 EXPORT_SYMBOL(memset)
>> 133 EXPORT_SYMBOL(__memset)
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