1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 config ARM !! 2 config ALPHA
3 bool 3 bool
4 default y 4 default y
5 select ARCH_32BIT_OFF_T <<
6 select ARCH_CORRECT_STACKTRACE_ON_KRET <<
7 select ARCH_HAS_BINFMT_FLAT <<
8 select ARCH_HAS_CPU_CACHE_ALIASING <<
9 select ARCH_HAS_CPU_FINALIZE_INIT if M <<
10 select ARCH_HAS_CURRENT_STACK_POINTER <<
11 select ARCH_HAS_DEBUG_VIRTUAL if MMU <<
12 select ARCH_HAS_DMA_ALLOC if MMU <<
13 select ARCH_HAS_DMA_OPS <<
14 select ARCH_HAS_DMA_WRITE_COMBINE if ! <<
15 select ARCH_HAS_ELF_RANDOMIZE <<
16 select ARCH_HAS_FORTIFY_SOURCE <<
17 select ARCH_HAS_KEEPINITRD <<
18 select ARCH_HAS_KCOV <<
19 select ARCH_HAS_MEMBARRIER_SYNC_CORE <<
20 select ARCH_HAS_NON_OVERLAPPING_ADDRES <<
21 select ARCH_HAS_PTE_SPECIAL if ARM_LPA <<
22 select ARCH_HAS_SETUP_DMA_OPS <<
23 select ARCH_HAS_SET_MEMORY <<
24 select ARCH_STACKWALK <<
25 select ARCH_HAS_STRICT_KERNEL_RWX if M <<
26 select ARCH_HAS_STRICT_MODULE_RWX if M <<
27 select ARCH_HAS_SYNC_DMA_FOR_DEVICE <<
28 select ARCH_HAS_SYNC_DMA_FOR_CPU <<
29 select ARCH_HAS_TEARDOWN_DMA_OPS if MM <<
30 select ARCH_HAS_TICK_BROADCAST if GENE <<
31 select ARCH_HAVE_NMI_SAFE_CMPXCHG if C <<
32 select ARCH_HAS_GCOV_PROFILE_ALL <<
33 select ARCH_KEEP_MEMBLOCK <<
34 select ARCH_HAS_UBSAN <<
35 select ARCH_MIGHT_HAVE_PC_PARPORT 5 select ARCH_MIGHT_HAVE_PC_PARPORT
36 select ARCH_OPTIONAL_KERNEL_RWX if ARC !! 6 select ARCH_MIGHT_HAVE_PC_SERIO
37 select ARCH_OPTIONAL_KERNEL_RWX_DEFAUL !! 7 select ARCH_NO_PREEMPT
38 select ARCH_NEED_CMPXCHG_1_EMU if CPU_ !! 8 select ARCH_NO_SG_CHAIN
39 select ARCH_SUPPORTS_ATOMIC_RMW <<
40 select ARCH_SUPPORTS_CFI_CLANG <<
41 select ARCH_SUPPORTS_HUGETLBFS if ARM_ <<
42 select ARCH_SUPPORTS_PER_VMA_LOCK <<
43 select ARCH_USE_BUILTIN_BSWAP <<
44 select ARCH_USE_CMPXCHG_LOCKREF 9 select ARCH_USE_CMPXCHG_LOCKREF
45 select ARCH_USE_MEMTEST !! 10 select DMA_OPS if PCI
46 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_ !! 11 select FORCE_PCI if !ALPHA_JENSEN
47 select ARCH_WANT_GENERAL_HUGETLB !! 12 select PCI_DOMAINS if PCI
48 select ARCH_WANT_IPC_PARSE_VERSION !! 13 select PCI_SYSCALL if PCI
49 select ARCH_WANT_LD_ORPHAN_WARN !! 14 select HAVE_AOUT
50 select BINFMT_FLAT_ARGVP_ENVP_ON_STACK !! 15 select HAVE_ASM_MODVERSIONS
51 select BUILDTIME_TABLE_SORT if MMU !! 16 select HAVE_IDE
52 select COMMON_CLK if !(ARCH_RPC || ARC !! 17 select HAVE_OPROFILE
53 select CLONE_BACKWARDS !! 18 select HAVE_PCSPKR_PLATFORM
54 select CPU_PM if SUSPEND || CPU_IDLE !! 19 select HAVE_PERF_EVENTS
55 select DCACHE_WORD_ACCESS if HAVE_EFFI !! 20 select NEED_DMA_MAP_STATE
56 select DMA_DECLARE_COHERENT !! 21 select NEED_SG_DMA_LENGTH
57 select DMA_GLOBAL_POOL if !MMU !! 22 select VIRT_TO_BUS
58 select DMA_NONCOHERENT_MMAP if MMU <<
59 select EDAC_SUPPORT <<
60 select EDAC_ATOMIC_SCRUB <<
61 select GENERIC_ALLOCATOR <<
62 select GENERIC_ARCH_TOPOLOGY if ARM_CP <<
63 select GENERIC_ATOMIC64 if CPU_V7M || <<
64 select GENERIC_CLOCKEVENTS_BROADCAST i <<
65 select GENERIC_IRQ_IPI if SMP <<
66 select GENERIC_CPU_AUTOPROBE <<
67 select GENERIC_CPU_DEVICES <<
68 select GENERIC_EARLY_IOREMAP <<
69 select GENERIC_IDLE_POLL_SETUP <<
70 select GENERIC_IRQ_MULTI_HANDLER <<
71 select GENERIC_IRQ_PROBE 23 select GENERIC_IRQ_PROBE
>> 24 select GENERIC_PCI_IOMAP if PCI
>> 25 select AUTO_IRQ_AFFINITY if SMP
72 select GENERIC_IRQ_SHOW 26 select GENERIC_IRQ_SHOW
73 select GENERIC_IRQ_SHOW_LEVEL !! 27 select ARCH_WANT_IPC_PARSE_VERSION
74 select GENERIC_LIB_DEVMEM_IS_ALLOWED !! 28 select ARCH_HAVE_NMI_SAFE_CMPXCHG
75 select GENERIC_PCI_IOMAP !! 29 select AUDIT_ARCH
76 select GENERIC_SCHED_CLOCK !! 30 select GENERIC_CPU_VULNERABILITIES
77 select GENERIC_SMP_IDLE_THREAD 31 select GENERIC_SMP_IDLE_THREAD
78 select HARDIRQS_SW_RESEND !! 32 select GENERIC_STRNCPY_FROM_USER
79 select HAS_IOPORT !! 33 select GENERIC_STRNLEN_USER
80 select HAVE_ARCH_AUDITSYSCALL if AEABI !! 34 select HAVE_ARCH_AUDITSYSCALL
81 select HAVE_ARCH_BITREVERSE if (CPU_32 <<
82 select HAVE_ARCH_JUMP_LABEL if !XIP_KE <<
83 select HAVE_ARCH_KFENCE if MMU && !XIP <<
84 select HAVE_ARCH_KGDB if !CPU_ENDIAN_B <<
85 select HAVE_ARCH_KASAN if MMU && !XIP_ <<
86 select HAVE_ARCH_KASAN_VMALLOC if HAVE <<
87 select HAVE_ARCH_MMAP_RND_BITS if MMU <<
88 select HAVE_ARCH_PFN_VALID <<
89 select HAVE_ARCH_SECCOMP <<
90 select HAVE_ARCH_SECCOMP_FILTER if AEA <<
91 select HAVE_ARCH_STACKLEAK <<
92 select HAVE_ARCH_THREAD_STRUCT_WHITELI <<
93 select HAVE_ARCH_TRACEHOOK <<
94 select HAVE_ARCH_TRANSPARENT_HUGEPAGE <<
95 select HAVE_ARM_SMCCC if CPU_V7 <<
96 select HAVE_EBPF_JIT if !CPU_ENDIAN_BE <<
97 select HAVE_CONTEXT_TRACKING_USER <<
98 select HAVE_C_RECORDMCOUNT <<
99 select HAVE_BUILDTIME_MCOUNT_SORT <<
100 select HAVE_DEBUG_KMEMLEAK if !XIP_KER <<
101 select HAVE_DMA_CONTIGUOUS if MMU <<
102 select HAVE_DYNAMIC_FTRACE if !XIP_KER <<
103 select HAVE_DYNAMIC_FTRACE_WITH_REGS i <<
104 select HAVE_EFFICIENT_UNALIGNED_ACCESS <<
105 select HAVE_EXIT_THREAD <<
106 select HAVE_GUP_FAST if ARM_LPAE <<
107 select HAVE_FTRACE_MCOUNT_RECORD if !X <<
108 select HAVE_FUNCTION_ERROR_INJECTION <<
109 select HAVE_FUNCTION_GRAPH_TRACER <<
110 select HAVE_FUNCTION_TRACER if !XIP_KE <<
111 select HAVE_GCC_PLUGINS <<
112 select HAVE_HW_BREAKPOINT if PERF_EVEN <<
113 select HAVE_IRQ_TIME_ACCOUNTING <<
114 select HAVE_KERNEL_GZIP <<
115 select HAVE_KERNEL_LZ4 <<
116 select HAVE_KERNEL_LZMA <<
117 select HAVE_KERNEL_LZO <<
118 select HAVE_KERNEL_XZ <<
119 select HAVE_KPROBES if !XIP_KERNEL && <<
120 select HAVE_KRETPROBES if HAVE_KPROBES <<
121 select HAVE_LD_DEAD_CODE_DATA_ELIMINAT <<
122 select HAVE_MOD_ARCH_SPECIFIC 35 select HAVE_MOD_ARCH_SPECIFIC
123 select HAVE_NMI !! 36 select MODULES_USE_ELF_RELA
124 select HAVE_OPTPROBES if !THUMB2_KERNE !! 37 select ODD_RT_SIGACTION
125 select HAVE_PAGE_SIZE_4KB !! 38 select OLD_SIGSUSPEND
126 select HAVE_PCI if MMU !! 39 select CPU_NO_EFFICIENT_FFS if !ALPHA_EV67
127 select HAVE_PERF_EVENTS !! 40 select MMU_GATHER_NO_RANGE
128 select HAVE_PERF_REGS !! 41 select SET_FS
129 select HAVE_PERF_USER_STACK_DUMP !! 42 select SPARSEMEM_EXTREME if SPARSEMEM
130 select MMU_GATHER_RCU_TABLE_FREE if SM !! 43 help
131 select HAVE_REGS_AND_STACK_ACCESS_API !! 44 The Alpha is a 64-bit general-purpose processor designed and
132 select HAVE_RSEQ !! 45 marketed by the Digital Equipment Corporation of blessed memory,
133 select HAVE_STACKPROTECTOR !! 46 now Hewlett-Packard. The Alpha Linux project has a home page at
134 select HAVE_SYSCALL_TRACEPOINTS !! 47 <http://www.alphalinux.org/>.
135 select HAVE_UID16 <<
136 select HAVE_VIRT_CPU_ACCOUNTING_GEN <<
137 select HOTPLUG_CORE_SYNC_DEAD if HOTPL <<
138 select IRQ_FORCED_THREADING <<
139 select LOCK_MM_AND_FIND_VMA <<
140 select MODULES_USE_ELF_REL <<
141 select NEED_DMA_MAP_STATE <<
142 select OF_EARLY_FLATTREE if OF <<
143 select OLD_SIGACTION <<
144 select OLD_SIGSUSPEND3 <<
145 select PCI_DOMAINS_GENERIC if PCI <<
146 select PCI_SYSCALL if PCI <<
147 select PERF_USE_VMALLOC <<
148 select RTC_LIB <<
149 select SPARSE_IRQ if !(ARCH_FOOTBRIDGE <<
150 select SYS_SUPPORTS_APM_EMULATION <<
151 select THREAD_INFO_IN_TASK <<
152 select TIMER_OF if OF <<
153 select HAVE_ARCH_VMAP_STACK if MMU && <<
154 select TRACE_IRQFLAGS_SUPPORT if !CPU_ <<
155 select USE_OF if !(ARCH_FOOTBRIDGE || <<
156 # Above selects are sorted alphabetica <<
157 # according to that. Thanks. <<
158 help <<
159 The ARM series is a line of low-powe <<
160 licensed by ARM Ltd and targeted at <<
161 handhelds such as the Compaq IPAQ. <<
162 manufactured, but legacy ARM-based P <<
163 Europe. There is an ARM Linux proje <<
164 <http://www.arm.linux.org.uk/>. <<
165 48
166 config ARM_HAS_GROUP_RELOCS !! 49 config 64BIT
167 def_bool y 50 def_bool y
168 depends on !LD_IS_LLD || LLD_VERSION > <<
169 depends on !COMPILE_TEST <<
170 help <<
171 Whether or not to use R_ARM_ALU_PC_G <<
172 relocations, which have been around <<
173 supported in LLD until version 14. T <<
174 which is usually sufficient, but not <<
175 this feature when doing compile test <<
176 <<
177 config ARM_DMA_USE_IOMMU <<
178 bool <<
179 select NEED_SG_DMA_LENGTH <<
180 <<
181 if ARM_DMA_USE_IOMMU <<
182 <<
183 config ARM_DMA_IOMMU_ALIGNMENT <<
184 int "Maximum PAGE_SIZE order of alignm <<
185 range 4 9 <<
186 default 8 <<
187 help <<
188 DMA mapping framework by default ali <<
189 PAGE_SIZE order which is greater tha <<
190 size. This works well for buffers up <<
191 for larger buffers it just a waste o <<
192 relatively small addressing window ( <<
193 virtual space with just a few alloca <<
194 <<
195 With this parameter you can specify <<
196 DMA IOMMU buffers. Larger buffers wi <<
197 specified order. The order is expres <<
198 by the PAGE_SIZE. <<
199 <<
200 endif <<
201 <<
202 config SYS_SUPPORTS_APM_EMULATION <<
203 bool <<
204 <<
205 config HAVE_TCM <<
206 bool <<
207 select GENERIC_ALLOCATOR <<
208 51
209 config HAVE_PROC_CPU !! 52 config MMU
210 bool <<
211 <<
212 config NO_IOPORT_MAP <<
213 bool <<
214 <<
215 config SBUS <<
216 bool <<
217 <<
218 config STACKTRACE_SUPPORT <<
219 bool <<
220 default y <<
221 <<
222 config LOCKDEP_SUPPORT <<
223 bool 53 bool
224 default y 54 default y
225 55
226 config ARCH_HAS_ILOG2_U32 56 config ARCH_HAS_ILOG2_U32
227 bool 57 bool
>> 58 default n
228 59
229 config ARCH_HAS_ILOG2_U64 60 config ARCH_HAS_ILOG2_U64
230 bool 61 bool
231 !! 62 default n
232 config ARCH_HAS_BANDGAP <<
233 bool <<
234 <<
235 config FIX_EARLYCON_MEM <<
236 def_bool y if MMU <<
237 <<
238 config GENERIC_HWEIGHT <<
239 bool <<
240 default y <<
241 63
242 config GENERIC_CALIBRATE_DELAY 64 config GENERIC_CALIBRATE_DELAY
243 bool 65 bool
244 default y 66 default y
245 67
246 config ARCH_MAY_HAVE_PC_FDC !! 68 config ZONE_DMA
247 bool 69 bool
248 !! 70 default y
249 config ARCH_SUPPORTS_UPROBES <<
250 def_bool y <<
251 71
252 config GENERIC_ISA_DMA 72 config GENERIC_ISA_DMA
253 bool 73 bool
254 <<
255 config FIQ <<
256 bool <<
257 <<
258 config ARCH_MTD_XIP <<
259 bool <<
260 <<
261 config ARM_PATCH_PHYS_VIRT <<
262 bool "Patch physical to virtual transl <<
263 default y 74 default y
264 depends on MMU <<
265 help <<
266 Patch phys-to-virt and virt-to-phys <<
267 boot and module load time according <<
268 kernel in system memory. <<
269 75
270 This can only be used with non-XIP M !! 76 config PGTABLE_LEVELS
271 of physical memory is at a 2 MiB bou !! 77 int
272 !! 78 default 3
273 Only disable this option if you know <<
274 this feature (eg, building a kernel <<
275 you need to shrink the kernel to the <<
276 79
277 config NEED_MACH_IO_H !! 80 config AUDIT_ARCH
278 bool 81 bool
279 help <<
280 Select this when mach/io.h is requir <<
281 definitions for this platform. The <<
282 be avoided when possible. <<
283 82
284 config NEED_MACH_MEMORY_H !! 83 menu "System setup"
285 bool <<
286 help <<
287 Select this when mach/memory.h is re <<
288 definitions for this platform. The <<
289 be avoided when possible. <<
290 84
291 config PHYS_OFFSET !! 85 choice
292 hex "Physical address of main memory" !! 86 prompt "Alpha system type"
293 depends on !ARM_PATCH_PHYS_VIRT || !AU !! 87 default ALPHA_GENERIC
294 default DRAM_BASE if !MMU <<
295 default 0x00000000 if ARCH_FOOTBRIDGE <<
296 default 0x10000000 if ARCH_OMAP1 || AR <<
297 default 0xa0000000 if ARCH_PXA <<
298 default 0xc0000000 if ARCH_EP93XX || A <<
299 default 0 <<
300 help 88 help
301 Please provide the physical address !! 89 This is the system type of your hardware. A "generic" kernel will
302 location of main memory in your syst !! 90 run on any supported Alpha system. However, if you configure a
303 !! 91 kernel for your specific system, it will be faster and smaller.
304 config GENERIC_BUG !! 92
305 def_bool y !! 93 To find out what type of Alpha system you have, you may want to
306 depends on BUG !! 94 check out the Linux/Alpha FAQ, accessible on the WWW from
307 !! 95 <http://www.alphalinux.org/>. In summary:
308 config PGTABLE_LEVELS !! 96
309 int !! 97 Alcor/Alpha-XLT AS 600, AS 500, XL-300, XL-366
310 default 3 if ARM_LPAE !! 98 Alpha-XL XL-233, XL-266
311 default 2 !! 99 AlphaBook1 Alpha laptop
312 !! 100 Avanti AS 200, AS 205, AS 250, AS 255, AS 300, AS 400
313 menu "System Type" !! 101 Cabriolet AlphaPC64, AlphaPCI64
314 !! 102 DP264 DP264 / DS20 / ES40 / DS10 / DS10L
315 config MMU !! 103 EB164 EB164 21164 evaluation board
316 bool "MMU-based Paged Memory Managemen !! 104 EB64+ EB64+ 21064 evaluation board
317 default y !! 105 EB66 EB66 21066 evaluation board
>> 106 EB66+ EB66+ 21066 evaluation board
>> 107 Jensen DECpc 150, DEC 2000 models 300, 500
>> 108 LX164 AlphaPC164-LX
>> 109 Lynx AS 2100A
>> 110 Miata Personal Workstation 433/500/600 a/au
>> 111 Marvel AlphaServer ES47 / ES80 / GS1280
>> 112 Mikasa AS 1000
>> 113 Noname AXPpci33, UDB (Multia)
>> 114 Noritake AS 1000A, AS 600A, AS 800
>> 115 PC164 AlphaPC164
>> 116 Rawhide AS 1200, AS 4000, AS 4100
>> 117 Ruffian RPX164-2, AlphaPC164-UX, AlphaPC164-BX
>> 118 SX164 AlphaPC164-SX
>> 119 Sable AS 2000, AS 2100
>> 120 Shark DS 20L
>> 121 Takara Takara (OEM)
>> 122 Titan AlphaServer ES45 / DS25 / DS15
>> 123 Wildfire AlphaServer GS 40/80/160/320
>> 124
>> 125 If you don't know what to do, choose "generic".
>> 126
>> 127 config ALPHA_GENERIC
>> 128 bool "Generic"
>> 129 depends on TTY
>> 130 select HAVE_EISA
>> 131 help
>> 132 A generic kernel will run on all supported Alpha hardware.
>> 133
>> 134 config ALPHA_ALCOR
>> 135 bool "Alcor/Alpha-XLT"
>> 136 select HAVE_EISA
>> 137 help
>> 138 For systems using the Digital ALCOR chipset: 5 chips (4, 64-bit data
>> 139 slices (Data Switch, DSW) - 208-pin PQFP and 1 control (Control, I/O
>> 140 Address, CIA) - a 383 pin plastic PGA). It provides a DRAM
>> 141 controller (256-bit memory bus) and a PCI interface. It also does
>> 142 all the work required to support an external Bcache and to maintain
>> 143 memory coherence when a PCI device DMAs into (or out of) memory.
>> 144
>> 145 config ALPHA_XL
>> 146 bool "Alpha-XL"
>> 147 help
>> 148 XL-233 and XL-266-based Alpha systems.
>> 149
>> 150 config ALPHA_BOOK1
>> 151 bool "AlphaBook1"
>> 152 help
>> 153 Dec AlphaBook1/Burns Alpha-based laptops.
>> 154
>> 155 config ALPHA_AVANTI_CH
>> 156 bool "Avanti"
>> 157
>> 158 config ALPHA_CABRIOLET
>> 159 bool "Cabriolet"
>> 160 help
>> 161 Cabriolet AlphaPC64, AlphaPCI64 systems. Derived from EB64+ but now
>> 162 baby-AT with Flash boot ROM, no on-board SCSI or Ethernet. 3 ISA
>> 163 slots, 4 PCI slots (one pair are on a shared slot), uses plug-in
>> 164 Bcache SIMMs. Requires power supply with 3.3V output.
>> 165
>> 166 config ALPHA_DP264
>> 167 bool "DP264"
>> 168 help
>> 169 Various 21264 systems with the tsunami core logic chipset.
>> 170 API Networks: 264DP, UP2000(+), CS20;
>> 171 Compaq: DS10(E,L), XP900, XP1000, DS20(E), ES40.
>> 172
>> 173 config ALPHA_EB164
>> 174 bool "EB164"
>> 175 help
>> 176 EB164 21164 evaluation board from DEC. Uses 21164 and ALCOR. Has
>> 177 ISA and PCI expansion (3 ISA slots, 2 64-bit PCI slots (one is
>> 178 shared with an ISA slot) and 2 32-bit PCI slots. Uses plus-in
>> 179 Bcache SIMMs. I/O sub-system provides SuperI/O (2S, 1P, FD), KBD,
>> 180 MOUSE (PS2 style), RTC/NVRAM. Boot ROM is Flash. PC-AT-sized
>> 181 motherboard. Requires power supply with 3.3V output.
>> 182
>> 183 config ALPHA_EB64P_CH
>> 184 bool "EB64+"
>> 185
>> 186 config ALPHA_EB66
>> 187 bool "EB66"
>> 188 help
>> 189 A Digital DS group board. Uses 21066 or 21066A. I/O sub-system is
>> 190 identical to EB64+. Baby PC-AT size. Runs from standard PC power
>> 191 supply. The EB66 schematic was published as a marketing poster
>> 192 advertising the 21066 as "the first microprocessor in the world with
>> 193 embedded PCI".
>> 194
>> 195 config ALPHA_EB66P
>> 196 bool "EB66+"
>> 197 help
>> 198 Later variant of the EB66 board.
>> 199
>> 200 config ALPHA_EIGER
>> 201 bool "Eiger"
>> 202 help
>> 203 Apparently an obscure OEM single-board computer based on the
>> 204 Typhoon/Tsunami chipset family. Information on it is scanty.
>> 205
>> 206 config ALPHA_JENSEN
>> 207 bool "Jensen"
>> 208 depends on BROKEN
>> 209 select HAVE_EISA
>> 210 help
>> 211 DEC PC 150 AXP (aka Jensen): This is a very old Digital system - one
>> 212 of the first-generation Alpha systems. A number of these systems
>> 213 seem to be available on the second- hand market. The Jensen is a
>> 214 floor-standing tower system which originally used a 150MHz 21064 It
>> 215 used programmable logic to interface a 486 EISA I/O bridge to the
>> 216 CPU.
>> 217
>> 218 config ALPHA_LX164
>> 219 bool "LX164"
>> 220 help
>> 221 A technical overview of this board is available at
>> 222 <http://www.unix-ag.org/Linux-Alpha/Architectures/LX164.html>.
>> 223
>> 224 config ALPHA_LYNX
>> 225 bool "Lynx"
>> 226 select HAVE_EISA
>> 227 help
>> 228 AlphaServer 2100A-based systems.
>> 229
>> 230 config ALPHA_MARVEL
>> 231 bool "Marvel"
>> 232 help
>> 233 AlphaServer ES47 / ES80 / GS1280 based on EV7.
>> 234
>> 235 config ALPHA_MIATA
>> 236 bool "Miata"
>> 237 select HAVE_EISA
>> 238 help
>> 239 The Digital PersonalWorkStation (PWS 433a, 433au, 500a, 500au, 600a,
>> 240 or 600au).
>> 241
>> 242 config ALPHA_MIKASA
>> 243 bool "Mikasa"
>> 244 help
>> 245 AlphaServer 1000-based Alpha systems.
>> 246
>> 247 config ALPHA_NAUTILUS
>> 248 bool "Nautilus"
>> 249 help
>> 250 Alpha systems based on the AMD 751 & ALI 1543C chipsets.
>> 251
>> 252 config ALPHA_NONAME_CH
>> 253 bool "Noname"
>> 254
>> 255 config ALPHA_NORITAKE
>> 256 bool "Noritake"
>> 257 select HAVE_EISA
318 help 258 help
319 Select if you want MMU-based virtual !! 259 AlphaServer 1000A, AlphaServer 600A, and AlphaServer 800-based
320 support by paged memory management. !! 260 systems.
321 <<
322 config ARM_SINGLE_ARMV7M <<
323 def_bool !MMU <<
324 select ARM_NVIC <<
325 select CPU_V7M <<
326 select NO_IOPORT_MAP <<
327 261
328 config ARCH_MMAP_RND_BITS_MIN !! 262 config ALPHA_PC164
329 default 8 !! 263 bool "PC164"
330 264
331 config ARCH_MMAP_RND_BITS_MAX !! 265 config ALPHA_P2K
332 default 14 if PAGE_OFFSET=0x40000000 !! 266 bool "Platform2000"
333 default 15 if PAGE_OFFSET=0x80000000 <<
334 default 16 <<
335 267
336 config ARCH_MULTIPLATFORM !! 268 config ALPHA_RAWHIDE
337 bool "Require kernel to be portable to !! 269 bool "Rawhide"
338 depends on MMU && !(ARCH_FOOTBRIDGE || !! 270 select HAVE_EISA
339 default y <<
340 help 271 help
341 In general, all Arm machines can be !! 272 AlphaServer 1200, AlphaServer 4000 and AlphaServer 4100 machines.
342 kernel image, covering either Armv4/ !! 273 See HOWTO at
343 !! 274 <http://www.alphalinux.org/docs/rawhide/4100_install.shtml>.
344 However, some configuration options <<
345 specific physical addresses or enabl <<
346 break other machines. <<
347 <<
348 Selecting N here allows using those <<
349 DEBUG_UNCOMPRESS, XIP_KERNEL and ZBO <<
350 <<
351 source "arch/arm/Kconfig.platforms" <<
352 <<
353 # <<
354 # This is sorted alphabetically by mach-* path <<
355 # Kconfigs may be included either alphabetical <<
356 # plat- suffix) or along side the correspondin <<
357 # <<
358 source "arch/arm/mach-actions/Kconfig" <<
359 <<
360 source "arch/arm/mach-alpine/Kconfig" <<
361 <<
362 source "arch/arm/mach-artpec/Kconfig" <<
363 <<
364 source "arch/arm/mach-aspeed/Kconfig" <<
365 <<
366 source "arch/arm/mach-at91/Kconfig" <<
367 <<
368 source "arch/arm/mach-axxia/Kconfig" <<
369 <<
370 source "arch/arm/mach-bcm/Kconfig" <<
371 <<
372 source "arch/arm/mach-berlin/Kconfig" <<
373 <<
374 source "arch/arm/mach-clps711x/Kconfig" <<
375 <<
376 source "arch/arm/mach-davinci/Kconfig" <<
377 <<
378 source "arch/arm/mach-digicolor/Kconfig" <<
379 <<
380 source "arch/arm/mach-dove/Kconfig" <<
381 <<
382 source "arch/arm/mach-ep93xx/Kconfig" <<
383 <<
384 source "arch/arm/mach-exynos/Kconfig" <<
385 275
386 source "arch/arm/mach-footbridge/Kconfig" !! 276 config ALPHA_RUFFIAN
387 !! 277 bool "Ruffian"
388 source "arch/arm/mach-gemini/Kconfig" !! 278 help
389 !! 279 Samsung APC164UX. There is a page on known problems and workarounds
390 source "arch/arm/mach-highbank/Kconfig" !! 280 at <http://www.alphalinux.org/faq/FAQ-11.html>.
391 <<
392 source "arch/arm/mach-hisi/Kconfig" <<
393 <<
394 source "arch/arm/mach-hpe/Kconfig" <<
395 <<
396 source "arch/arm/mach-imx/Kconfig" <<
397 <<
398 source "arch/arm/mach-ixp4xx/Kconfig" <<
399 <<
400 source "arch/arm/mach-keystone/Kconfig" <<
401 <<
402 source "arch/arm/mach-lpc32xx/Kconfig" <<
403 <<
404 source "arch/arm/mach-mediatek/Kconfig" <<
405 <<
406 source "arch/arm/mach-meson/Kconfig" <<
407 <<
408 source "arch/arm/mach-milbeaut/Kconfig" <<
409 <<
410 source "arch/arm/mach-mmp/Kconfig" <<
411 <<
412 source "arch/arm/mach-mstar/Kconfig" <<
413 <<
414 source "arch/arm/mach-mv78xx0/Kconfig" <<
415 <<
416 source "arch/arm/mach-mvebu/Kconfig" <<
417 <<
418 source "arch/arm/mach-mxs/Kconfig" <<
419 <<
420 source "arch/arm/mach-nomadik/Kconfig" <<
421 <<
422 source "arch/arm/mach-npcm/Kconfig" <<
423 <<
424 source "arch/arm/mach-omap1/Kconfig" <<
425 <<
426 source "arch/arm/mach-omap2/Kconfig" <<
427 <<
428 source "arch/arm/mach-orion5x/Kconfig" <<
429 <<
430 source "arch/arm/mach-pxa/Kconfig" <<
431 <<
432 source "arch/arm/mach-qcom/Kconfig" <<
433 <<
434 source "arch/arm/mach-realtek/Kconfig" <<
435 <<
436 source "arch/arm/mach-rpc/Kconfig" <<
437 <<
438 source "arch/arm/mach-rockchip/Kconfig" <<
439 <<
440 source "arch/arm/mach-s3c/Kconfig" <<
441 <<
442 source "arch/arm/mach-s5pv210/Kconfig" <<
443 <<
444 source "arch/arm/mach-sa1100/Kconfig" <<
445 <<
446 source "arch/arm/mach-shmobile/Kconfig" <<
447 <<
448 source "arch/arm/mach-socfpga/Kconfig" <<
449 <<
450 source "arch/arm/mach-spear/Kconfig" <<
451 <<
452 source "arch/arm/mach-sti/Kconfig" <<
453 <<
454 source "arch/arm/mach-stm32/Kconfig" <<
455 <<
456 source "arch/arm/mach-sunxi/Kconfig" <<
457 <<
458 source "arch/arm/mach-tegra/Kconfig" <<
459 281
460 source "arch/arm/mach-ux500/Kconfig" !! 282 config ALPHA_RX164
>> 283 bool "RX164"
461 284
462 source "arch/arm/mach-versatile/Kconfig" !! 285 config ALPHA_SX164
>> 286 bool "SX164"
463 287
464 source "arch/arm/mach-vt8500/Kconfig" !! 288 config ALPHA_SABLE
>> 289 bool "Sable"
>> 290 select HAVE_EISA
>> 291 help
>> 292 Digital AlphaServer 2000 and 2100-based systems.
465 293
466 source "arch/arm/mach-zynq/Kconfig" !! 294 config ALPHA_SHARK
>> 295 bool "Shark"
467 296
468 # ARMv7-M architecture !! 297 config ALPHA_TAKARA
469 config ARCH_LPC18XX !! 298 bool "Takara"
470 bool "NXP LPC18xx/LPC43xx" <<
471 depends on ARM_SINGLE_ARMV7M <<
472 select ARCH_HAS_RESET_CONTROLLER <<
473 select ARM_AMBA <<
474 select CLKSRC_LPC32XX <<
475 select PINCTRL <<
476 help 299 help
477 Support for NXP's LPC18xx Cortex-M3 !! 300 Alpha 11164-based OEM single-board computer.
478 high performance microcontrollers. <<
479 301
480 config ARCH_MPS2 !! 302 config ALPHA_TITAN
481 bool "ARM MPS2 platform" !! 303 bool "Titan"
482 depends on ARM_SINGLE_ARMV7M <<
483 select ARM_AMBA <<
484 select CLKSRC_MPS2 <<
485 help 304 help
486 Support for Cortex-M Prototyping Sys !! 305 AlphaServer ES45/DS25 SMP based on EV68 and Titan chipset.
487 with a range of available cores like <<
488 306
489 Please, note that depends which Appl !! 307 config ALPHA_WILDFIRE
490 for the platform may vary, so adjust !! 308 bool "Wildfire"
>> 309 help
>> 310 AlphaServer GS 40/80/160/320 SMP based on the EV67 core.
491 311
492 # Definitions to make life easier !! 312 endchoice
493 config ARCH_ACORN <<
494 bool <<
495 313
496 config PLAT_ORION !! 314 # clear all implied options (don't want default values for those):
>> 315 # Most of these machines have ISA slots; not exactly sure which don't,
>> 316 # and this doesn't activate hordes of code, so do it always.
>> 317 config ISA
497 bool 318 bool
498 select CLKSRC_MMIO !! 319 default y
499 select GENERIC_IRQ_CHIP !! 320 help
500 select IRQ_DOMAIN !! 321 Find out whether you have ISA slots on your motherboard. ISA is the
>> 322 name of a bus system, i.e. the way the CPU talks to the other stuff
>> 323 inside your box. Other bus systems are PCI, EISA, MicroChannel
>> 324 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
>> 325 newer boards don't support it. If you have ISA, say Y, otherwise N.
501 326
502 config PLAT_ORION_LEGACY !! 327 config ISA_DMA_API
503 bool 328 bool
504 select PLAT_ORION !! 329 default y
505 330
506 config PLAT_VERSATILE !! 331 config ALPHA_NONAME
507 bool 332 bool
508 !! 333 depends on ALPHA_BOOK1 || ALPHA_NONAME_CH
509 source "arch/arm/mm/Kconfig" <<
510 <<
511 config IWMMXT <<
512 bool "Enable iWMMXt support" <<
513 depends on CPU_XSCALE || CPU_XSC3 || C <<
514 default y if PXA27x || PXA3xx || ARCH_ <<
515 help <<
516 Enable support for iWMMXt context sw <<
517 running on a CPU that supports it. <<
518 <<
519 if !MMU <<
520 source "arch/arm/Kconfig-nommu" <<
521 endif <<
522 <<
523 config PJ4B_ERRATA_4742 <<
524 bool "PJ4B Errata 4742: IDLE Wake Up C <<
525 depends on CPU_PJ4B && MACH_ARMADA_370 <<
526 default y 334 default y
527 help 335 help
528 When coming out of either a Wait for !! 336 The AXPpci33 (aka NoName), is based on the EB66 (includes the Multia
529 Event (WFE) IDLE states, a specific !! 337 UDB). This design was produced by Digital's Technical OEM (TOEM)
530 the retiring WFI/WFE instructions an !! 338 group. It uses the 21066 processor running at 166MHz or 233MHz. It
531 instructions. This sensitivity can !! 339 is a baby-AT size, and runs from a standard PC power supply. It has
532 Workaround: !! 340 5 ISA slots and 3 PCI slots (one pair are a shared slot). There are
533 The software must insert either a Da !! 341 2 versions, with either PS/2 or large DIN connectors for the
534 or Data Memory Barrier (DMB) command !! 342 keyboard.
535 instruction <<
536 343
537 config ARM_ERRATA_326103 !! 344 config ALPHA_EV4
538 bool "ARM errata: FSR write bit incorr !! 345 bool
539 depends on CPU_V6 !! 346 depends on ALPHA_JENSEN || (ALPHA_SABLE && !ALPHA_GAMMA) || ALPHA_LYNX || ALPHA_NORITAKE && !ALPHA_PRIMO || ALPHA_MIKASA && !ALPHA_PRIMO || ALPHA_CABRIOLET || ALPHA_AVANTI_CH || ALPHA_EB64P_CH || ALPHA_XL || ALPHA_NONAME || ALPHA_EB66 || ALPHA_EB66P || ALPHA_P2K
540 help !! 347 default y if !ALPHA_LYNX
541 Executing a SWP instruction to read- <<
542 of the FSR on the ARM 1136 prior to <<
543 treat the access as a read, preventi <<
544 causing the faulting task to liveloc <<
545 <<
546 config ARM_ERRATA_411920 <<
547 bool "ARM errata: Invalidation of the <<
548 depends on CPU_V6 || CPU_V6K <<
549 help <<
550 Invalidation of the Instruction Cach <<
551 fail. This erratum is present in 113 <<
552 It does not affect the MPCore. This <<
553 recommended workaround. <<
554 348
555 config ARM_ERRATA_430973 !! 349 config ALPHA_LCA
556 bool "ARM errata: Stale prediction on !! 350 bool
557 depends on CPU_V7 !! 351 depends on ALPHA_NONAME || ALPHA_EB66 || ALPHA_EB66P || ALPHA_P2K
558 help !! 352 default y
559 This option enables the workaround f <<
560 r1p* erratum. If a code sequence con <<
561 interworking branch is replaced with <<
562 same virtual address, whether due to <<
563 to physical address re-mapping, Cort <<
564 stale interworking branch prediction <<
565 executing the new code sequence in t <<
566 The workaround enables the BTB/BTAC <<
567 and also flushes the branch target c <<
568 Note that setting specific bits in t <<
569 available in non-secure mode. <<
570 353
571 config ARM_ERRATA_458693 !! 354 config ALPHA_APECS
572 bool "ARM errata: Processor deadlock w !! 355 bool
573 depends on CPU_V7 !! 356 depends on !ALPHA_PRIMO && (ALPHA_NORITAKE || ALPHA_MIKASA) || ALPHA_CABRIOLET || ALPHA_AVANTI_CH || ALPHA_EB64P_CH || ALPHA_XL
574 depends on !ARCH_MULTIPLATFORM !! 357 default y
575 help <<
576 This option enables the workaround f <<
577 erratum. For very specific sequences <<
578 possible for a hazard condition inte <<
579 be incorrectly associated with a dif <<
580 hazard might then cause a processor <<
581 the L1 caching of the NEON accesses <<
582 in the ACTLR register. Note that set <<
583 register may not be available in non <<
584 available on a multiplatform kernel. <<
585 bootloader instead. <<
586 358
587 config ARM_ERRATA_460075 !! 359 config ALPHA_EB64P
588 bool "ARM errata: Data written to the !! 360 bool
589 depends on CPU_V7 !! 361 depends on ALPHA_CABRIOLET || ALPHA_EB64P_CH
590 depends on !ARCH_MULTIPLATFORM !! 362 default y
591 help 363 help
592 This option enables the workaround f !! 364 Uses 21064 or 21064A and APECs. Has ISA and PCI expansion (3 ISA,
593 erratum. Any asynchronous access to !! 365 2 PCI, one pair are on a shared slot). Supports 36-bit DRAM SIMs.
594 situation in which recent store tran !! 366 ISA bus generated by Intel SaturnI/O PCI-ISA bridge. On-board SCSI
595 and overwritten with stale memory co !! 367 (NCR 810 on PCI) Ethernet (Digital 21040), KBD, MOUSE (PS2 style),
596 workaround disables the write-alloca !! 368 SuperI/O (2S, 1P, FD), RTC/NVRAM. Boot ROM is EPROM. PC-AT size.
597 ACTLR register. Note that setting sp !! 369 Runs from standard PC power supply.
598 may not be available in non-secure m <<
599 a multiplatform kernel. This should <<
600 instead. <<
601 370
602 config ARM_ERRATA_742230 !! 371 config ALPHA_EV5
603 bool "ARM errata: DMB operation may be !! 372 bool "EV5 CPU(s) (model 5/xxx)?" if ALPHA_LYNX
604 depends on CPU_V7 && SMP !! 373 default y if ALPHA_RX164 || ALPHA_RAWHIDE || ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_RUFFIAN || ALPHA_SABLE && ALPHA_GAMMA || ALPHA_NORITAKE && ALPHA_PRIMO || ALPHA_MIKASA && ALPHA_PRIMO || ALPHA_PC164 || ALPHA_TAKARA || ALPHA_EB164 || ALPHA_ALCOR
605 depends on !ARCH_MULTIPLATFORM <<
606 help <<
607 This option enables the workaround f <<
608 (r1p0..r2p2) erratum. Under rare cir <<
609 between two write operations may not <<
610 ordering of the two writes. This wor <<
611 the diagnostic register of the Corte <<
612 instruction to behave as a DSB, ensu <<
613 the two writes. Note that setting sp <<
614 register may not be available in non <<
615 available on a multiplatform kernel. <<
616 bootloader instead. <<
617 374
618 config ARM_ERRATA_742231 !! 375 config ALPHA_EV4
619 bool "ARM errata: Incorrect hazard han !! 376 bool
620 depends on CPU_V7 && SMP !! 377 default y if ALPHA_LYNX && !ALPHA_EV5
621 depends on !ARCH_MULTIPLATFORM <<
622 help <<
623 This option enables the workaround f <<
624 (r2p0..r2p2) erratum. Under certain <<
625 Cortex-A9 MPCore micro-architecture, <<
626 accessing some data located in the s <<
627 data due to bad handling of the addr <<
628 replaced from one of the CPUs at the <<
629 accessing it. This workaround sets s <<
630 register of the Cortex-A9 which redu <<
631 capabilities of the processor. Note <<
632 diagnostics register may not be avai <<
633 is not available on a multiplatform <<
634 the bootloader instead. <<
635 378
636 config ARM_ERRATA_643719 !! 379 config ALPHA_CIA
637 bool "ARM errata: LoUIS bit field in C !! 380 bool
638 depends on CPU_V7 && SMP !! 381 depends on ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_RUFFIAN || ALPHA_NORITAKE && ALPHA_PRIMO || ALPHA_MIKASA && ALPHA_PRIMO || ALPHA_PC164 || ALPHA_TAKARA || ALPHA_EB164 || ALPHA_ALCOR
639 default y 382 default y
640 help <<
641 This option enables the workaround f <<
642 r1p0) erratum. On affected cores the <<
643 register returns zero when it should <<
644 corrects this value, ensuring cache <<
645 it behave as intended and avoiding d <<
646 383
647 config ARM_ERRATA_720789 !! 384 config ALPHA_EV56
648 bool "ARM errata: TLBIASIDIS and TLBIM !! 385 bool "EV56 CPU (speed >= 366MHz)?" if ALPHA_ALCOR
649 depends on CPU_V7 !! 386 default y if ALPHA_RX164 || ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_RUFFIAN || ALPHA_PC164 || ALPHA_TAKARA
650 help <<
651 This option enables the workaround f <<
652 r2p0) erratum. A faulty ASID can be <<
653 broadcasted CP15 TLB maintenance ope <<
654 As a consequence of this erratum, so <<
655 invalidated are not, resulting in an <<
656 tables. The workaround changes the T <<
657 entries regardless of the ASID. <<
658 387
659 config ARM_ERRATA_743622 !! 388 config ALPHA_EV56
660 bool "ARM errata: Faulty hazard checki !! 389 prompt "EV56 CPU (speed >= 333MHz)?"
661 depends on CPU_V7 !! 390 depends on ALPHA_NORITAKE || ALPHA_PRIMO
662 depends on !ARCH_MULTIPLATFORM <<
663 help <<
664 This option enables the workaround f <<
665 (r2p*) erratum. Under very rare cond <<
666 optimisation in the Cortex-A9 Store <<
667 corruption. This workaround sets a s <<
668 register of the Cortex-A9 which disa <<
669 optimisation, preventing the defect <<
670 visible impact on the overall perfor <<
671 processor. Note that setting specifi <<
672 may not be available in non-secure m <<
673 multiplatform kernel. This should be <<
674 391
675 config ARM_ERRATA_751472 !! 392 config ALPHA_EV56
676 bool "ARM errata: Interrupted ICIALLUI !! 393 prompt "EV56 CPU (speed >= 400MHz)?"
677 depends on CPU_V7 !! 394 depends on ALPHA_RAWHIDE
678 depends on !ARCH_MULTIPLATFORM <<
679 help <<
680 This option enables the workaround f <<
681 to r3p0) erratum. An interrupted ICI <<
682 completion of a following broadcaste <<
683 operation is received by a CPU befor <<
684 potentially leading to corrupted ent <<
685 Note that setting specific bits in t <<
686 not be available in non-secure mode <<
687 a multiplatform kernel. This should <<
688 instead. <<
689 395
690 config ARM_ERRATA_754322 !! 396 config ALPHA_PRIMO
691 bool "ARM errata: possible faulty MMU !! 397 bool "EV5 CPU daughtercard (model 5/xxx)?"
692 depends on CPU_V7 !! 398 depends on ALPHA_NORITAKE || ALPHA_MIKASA
693 help 399 help
694 This option enables the workaround f !! 400 Say Y if you have an AS 1000 5/xxx or an AS 1000A 5/xxx.
695 r3p*) erratum. A speculative memory <<
696 which starts prior to an ASID switch <<
697 can populate the micro-TLB with a st <<
698 the new ASID. This workaround places <<
699 switching code so that no page table <<
700 401
701 config ARM_ERRATA_754327 !! 402 config ALPHA_GAMMA
702 bool "ARM errata: no automatic Store B !! 403 bool "EV5 CPU(s) (model 5/xxx)?"
703 depends on CPU_V7 && SMP !! 404 depends on ALPHA_SABLE
704 help 405 help
705 This option enables the workaround f !! 406 Say Y if you have an AS 2000 5/xxx or an AS 2100 5/xxx.
706 r2p0) erratum. The Store Buffer does <<
707 mechanism and therefore a livelock m <<
708 continuously polls a memory location <<
709 This workaround defines cpu_relax() <<
710 written polling loops from denying v <<
711 407
712 config ARM_ERRATA_364296 !! 408 config ALPHA_GAMMA
713 bool "ARM errata: Possible cache data !! 409 bool
714 depends on CPU_V6 !! 410 depends on ALPHA_LYNX
715 help !! 411 default y
716 This options enables the workaround <<
717 r0p2 erratum (possible cache data co <<
718 hit-under-miss enabled). It sets the <<
719 the auxiliary control register and t <<
720 register, thus disabling hit-under-m <<
721 processor into full low interrupt la <<
722 is not affected. <<
723 412
724 config ARM_ERRATA_764369 !! 413 config ALPHA_T2
725 bool "ARM errata: Data cache line main !! 414 bool
726 depends on CPU_V7 && SMP !! 415 depends on ALPHA_SABLE || ALPHA_LYNX
727 help !! 416 default y
728 This option enables the workaround f <<
729 affecting Cortex-A9 MPCore with two <<
730 current revisions). Under certain ti <<
731 cache line maintenance operation by <<
732 Shareable memory region may fail to <<
733 Point of Coherency or to the Point o <<
734 system. This workaround adds a DSB i <<
735 relevant cache maintenance functions <<
736 in the diagnostic control register o <<
737 417
738 config ARM_ERRATA_764319 !! 418 config ALPHA_PYXIS
739 bool "ARM errata: Read to DBGPRSR and !! 419 bool
740 depends on CPU_V7 !! 420 depends on ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_RUFFIAN
741 help !! 421 default y
742 This option enables the workaround f <<
743 CP14 read accesses to the DBGPRSR an <<
744 unexpected Undefined Instruction exc <<
745 external pin is set to 0, even when <<
746 from a privileged mode. This work ar <<
747 way the kernel does not stop executi <<
748 422
749 config ARM_ERRATA_775420 !! 423 config ALPHA_EV6
750 bool "ARM errata: A data cache maintena !! 424 bool
751 depends on CPU_V7 !! 425 depends on ALPHA_NAUTILUS || ALPHA_WILDFIRE || ALPHA_TITAN || ALPHA_SHARK || ALPHA_DP264 || ALPHA_EIGER || ALPHA_MARVEL
752 help !! 426 default y
753 This option enables the workaround fo <<
754 r2p6,r2p8,r2p10,r3p0) erratum. In cas <<
755 operation aborts with MMU exception, <<
756 to deadlock. This workaround puts DSB <<
757 an abort may occur on cache maintenan <<
758 427
759 config ARM_ERRATA_798181 !! 428 config ALPHA_TSUNAMI
760 bool "ARM errata: TLBI/DSB failure on !! 429 bool
761 depends on CPU_V7 && SMP !! 430 depends on ALPHA_SHARK || ALPHA_DP264 || ALPHA_EIGER
762 help !! 431 default y
763 On Cortex-A15 (r0p0..r3p2) the TLBI* <<
764 adequately shooting down all use of <<
765 option enables the Linux kernel work <<
766 which sends an IPI to the CPUs that <<
767 as the one being invalidated. <<
768 432
769 config ARM_ERRATA_773022 !! 433 config ALPHA_EV67
770 bool "ARM errata: incorrect instructio !! 434 bool "EV67 (or later) CPU (speed > 600MHz)?" if ALPHA_DP264 || ALPHA_EIGER
771 depends on CPU_V7 !! 435 default y if ALPHA_NAUTILUS || ALPHA_WILDFIRE || ALPHA_TITAN || ALPHA_SHARK || ALPHA_MARVEL
772 help 436 help
773 This option enables the workaround f !! 437 Is this a machine based on the EV67 core? If in doubt, select N here
774 (up to r0p4) erratum. In certain rar !! 438 and the machine will be treated as an EV6.
775 loop buffer may deliver incorrect in <<
776 workaround disables the loop buffer <<
777 439
778 config ARM_ERRATA_818325_852422 !! 440 config ALPHA_MCPCIA
779 bool "ARM errata: A12: some seqs of op !! 441 bool
780 depends on CPU_V7 !! 442 depends on ALPHA_RAWHIDE
781 help !! 443 default y
782 This option enables the workaround f <<
783 - Cortex-A12 818325: Execution of an <<
784 instruction might deadlock. Fixed <<
785 - Cortex-A12 852422: Execution of a <<
786 lead to either a data corruption o <<
787 any Cortex-A12 cores yet. <<
788 This workaround for all both errata <<
789 Feature Register. This bit disables <<
790 sequence of 2 instructions that use <<
791 444
792 config ARM_ERRATA_821420 !! 445 config ALPHA_POLARIS
793 bool "ARM errata: A12: sequence of VMO !! 446 bool
794 depends on CPU_V7 !! 447 depends on ALPHA_RX164
795 help !! 448 default y
796 This option enables the workaround f <<
797 (all revs) erratum. In very rare tim <<
798 of VMOV to Core registers instructio <<
799 one is in the shadow of a branch or <<
800 deadlock when the VMOV instructions <<
801 449
802 config ARM_ERRATA_825619 !! 450 config ALPHA_IRONGATE
803 bool "ARM errata: A12: DMB NSHST/ISHST !! 451 bool
804 depends on CPU_V7 !! 452 depends on ALPHA_NAUTILUS
805 help !! 453 default y
806 This option enables the workaround f <<
807 (all revs) erratum. Within rare timi <<
808 DMB NSHST or DMB ISHST instruction f <<
809 and Device/Strongly-Ordered loads an <<
810 454
811 config ARM_ERRATA_857271 !! 455 config GENERIC_HWEIGHT
812 bool "ARM errata: A12: CPU might deadl !! 456 bool
813 depends on CPU_V7 !! 457 default y if !ALPHA_EV67
814 help <<
815 This option enables the workaround f <<
816 (all revs) erratum. Under very rare <<
817 hang. The workaround is expected to <<
818 458
819 config ARM_ERRATA_852421 !! 459 config ALPHA_AVANTI
820 bool "ARM errata: A17: DMB ST might fa !! 460 bool
821 depends on CPU_V7 !! 461 depends on ALPHA_XL || ALPHA_AVANTI_CH
>> 462 default y
822 help 463 help
823 This option enables the workaround f !! 464 Avanti AS 200, AS 205, AS 250, AS 255, AS 300, and AS 400-based
824 (r1p0, r1p1, r1p2) erratum. Under ve !! 465 Alphas. Info at
825 execution of a DMB ST instruction mi !! 466 <http://www.unix-ag.org/Linux-Alpha/Architectures/Avanti.html>.
826 stores from GroupA and stores from G <<
827 467
828 config ARM_ERRATA_852423 !! 468 config ALPHA_BROKEN_IRQ_MASK
829 bool "ARM errata: A17: some seqs of op !! 469 bool
830 depends on CPU_V7 !! 470 depends on ALPHA_GENERIC || ALPHA_PC164
831 help !! 471 default y
832 This option enables the workaround f <<
833 - Cortex-A17 852423: Execution of a <<
834 lead to either a data corruption o <<
835 any Cortex-A17 cores yet. <<
836 This is identical to Cortex-A12 erra <<
837 config option from the A12 erratum d <<
838 for and handled. <<
839 472
840 config ARM_ERRATA_857272 !! 473 config VGA_HOSE
841 bool "ARM errata: A17: CPU might deadl !! 474 bool
842 depends on CPU_V7 !! 475 depends on VGA_CONSOLE && (ALPHA_GENERIC || ALPHA_TITAN || ALPHA_MARVEL || ALPHA_TSUNAMI)
>> 476 default y
843 help 477 help
844 This option enables the workaround f !! 478 Support VGA on an arbitrary hose; needed for several platforms
845 This erratum is not known to be fixe !! 479 which always have multiple hoses, and whose consoles support it.
846 This is identical to Cortex-A12 erra <<
847 config option from the A12 erratum d <<
848 for and handled. <<
849 <<
850 endmenu <<
851 <<
852 source "arch/arm/common/Kconfig" <<
853 480
854 menu "Bus support" <<
855 481
856 config ISA !! 482 config ALPHA_QEMU
857 bool !! 483 bool "Run under QEMU emulation"
>> 484 depends on !ALPHA_GENERIC
858 help 485 help
859 Find out whether you have ISA slots !! 486 Assume the presence of special features supported by QEMU PALcode
860 name of a bus system, i.e. the way t !! 487 that reduce the overhead of system emulation.
861 inside your box. Other bus systems <<
862 (MCA) or VESA. ISA is an older syst <<
863 newer boards don't support it. If y <<
864 488
865 # Select ISA DMA interface !! 489 Generic kernels will auto-detect QEMU. But when building a
866 config ISA_DMA_API !! 490 system-specific kernel, the assumption is that we want to
867 bool !! 491 eliminate as many runtime tests as possible.
868 492
869 config ARM_ERRATA_814220 !! 493 If unsure, say N.
870 bool "ARM errata: Cache maintenance by <<
871 depends on CPU_V7 <<
872 help <<
873 The v7 ARM states that all cache and <<
874 operations that do not specify an ad <<
875 each other, in program order. <<
876 However, because of this erratum, an <<
877 operation can overtake an L1 set/way <<
878 This ERRATA only affected the Cortex <<
879 r0p4, r0p5. <<
880 494
881 endmenu <<
882 495
883 menu "Kernel Features" !! 496 config ALPHA_SRM
>> 497 bool "Use SRM as bootloader" if ALPHA_CABRIOLET || ALPHA_AVANTI_CH || ALPHA_EB64P || ALPHA_PC164 || ALPHA_TAKARA || ALPHA_EB164 || ALPHA_ALCOR || ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_NAUTILUS || ALPHA_NONAME
>> 498 depends on TTY
>> 499 default y if ALPHA_JENSEN || ALPHA_MIKASA || ALPHA_SABLE || ALPHA_LYNX || ALPHA_NORITAKE || ALPHA_DP264 || ALPHA_RAWHIDE || ALPHA_EIGER || ALPHA_WILDFIRE || ALPHA_TITAN || ALPHA_SHARK || ALPHA_MARVEL
>> 500 help
>> 501 There are two different types of booting firmware on Alphas: SRM,
>> 502 which is command line driven, and ARC, which uses menus and arrow
>> 503 keys. Details about the Linux/Alpha booting process are contained in
>> 504 the Linux/Alpha FAQ, accessible on the WWW from
>> 505 <http://www.alphalinux.org/>.
>> 506
>> 507 The usual way to load Linux on an Alpha machine is to use MILO
>> 508 (a bootloader that lets you pass command line parameters to the
>> 509 kernel just like lilo does for the x86 architecture) which can be
>> 510 loaded either from ARC or can be installed directly as a permanent
>> 511 firmware replacement from floppy (which requires changing a certain
>> 512 jumper on the motherboard). If you want to do either of these, say N
>> 513 here. If MILO doesn't work on your system (true for Jensen
>> 514 motherboards), you can bypass it altogether and boot Linux directly
>> 515 from an SRM console; say Y here in order to do that. Note that you
>> 516 won't be able to boot from an IDE disk using SRM.
884 517
885 config HAVE_SMP !! 518 If unsure, say N.
886 bool <<
887 help <<
888 This option should be selected by ma <<
889 capable CPU. <<
890 519
891 The only effect of this option is to !! 520 config ARCH_MAY_HAVE_PC_FDC
892 options available to the user for co !! 521 def_bool y
893 522
894 config SMP 523 config SMP
895 bool "Symmetric Multi-Processing" !! 524 bool "Symmetric multi-processing support"
896 depends on CPU_V6K || CPU_V7 !! 525 depends on ALPHA_SABLE || ALPHA_LYNX || ALPHA_RAWHIDE || ALPHA_DP264 || ALPHA_WILDFIRE || ALPHA_TITAN || ALPHA_GENERIC || ALPHA_SHARK || ALPHA_MARVEL
897 depends on HAVE_SMP <<
898 depends on MMU || ARM_MPU <<
899 select IRQ_WORK <<
900 help 526 help
901 This enables support for systems wit 527 This enables support for systems with more than one CPU. If you have
902 a system with only one CPU, say N. I 528 a system with only one CPU, say N. If you have a system with more
903 than one CPU, say Y. 529 than one CPU, say Y.
904 530
905 If you say N here, the kernel will r 531 If you say N here, the kernel will run on uni- and multiprocessor
906 machines, but will use only one CPU 532 machines, but will use only one CPU of a multiprocessor machine. If
907 you say Y here, the kernel will run 533 you say Y here, the kernel will run on many, but not all,
908 uniprocessor machines. On a uniproce 534 uniprocessor machines. On a uniprocessor machine, the kernel
909 will run faster if you say N here. 535 will run faster if you say N here.
910 536
911 See also <file:Documentation/arch/x8 !! 537 See also the SMP-HOWTO available at
912 <file:Documentation/admin-guide/lock !! 538 <http://www.tldp.org/docs.html#howto>.
913 <http://tldp.org/HOWTO/SMP-HOWTO.htm <<
914 539
915 If you don't know what to do here, s 540 If you don't know what to do here, say N.
916 541
917 config SMP_ON_UP <<
918 bool "Allow booting SMP kernel on unip <<
919 depends on SMP && MMU <<
920 default y <<
921 help <<
922 SMP kernels contain instructions whi <<
923 Enabling this option allows the kern <<
924 these instructions safe. Disabling <<
925 savings. <<
926 <<
927 If you don't know what to do here, s <<
928 <<
929 <<
930 config CURRENT_POINTER_IN_TPIDRURO <<
931 def_bool y <<
932 depends on CPU_32v6K && !CPU_V6 <<
933 <<
934 config IRQSTACKS <<
935 def_bool y <<
936 select HAVE_IRQ_EXIT_ON_IRQ_STACK <<
937 select HAVE_SOFTIRQ_ON_OWN_STACK <<
938 <<
939 config ARM_CPU_TOPOLOGY <<
940 bool "Support cpu topology definition" <<
941 depends on SMP && CPU_V7 <<
942 default y <<
943 help <<
944 Support ARM cpu topology definition. <<
945 affinity between processors which is <<
946 topology of an ARM System. <<
947 <<
948 config SCHED_MC <<
949 bool "Multi-core scheduler support" <<
950 depends on ARM_CPU_TOPOLOGY <<
951 help <<
952 Multi-core scheduler support improve <<
953 making when dealing with multi-core <<
954 increased overhead in some places. I <<
955 <<
956 config SCHED_SMT <<
957 bool "SMT scheduler support" <<
958 depends on ARM_CPU_TOPOLOGY <<
959 help <<
960 Improves the CPU scheduler's decisio <<
961 MultiThreading at a cost of slightly <<
962 places. If unsure say N here. <<
963 <<
964 config HAVE_ARM_SCU <<
965 bool <<
966 help <<
967 This option enables support for the <<
968 <<
969 config HAVE_ARM_ARCH_TIMER <<
970 bool "Architected timer support" <<
971 depends on CPU_V7 <<
972 select ARM_ARCH_TIMER <<
973 help <<
974 This option enables support for the <<
975 <<
976 config HAVE_ARM_TWD <<
977 bool <<
978 help <<
979 This options enables support for the <<
980 <<
981 config MCPM <<
982 bool "Multi-Cluster Power Management" <<
983 depends on CPU_V7 && SMP <<
984 help <<
985 This option provides the common powe <<
986 for (multi-)cluster based systems, s <<
987 systems. <<
988 <<
989 config MCPM_QUAD_CLUSTER <<
990 bool <<
991 depends on MCPM <<
992 help <<
993 To avoid wasting resources unnecessa <<
994 to 2 clusters by default. <<
995 Platforms with 3 or 4 clusters that <<
996 option to allow the additional clust <<
997 <<
998 config BIG_LITTLE <<
999 bool "big.LITTLE support (Experimental <<
1000 depends on CPU_V7 && SMP <<
1001 select MCPM <<
1002 help <<
1003 This option enables support selecti <<
1004 system architecture. <<
1005 <<
1006 config BL_SWITCHER <<
1007 bool "big.LITTLE switcher support" <<
1008 depends on BIG_LITTLE && MCPM && HOTP <<
1009 select CPU_PM <<
1010 help <<
1011 The big.LITTLE "switcher" provides <<
1012 transparently handle transition bet <<
1013 and a cluster of A7's in a big.LITT <<
1014 <<
1015 config BL_SWITCHER_DUMMY_IF <<
1016 tristate "Simple big.LITTLE switcher <<
1017 depends on BL_SWITCHER && DEBUG_KERNE <<
1018 help <<
1019 This is a simple and dummy char dev <<
1020 the big.LITTLE switcher core code. <<
1021 debugging purposes only. <<
1022 <<
1023 choice <<
1024 prompt "Memory split" <<
1025 depends on MMU <<
1026 default VMSPLIT_3G <<
1027 help <<
1028 Select the desired split between ke <<
1029 <<
1030 If you are not absolutely sure what <<
1031 option alone! <<
1032 <<
1033 config VMSPLIT_3G <<
1034 bool "3G/1G user/kernel split <<
1035 config VMSPLIT_3G_OPT <<
1036 depends on !ARM_LPAE <<
1037 bool "3G/1G user/kernel split <<
1038 config VMSPLIT_2G <<
1039 bool "2G/2G user/kernel split <<
1040 config VMSPLIT_1G <<
1041 bool "1G/3G user/kernel split <<
1042 endchoice <<
1043 <<
1044 config PAGE_OFFSET <<
1045 hex <<
1046 default PHYS_OFFSET if !MMU <<
1047 default 0x40000000 if VMSPLIT_1G <<
1048 default 0x80000000 if VMSPLIT_2G <<
1049 default 0xB0000000 if VMSPLIT_3G_OPT <<
1050 default 0xC0000000 <<
1051 <<
1052 config KASAN_SHADOW_OFFSET <<
1053 hex <<
1054 depends on KASAN <<
1055 default 0x1f000000 if PAGE_OFFSET=0x4 <<
1056 default 0x5f000000 if PAGE_OFFSET=0x8 <<
1057 default 0x9f000000 if PAGE_OFFSET=0xC <<
1058 default 0x8f000000 if PAGE_OFFSET=0xB <<
1059 default 0xffffffff <<
1060 <<
1061 config NR_CPUS 542 config NR_CPUS
1062 int "Maximum number of CPUs (2-32)" 543 int "Maximum number of CPUs (2-32)"
1063 range 2 16 if DEBUG_KMAP_LOCAL !! 544 range 2 32
1064 range 2 32 if !DEBUG_KMAP_LOCAL <<
1065 depends on SMP <<
1066 default "4" <<
1067 help <<
1068 The maximum number of CPUs that the <<
1069 Up to 32 CPUs can be supported, or <<
1070 debugging is enabled, which uses ha <<
1071 slots as guard regions. <<
1072 <<
1073 config HOTPLUG_CPU <<
1074 bool "Support for hot-pluggable CPUs" <<
1075 depends on SMP 545 depends on SMP
1076 select GENERIC_IRQ_MIGRATION !! 546 default "32" if ALPHA_GENERIC || ALPHA_MARVEL
>> 547 default "4" if !ALPHA_GENERIC && !ALPHA_MARVEL
1077 help 548 help
1078 Say Y here to experiment with turni !! 549 MARVEL support can handle a maximum of 32 CPUs, all the others
1079 can be controlled through /sys/devi !! 550 with working support have a maximum of 4 CPUs.
1080 <<
1081 config ARM_PSCI <<
1082 bool "Support for the ARM Power State <<
1083 depends on HAVE_ARM_SMCCC <<
1084 select ARM_PSCI_FW <<
1085 help <<
1086 Say Y here if you want Linux to com <<
1087 implementing the PSCI specification <<
1088 management operations described in <<
1089 0022A ("Power State Coordination In <<
1090 ARM processors"). <<
1091 <<
1092 config HZ_FIXED <<
1093 int <<
1094 default 128 if SOC_AT91RM9200 <<
1095 default 0 <<
1096 <<
1097 choice <<
1098 depends on HZ_FIXED = 0 <<
1099 prompt "Timer frequency" <<
1100 551
1101 config HZ_100 !! 552 config ARCH_DISCONTIGMEM_ENABLE
1102 bool "100 Hz" !! 553 bool "Discontiguous Memory Support"
1103 !! 554 depends on BROKEN
1104 config HZ_200 !! 555 help
1105 bool "200 Hz" !! 556 Say Y to support efficient handling of discontiguous physical memory,
1106 !! 557 for architectures which are either NUMA (Non-Uniform Memory Access)
1107 config HZ_250 !! 558 or have huge holes in the physical address space for other reasons.
1108 bool "250 Hz" !! 559 See <file:Documentation/vm/numa.rst> for more.
1109 <<
1110 config HZ_300 <<
1111 bool "300 Hz" <<
1112 <<
1113 config HZ_500 <<
1114 bool "500 Hz" <<
1115 <<
1116 config HZ_1000 <<
1117 bool "1000 Hz" <<
1118 <<
1119 endchoice <<
1120 <<
1121 config HZ <<
1122 int <<
1123 default HZ_FIXED if HZ_FIXED != 0 <<
1124 default 100 if HZ_100 <<
1125 default 200 if HZ_200 <<
1126 default 250 if HZ_250 <<
1127 default 300 if HZ_300 <<
1128 default 500 if HZ_500 <<
1129 default 1000 <<
1130 <<
1131 config SCHED_HRTICK <<
1132 def_bool HIGH_RES_TIMERS <<
1133 <<
1134 config THUMB2_KERNEL <<
1135 bool "Compile the kernel in Thumb-2 m <<
1136 depends on (CPU_V7 || CPU_V7M) && !CP <<
1137 default y if CPU_THUMBONLY <<
1138 select ARM_UNWIND <<
1139 help <<
1140 By enabling this option, the kernel <<
1141 Thumb-2 mode. <<
1142 <<
1143 If unsure, say N. <<
1144 <<
1145 config ARM_PATCH_IDIV <<
1146 bool "Runtime patch udiv/sdiv instruc <<
1147 depends on CPU_32v7 <<
1148 default y <<
1149 help <<
1150 The ARM compiler inserts calls to _ <<
1151 __aeabi_uidiv() when it needs to pe <<
1152 and unsigned integers. Some v7 CPUs <<
1153 and udiv instructions that can be u <<
1154 functions. <<
1155 <<
1156 Enabling this option allows the ker <<
1157 replace the first two instructions <<
1158 with the sdiv or udiv plus "bx lr" <<
1159 it is running on supports them. Typ <<
1160 and less power intensive than runni <<
1161 code to do integer division. <<
1162 <<
1163 config AEABI <<
1164 bool "Use the ARM EABI to compile the <<
1165 !CPU_V7M && !CPU_V6 && !CPU_V <<
1166 default CPU_V7 || CPU_V7M || CPU_V6 | <<
1167 help <<
1168 This option allows for the kernel t <<
1169 ARM ABI (aka EABI). This is only u <<
1170 space environment that is also comp <<
1171 <<
1172 Since there are major incompatibili <<
1173 EABI, especially with regard to str <<
1174 option also changes the kernel sysc <<
1175 disambiguate both ABIs and allow fo <<
1176 (selected with CONFIG_OABI_COMPAT). <<
1177 <<
1178 To use this you need GCC version 4. <<
1179 <<
1180 config OABI_COMPAT <<
1181 bool "Allow old ABI binaries to run w <<
1182 depends on AEABI && !THUMB2_KERNEL <<
1183 help <<
1184 This option preserves the old sysca <<
1185 new (ARM EABI) one. It also provide <<
1186 intercept syscalls that have struct <<
1187 in memory differs between the legac <<
1188 (only for non "thumb" binaries). Th <<
1189 overhead to all syscalls and produc <<
1190 <<
1191 The seccomp filter system will not <<
1192 selected, since there is no way yet <<
1193 between calling conventions during <<
1194 <<
1195 If you know you'll be using only pu <<
1196 can say N here. If this option is n <<
1197 to execute a legacy ABI binary then <<
1198 UNPREDICTABLE (in fact it can be pr <<
1199 at all). If in doubt say N. <<
1200 <<
1201 config ARCH_SELECT_MEMORY_MODEL <<
1202 def_bool y <<
1203 <<
1204 config ARCH_FLATMEM_ENABLE <<
1205 def_bool !(ARCH_RPC || ARCH_SA1100) <<
1206 560
1207 config ARCH_SPARSEMEM_ENABLE 561 config ARCH_SPARSEMEM_ENABLE
1208 def_bool !ARCH_FOOTBRIDGE !! 562 bool "Sparse Memory Support"
1209 select SPARSEMEM_STATIC if SPARSEMEM <<
1210 <<
1211 config HIGHMEM <<
1212 bool "High Memory Support" <<
1213 depends on MMU <<
1214 select KMAP_LOCAL <<
1215 select KMAP_LOCAL_NON_LINEAR_PTE_ARRA <<
1216 help <<
1217 The address space of ARM processors <<
1218 and it has to accommodate user addr <<
1219 space as well as some memory mapped <<
1220 have a large amount of physical mem <<
1221 memory can be "permanently mapped" <<
1222 memory that is not permanently mapp <<
1223 <<
1224 Depending on the selected kernel/us <<
1225 vmalloc space and actual amount of <<
1226 option which should result in a sli <<
1227 <<
1228 If unsure, say n. <<
1229 <<
1230 config HIGHPTE <<
1231 bool "Allocate 2nd-level pagetables f <<
1232 depends on HIGHMEM <<
1233 default y <<
1234 help <<
1235 The VM uses one page of physical me <<
1236 For systems with a lot of processes <<
1237 precious low memory, eventually lea <<
1238 consumed by page tables. Setting t <<
1239 user-space 2nd level page tables to <<
1240 <<
1241 config ARM_PAN <<
1242 bool "Enable privileged no-access" <<
1243 depends on MMU <<
1244 default y <<
1245 help <<
1246 Increase kernel security by ensurin <<
1247 are unable to access userspace addr <<
1248 use-after-free bugs becoming an exp <<
1249 by ensuring that magic values (such <<
1250 fault when dereferenced. <<
1251 <<
1252 The implementation uses CPU domains <<
1253 disabling of TTBR0 page table walks <<
1254 <<
1255 config CPU_SW_DOMAIN_PAN <<
1256 def_bool y <<
1257 depends on ARM_PAN && !ARM_LPAE <<
1258 help 563 help
1259 Enable use of CPU domains to implem !! 564 Say Y to support efficient handling of discontiguous physical memory,
>> 565 for systems that have huge holes in the physical address space.
1260 566
1261 CPUs with low-vector mappings use a !! 567 config NUMA
1262 Their lower 1MB needs to remain acc !! 568 bool "NUMA Support (EXPERIMENTAL)"
1263 the remainder of userspace will bec !! 569 depends on DISCONTIGMEM && BROKEN
>> 570 help
>> 571 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
>> 572 Access). This option is for configuring high-end multiprocessor
>> 573 server machines. If in doubt, say N.
>> 574
>> 575 config ALPHA_WTINT
>> 576 bool "Use WTINT" if ALPHA_SRM || ALPHA_GENERIC
>> 577 default y if ALPHA_QEMU
>> 578 default n if ALPHA_EV5 || ALPHA_EV56 || (ALPHA_EV4 && !ALPHA_LCA)
>> 579 default n if !ALPHA_SRM && !ALPHA_GENERIC
>> 580 default y if SMP
>> 581 help
>> 582 The Wait for Interrupt (WTINT) PALcall attempts to place the CPU
>> 583 to sleep until the next interrupt. This may reduce the power
>> 584 consumed, and the heat produced by the computer. However, it has
>> 585 the side effect of making the cycle counter unreliable as a timing
>> 586 device across the sleep.
1264 587
1265 config CPU_TTBR0_PAN !! 588 For emulation under QEMU, definitely say Y here, as we have other
1266 def_bool y !! 589 mechanisms for measuring time than the cycle counter.
1267 depends on ARM_PAN && ARM_LPAE <<
1268 help <<
1269 Enable privileged no-access by disa <<
1270 running in kernel mode. <<
1271 <<
1272 config HW_PERF_EVENTS <<
1273 def_bool y <<
1274 depends on ARM_PMU <<
1275 <<
1276 config ARM_MODULE_PLTS <<
1277 bool "Use PLTs to allow module memory <<
1278 depends on MODULES <<
1279 select KASAN_VMALLOC if KASAN <<
1280 default y <<
1281 help <<
1282 Allocate PLTs when loading modules <<
1283 targets are too far away for their <<
1284 in the instructions themselves can <<
1285 module's PLT. This allows modules t <<
1286 vmalloc area after the dedicated mo <<
1287 exhausted. The modules will use sli <<
1288 rounding up to page size, the actua <<
1289 the same. <<
1290 <<
1291 Disabling this is usually safe for <<
1292 configurations. If unsure, say y. <<
1293 <<
1294 config ARCH_FORCE_MAX_ORDER <<
1295 int "Order of maximal physically cont <<
1296 default "11" if SOC_AM33XX <<
1297 default "8" if SA1111 <<
1298 default "10" <<
1299 help <<
1300 The kernel page allocator limits th <<
1301 contiguous allocations. The limit i <<
1302 defines the maximal power of two of <<
1303 allocated as a single contiguous bl <<
1304 overriding the default setting when <<
1305 large blocks of physically contiguo <<
1306 <<
1307 Don't change if unsure. <<
1308 <<
1309 config ALIGNMENT_TRAP <<
1310 def_bool CPU_CP15_MMU <<
1311 select HAVE_PROC_CPU if PROC_FS <<
1312 help <<
1313 ARM processors cannot fetch/store i <<
1314 naturally aligned on the bus, i.e., <<
1315 address divisible by 4. On 32-bit A <<
1316 fetch/store instructions will be em <<
1317 here, which has a severe performanc <<
1318 correct operation of some network p <<
1319 configuration it is safe to say N, <<
1320 <<
1321 config UACCESS_WITH_MEMCPY <<
1322 bool "Use kernel mem{cpy,set}() for { <<
1323 depends on MMU <<
1324 default y if CPU_FEROCEON <<
1325 help <<
1326 Implement faster copy_to_user and c <<
1327 cores where a 8-word STM instructio <<
1328 memory write throughput than a sequ <<
1329 <<
1330 A possible side effect is a slight <<
1331 between threads sharing the same ad <<
1332 such copy operations with large buf <<
1333 <<
1334 However, if the CPU data cache is u <<
1335 this option is unlikely to provide <<
1336 <<
1337 config PARAVIRT <<
1338 bool "Enable paravirtualization code" <<
1339 help <<
1340 This changes the kernel so it can m <<
1341 under a hypervisor, potentially imp <<
1342 over full virtualization. <<
1343 <<
1344 config PARAVIRT_TIME_ACCOUNTING <<
1345 bool "Paravirtual steal time accounti <<
1346 select PARAVIRT <<
1347 help <<
1348 Select this option to enable fine g <<
1349 accounting. Time spent executing ot <<
1350 the current vCPU is discounted from <<
1351 that, there can be a small performa <<
1352 590
1353 If in doubt, say N here. !! 591 For EV4 (but not LCA), EV5 and EV56 systems, or for systems running
>> 592 MILO, sleep mode is not supported so you might as well say N here.
1354 593
1355 config XEN_DOM0 !! 594 For SMP systems we cannot use the cycle counter for timing anyway,
1356 def_bool y !! 595 so you might as well say Y here.
1357 depends on XEN <<
1358 596
1359 config XEN !! 597 If unsure, say N.
1360 bool "Xen guest support on ARM" <<
1361 depends on ARM && AEABI && OF <<
1362 depends on CPU_V7 && !CPU_V6 <<
1363 depends on !GENERIC_ATOMIC64 <<
1364 depends on MMU <<
1365 select ARCH_DMA_ADDR_T_64BIT <<
1366 select ARM_PSCI <<
1367 select SWIOTLB <<
1368 select SWIOTLB_XEN <<
1369 select PARAVIRT <<
1370 help <<
1371 Say Y if you want to run Linux in a <<
1372 <<
1373 config CC_HAVE_STACKPROTECTOR_TLS <<
1374 def_bool $(cc-option,-mtp=cp15 -mstac <<
1375 <<
1376 config STACKPROTECTOR_PER_TASK <<
1377 bool "Use a unique stack canary value <<
1378 depends on STACKPROTECTOR && CURRENT_ <<
1379 depends on GCC_PLUGINS || CC_HAVE_STA <<
1380 select GCC_PLUGIN_ARM_SSP_PER_TASK if <<
1381 default y <<
1382 help <<
1383 Due to the fact that GCC uses an or <<
1384 which to load the value of the stac <<
1385 change at reboot time on SMP system <<
1386 kernel's address space are forced t <<
1387 the entire duration that the system <<
1388 <<
1389 Enable this option to switch to a d <<
1390 different canary value for each tas <<
1391 <<
1392 endmenu <<
1393 598
1394 menu "Boot options" !! 599 config NODES_SHIFT
>> 600 int
>> 601 default "7"
>> 602 depends on NEED_MULTIPLE_NODES
1395 603
1396 config USE_OF !! 604 # LARGE_VMALLOC is racy, if you *really* need it then fix it first
1397 bool "Flattened Device Tree support" !! 605 config ALPHA_LARGE_VMALLOC
1398 select IRQ_DOMAIN !! 606 bool
1399 select OF <<
1400 help 607 help
1401 Include support for flattened devic !! 608 Process creation and other aspects of virtual memory management can
>> 609 be streamlined if we restrict the kernel to one PGD for all vmalloc
>> 610 allocations. This equates to about 8GB.
1402 611
1403 config ARCH_WANT_FLAT_DTB_INSTALL !! 612 Under normal circumstances, this is so far and above what is needed
1404 def_bool y !! 613 as to be laughable. However, there are certain applications (such
>> 614 as benchmark-grade in-kernel web serving) that can make use of as
>> 615 much vmalloc space as is available.
1405 616
1406 config ATAGS !! 617 Say N unless you know you need gobs and gobs of vmalloc space.
1407 bool "Support for the traditional ATA <<
1408 default y <<
1409 help <<
1410 This is the traditional way of pass <<
1411 time. If you are solely relying on <<
1412 the ARM_ATAG_DTB_COMPAT option) the <<
1413 to remove ATAGS support from your k <<
1414 <<
1415 config DEPRECATED_PARAM_STRUCT <<
1416 bool "Provide old way to pass kernel <<
1417 depends on ATAGS <<
1418 help <<
1419 This was deprecated in 2001 and ann <<
1420 Some old boot loaders still use thi <<
1421 <<
1422 # Compressed boot loader in ROM. Yes, we rea <<
1423 # TEXT and BSS so we preserve their values in <<
1424 config ZBOOT_ROM_TEXT <<
1425 hex "Compressed ROM boot loader base <<
1426 default 0x0 <<
1427 help <<
1428 The physical address at which the R <<
1429 placed in the target. Platforms wh <<
1430 ROM-able zImage formats normally se <<
1431 value in their defconfig file. <<
1432 <<
1433 If ZBOOT_ROM is not enabled, this h <<
1434 <<
1435 config ZBOOT_ROM_BSS <<
1436 hex "Compressed ROM boot loader BSS a <<
1437 default 0x0 <<
1438 help <<
1439 The base address of an area of read <<
1440 for the ROM-able zImage which must <<
1441 decompressor is running. It must be <<
1442 entire decompressed kernel plus an <<
1443 Platforms which normally make use o <<
1444 normally set this to a suitable val <<
1445 <<
1446 If ZBOOT_ROM is not enabled, this h <<
1447 <<
1448 config ZBOOT_ROM <<
1449 bool "Compressed boot loader in ROM/f <<
1450 depends on ZBOOT_ROM_TEXT != ZBOOT_RO <<
1451 depends on !ARM_APPENDED_DTB && !XIP_ <<
1452 help <<
1453 Say Y here if you intend to execute <<
1454 (zImage) directly from ROM or flash <<
1455 <<
1456 config ARM_APPENDED_DTB <<
1457 bool "Use appended device tree blob t <<
1458 depends on OF <<
1459 help <<
1460 With this option, the boot code wil <<
1461 (DTB) appended to zImage <<
1462 (e.g. cat zImage <filename>.dtb > z <<
1463 <<
1464 This is meant as a backward compati <<
1465 systems with a bootloader that can' <<
1466 the documented boot protocol using <<
1467 <<
1468 Beware that there is very little in <<
1469 this option being confused by lefto <<
1470 look like a DTB header after a rebo <<
1471 to zImage. Do not leave this optio <<
1472 if you don't intend to always appen <<
1473 location into r2 of a bootloader pr <<
1474 to this option. <<
1475 <<
1476 config ARM_ATAG_DTB_COMPAT <<
1477 bool "Supplement the appended DTB wit <<
1478 depends on ARM_APPENDED_DTB <<
1479 help <<
1480 Some old bootloaders can't be updat <<
1481 they provide ATAGs with memory conf <<
1482 the kernel cmdline string, etc. Su <<
1483 provided by the bootloader and can' <<
1484 DTB. To allow a device tree enable <<
1485 bootloaders, this option allows zIm <<
1486 from the ATAG list and store it at <<
1487 618
1488 choice !! 619 config VERBOSE_MCHECK
1489 prompt "Kernel command line type" !! 620 bool "Verbose Machine Checks"
1490 depends on ARM_ATAG_DTB_COMPAT <<
1491 default ARM_ATAG_DTB_COMPAT_CMDLINE_F <<
1492 <<
1493 config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTL <<
1494 bool "Use bootloader kernel arguments <<
1495 help <<
1496 Uses the command-line options passe <<
1497 the device tree bootargs property. <<
1498 any, the device tree bootargs prope <<
1499 621
1500 config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND !! 622 config VERBOSE_MCHECK_ON
1501 bool "Extend with bootloader kernel a !! 623 int "Verbose Printing Mode (0=off, 1=on, 2=all)"
>> 624 depends on VERBOSE_MCHECK
>> 625 default 1
1502 help 626 help
1503 The command-line arguments provided !! 627 This option allows the default printing mode to be set, and then
1504 appended to the the device tree boo !! 628 possibly overridden by a boot command argument.
1505 629
1506 endchoice !! 630 For example, if one wanted the option of printing verbose
>> 631 machine checks, but wanted the default to be as if verbose
>> 632 machine check printing was turned off, then one would choose
>> 633 the printing mode to be 0. Then, upon reboot, one could add
>> 634 the boot command line "verbose_mcheck=1" to get the normal
>> 635 verbose machine check printing, or "verbose_mcheck=2" to get
>> 636 the maximum information available.
1507 637
1508 config CMDLINE !! 638 Take the default (1) unless you want more control or more info.
1509 string "Default kernel command string <<
1510 default "" <<
1511 help <<
1512 On some architectures (e.g. CATS), <<
1513 for the boot loader to pass argumen <<
1514 architectures, you should supply so <<
1515 time by entering them here. As a mi <<
1516 memory size and the root device (e. <<
1517 639
1518 choice 640 choice
1519 prompt "Kernel command line type" !! 641 prompt "Timer interrupt frequency (HZ)?"
1520 depends on CMDLINE != "" !! 642 default HZ_128 if ALPHA_QEMU
1521 default CMDLINE_FROM_BOOTLOADER !! 643 default HZ_1200 if ALPHA_RAWHIDE
1522 !! 644 default HZ_1024
1523 config CMDLINE_FROM_BOOTLOADER !! 645 help
1524 bool "Use bootloader kernel arguments !! 646 The frequency at which timer interrupts occur. A high frequency
1525 help !! 647 minimizes latency, whereas a low frequency minimizes overhead of
1526 Uses the command-line options passe !! 648 process accounting. The later effect is especially significant
1527 the boot loader doesn't provide any !! 649 when being run under QEMU.
1528 string provided in CMDLINE will be !! 650
1529 !! 651 Note that some Alpha hardware cannot change the interrupt frequency
1530 config CMDLINE_EXTEND !! 652 of the timer. If unsure, say 1024 (or 1200 for Rawhide).
1531 bool "Extend bootloader kernel argume !! 653
1532 help !! 654 config HZ_32
1533 The command-line arguments provided !! 655 bool "32 Hz"
1534 appended to the default kernel comm !! 656 config HZ_64
1535 !! 657 bool "64 Hz"
1536 config CMDLINE_FORCE !! 658 config HZ_128
1537 bool "Always use the default kernel c !! 659 bool "128 Hz"
1538 help !! 660 config HZ_256
1539 Always use the default kernel comma !! 661 bool "256 Hz"
1540 loader passes other arguments to th !! 662 config HZ_1024
1541 This is useful if you cannot or don !! 663 bool "1024 Hz"
1542 command-line options your boot load !! 664 config HZ_1200
>> 665 bool "1200 Hz"
1543 endchoice 666 endchoice
1544 667
1545 config XIP_KERNEL !! 668 config HZ
1546 bool "Kernel Execute-In-Place from RO !! 669 int
1547 depends on !ARM_LPAE && !ARCH_MULTIPL !! 670 default 32 if HZ_32
1548 depends on !ARM_PATCH_IDIV && !ARM_PA !! 671 default 64 if HZ_64
1549 help !! 672 default 128 if HZ_128
1550 Execute-In-Place allows the kernel !! 673 default 256 if HZ_256
1551 directly addressable by the CPU, su !! 674 default 1200 if HZ_1200
1552 space since the text section of the !! 675 default 1024
1553 to RAM. Read-write sections, such !! 676
1554 are still copied to RAM. The XIP k !! 677 config SRM_ENV
1555 it has to run directly from flash, !! 678 tristate "SRM environment through procfs"
1556 store it. The flash address used t !! 679 depends on PROC_FS
1557 and for storing it, is configuratio !! 680 help
1558 say Y here, you must know the prope !! 681 If you enable this option, a subdirectory inside /proc called
1559 store the kernel image depending on !! 682 /proc/srm_environment will give you access to the all important
1560 !! 683 SRM environment variables (those which have a name) and also
1561 Also note that the make target beco !! 684 to all others (by their internal number).
1562 "make zImage" or "make Image". The !! 685
1563 ROM memory will be arch/arm/boot/xi !! 686 SRM is something like a BIOS for Alpha machines. There are some
1564 !! 687 other such BIOSes, like AlphaBIOS, which this driver cannot
1565 If unsure, say N. !! 688 support (hey, that's not SRM!).
1566 !! 689
1567 config XIP_PHYS_ADDR !! 690 Despite the fact that this driver doesn't work on all Alphas (but
1568 hex "XIP Kernel Physical Location" !! 691 only on those which have SRM as their firmware), it's save to
1569 depends on XIP_KERNEL !! 692 build it even if your particular machine doesn't know about SRM
1570 default "0x00080000" !! 693 (or if you intend to compile a generic kernel). It will simply
1571 help !! 694 not create those subdirectory in /proc (and give you some warning,
1572 This is the physical address in you !! 695 of course).
1573 be linked for and stored to. This <<
1574 own flash usage. <<
1575 <<
1576 config XIP_DEFLATED_DATA <<
1577 bool "Store kernel .data section comp <<
1578 depends on XIP_KERNEL <<
1579 select ZLIB_INFLATE <<
1580 help <<
1581 Before the kernel is actually execu <<
1582 copied to RAM from ROM. This option <<
1583 in compressed form and decompressed <<
1584 copied, saving some precious ROM sp <<
1585 slightly longer boot delay. <<
1586 <<
1587 config ARCH_SUPPORTS_KEXEC <<
1588 def_bool (!SMP || PM_SLEEP_SMP) && MM <<
1589 <<
1590 config ATAGS_PROC <<
1591 bool "Export atags in procfs" <<
1592 depends on ATAGS && KEXEC <<
1593 default y <<
1594 help <<
1595 Should the atags used to boot the k <<
1596 file in procfs. Useful with kexec. <<
1597 <<
1598 config ARCH_SUPPORTS_CRASH_DUMP <<
1599 def_bool y <<
1600 <<
1601 config AUTO_ZRELADDR <<
1602 bool "Auto calculation of the decompr <<
1603 default !(ARCH_FOOTBRIDGE || ARCH_RPC <<
1604 help <<
1605 ZRELADDR is the physical address wh <<
1606 image will be placed. If AUTO_ZRELA <<
1607 will be determined at run-time, eit <<
1608 with 0xf8000000, or, if invalid, fr <<
1609 This assumes the zImage being place <<
1610 start of memory. <<
1611 <<
1612 config EFI_STUB <<
1613 bool <<
1614 <<
1615 config EFI <<
1616 bool "UEFI runtime support" <<
1617 depends on OF && !CPU_BIG_ENDIAN && M <<
1618 select UCS2_STRING <<
1619 select EFI_PARAMS_FROM_FDT <<
1620 select EFI_STUB <<
1621 select EFI_GENERIC_STUB <<
1622 select EFI_RUNTIME_WRAPPERS <<
1623 help <<
1624 This option provides support for ru <<
1625 by UEFI firmware (such as non-volat <<
1626 clock, and platform reset). A UEFI <<
1627 allow the kernel to be booted as an <<
1628 is only useful for kernels that may <<
1629 UEFI firmware. <<
1630 <<
1631 config DMI <<
1632 bool "Enable support for SMBIOS (DMI) <<
1633 depends on EFI <<
1634 default y <<
1635 help <<
1636 This enables SMBIOS/DMI feature for <<
1637 <<
1638 This option is only useful on syste <<
1639 However, even with this option, the <<
1640 continue to boot on existing non-UE <<
1641 <<
1642 NOTE: This does *NOT* enable or enc <<
1643 i.e., the the practice of identifyi <<
1644 decide whether certain workarounds <<
1645 firmware need to be enabled. This w <<
1646 to be enabled much earlier than we <<
1647 <<
1648 endmenu <<
1649 <<
1650 menu "CPU Power Management" <<
1651 <<
1652 source "drivers/cpufreq/Kconfig" <<
1653 <<
1654 source "drivers/cpuidle/Kconfig" <<
1655 <<
1656 endmenu <<
1657 <<
1658 menu "Floating point emulation" <<
1659 <<
1660 comment "At least one emulation must be selec <<
1661 <<
1662 config FPE_NWFPE <<
1663 bool "NWFPE math emulation" <<
1664 depends on (!AEABI || OABI_COMPAT) && <<
1665 help <<
1666 Say Y to include the NWFPE floating <<
1667 This is necessary to run most binar <<
1668 support floating point hardware so <<
1669 your machine has an FPA or floating <<
1670 <<
1671 You may say N here if you are going <<
1672 early in the bootup. <<
1673 <<
1674 config FPE_NWFPE_XP <<
1675 bool "Support extended precision" <<
1676 depends on FPE_NWFPE <<
1677 help <<
1678 Say Y to include 80-bit support in <<
1679 emulator. Otherwise, only 32 and 6 <<
1680 Note that gcc does not generate 80- <<
1681 so in most cases this option only e <<
1682 floating point emulator without any <<
1683 <<
1684 You almost surely want to say N her <<
1685 <<
1686 config FPE_FASTFPE <<
1687 bool "FastFPE math emulation (EXPERIM <<
1688 depends on (!AEABI || OABI_COMPAT) && <<
1689 help <<
1690 Say Y here to include the FAST floa <<
1691 This is an experimental much faster <<
1692 precision for the mantissa. It doe <<
1693 It is very simple, and approximatel <<
1694 <<
1695 It should be sufficient for most pr <<
1696 for scientific calculations, but yo <<
1697 If you do not feel you need a faste <<
1698 choose NWFPE. <<
1699 <<
1700 config VFP <<
1701 bool "VFP-format floating point maths <<
1702 depends on CPU_V6 || CPU_V6K || CPU_A <<
1703 help <<
1704 Say Y to include VFP support code i <<
1705 if your hardware includes a VFP uni <<
1706 <<
1707 Please see <file:Documentation/arch <<
1708 release notes and additional status <<
1709 <<
1710 Say N if your target does not have <<
1711 <<
1712 config VFPv3 <<
1713 bool <<
1714 depends on VFP <<
1715 default y if CPU_V7 <<
1716 696
1717 config NEON !! 697 This driver is also available as a module and will be called
1718 bool "Advanced SIMD (NEON) Extension !! 698 srm_env then.
1719 depends on VFPv3 && CPU_V7 <<
1720 help <<
1721 Say Y to include support code for N <<
1722 Extension. <<
1723 <<
1724 config KERNEL_MODE_NEON <<
1725 bool "Support for NEON in kernel mode <<
1726 depends on NEON && AEABI <<
1727 help <<
1728 Say Y to include support for NEON i <<
1729 699
1730 endmenu 700 endmenu
1731 701
1732 menu "Power management options" !! 702 # DUMMY_CONSOLE may be defined in drivers/video/console/Kconfig
1733 !! 703 # but we also need it if VGA_HOSE is set
1734 source "kernel/power/Kconfig" !! 704 config DUMMY_CONSOLE
1735 <<
1736 config ARCH_SUSPEND_POSSIBLE <<
1737 depends on CPU_ARM920T || CPU_ARM926T <<
1738 CPU_V6 || CPU_V6K || CPU_V7 | <<
1739 def_bool y <<
1740 <<
1741 config ARM_CPU_SUSPEND <<
1742 def_bool PM_SLEEP || BL_SWITCHER || A <<
1743 depends on ARCH_SUSPEND_POSSIBLE <<
1744 <<
1745 config ARCH_HIBERNATION_POSSIBLE <<
1746 bool 705 bool
1747 depends on MMU !! 706 depends on VGA_HOSE
1748 default y if ARCH_SUSPEND_POSSIBLE !! 707 default y
1749 <<
1750 endmenu <<
1751 <<
1752 source "arch/arm/Kconfig.assembler" <<
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