1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 config ARM !! 2 config ALPHA
3 bool 3 bool
4 default y 4 default y
5 select ARCH_32BIT_OFF_T !! 5 select ARCH_32BIT_USTAT_F_TINODE
6 select ARCH_CORRECT_STACKTRACE_ON_KRET <<
7 select ARCH_HAS_BINFMT_FLAT <<
8 select ARCH_HAS_CPU_CACHE_ALIASING <<
9 select ARCH_HAS_CPU_FINALIZE_INIT if M <<
10 select ARCH_HAS_CURRENT_STACK_POINTER 6 select ARCH_HAS_CURRENT_STACK_POINTER
11 select ARCH_HAS_DEBUG_VIRTUAL if MMU !! 7 select ARCH_HAS_DMA_OPS if PCI
12 select ARCH_HAS_DMA_ALLOC if MMU <<
13 select ARCH_HAS_DMA_OPS <<
14 select ARCH_HAS_DMA_WRITE_COMBINE if ! <<
15 select ARCH_HAS_ELF_RANDOMIZE <<
16 select ARCH_HAS_FORTIFY_SOURCE <<
17 select ARCH_HAS_KEEPINITRD <<
18 select ARCH_HAS_KCOV <<
19 select ARCH_HAS_MEMBARRIER_SYNC_CORE <<
20 select ARCH_HAS_NON_OVERLAPPING_ADDRES <<
21 select ARCH_HAS_PTE_SPECIAL if ARM_LPA <<
22 select ARCH_HAS_SETUP_DMA_OPS <<
23 select ARCH_HAS_SET_MEMORY <<
24 select ARCH_STACKWALK <<
25 select ARCH_HAS_STRICT_KERNEL_RWX if M <<
26 select ARCH_HAS_STRICT_MODULE_RWX if M <<
27 select ARCH_HAS_SYNC_DMA_FOR_DEVICE <<
28 select ARCH_HAS_SYNC_DMA_FOR_CPU <<
29 select ARCH_HAS_TEARDOWN_DMA_OPS if MM <<
30 select ARCH_HAS_TICK_BROADCAST if GENE <<
31 select ARCH_HAVE_NMI_SAFE_CMPXCHG if C <<
32 select ARCH_HAS_GCOV_PROFILE_ALL <<
33 select ARCH_KEEP_MEMBLOCK <<
34 select ARCH_HAS_UBSAN <<
35 select ARCH_MIGHT_HAVE_PC_PARPORT 8 select ARCH_MIGHT_HAVE_PC_PARPORT
36 select ARCH_OPTIONAL_KERNEL_RWX if ARC !! 9 select ARCH_MIGHT_HAVE_PC_SERIO
37 select ARCH_OPTIONAL_KERNEL_RWX_DEFAUL !! 10 select ARCH_NO_PREEMPT
38 select ARCH_NEED_CMPXCHG_1_EMU if CPU_ !! 11 select ARCH_NO_SG_CHAIN
39 select ARCH_SUPPORTS_ATOMIC_RMW <<
40 select ARCH_SUPPORTS_CFI_CLANG <<
41 select ARCH_SUPPORTS_HUGETLBFS if ARM_ <<
42 select ARCH_SUPPORTS_PER_VMA_LOCK <<
43 select ARCH_USE_BUILTIN_BSWAP <<
44 select ARCH_USE_CMPXCHG_LOCKREF 12 select ARCH_USE_CMPXCHG_LOCKREF
45 select ARCH_USE_MEMTEST !! 13 select FORCE_PCI
46 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_ !! 14 select PCI_DOMAINS if PCI
47 select ARCH_WANT_GENERAL_HUGETLB !! 15 select PCI_SYSCALL if PCI
48 select ARCH_WANT_IPC_PARSE_VERSION !! 16 select HAVE_ASM_MODVERSIONS
49 select ARCH_WANT_LD_ORPHAN_WARN !! 17 select HAVE_PAGE_SIZE_8KB
50 select BINFMT_FLAT_ARGVP_ENVP_ON_STACK !! 18 select HAVE_PCSPKR_PLATFORM
51 select BUILDTIME_TABLE_SORT if MMU !! 19 select HAVE_PERF_EVENTS
52 select COMMON_CLK if !(ARCH_RPC || ARC !! 20 select NEED_DMA_MAP_STATE
53 select CLONE_BACKWARDS !! 21 select NEED_SG_DMA_LENGTH
54 select CPU_PM if SUSPEND || CPU_IDLE <<
55 select DCACHE_WORD_ACCESS if HAVE_EFFI <<
56 select DMA_DECLARE_COHERENT <<
57 select DMA_GLOBAL_POOL if !MMU <<
58 select DMA_NONCOHERENT_MMAP if MMU <<
59 select EDAC_SUPPORT <<
60 select EDAC_ATOMIC_SCRUB <<
61 select GENERIC_ALLOCATOR <<
62 select GENERIC_ARCH_TOPOLOGY if ARM_CP <<
63 select GENERIC_ATOMIC64 if CPU_V7M || <<
64 select GENERIC_CLOCKEVENTS_BROADCAST i <<
65 select GENERIC_IRQ_IPI if SMP <<
66 select GENERIC_CPU_AUTOPROBE <<
67 select GENERIC_CPU_DEVICES <<
68 select GENERIC_EARLY_IOREMAP <<
69 select GENERIC_IDLE_POLL_SETUP <<
70 select GENERIC_IRQ_MULTI_HANDLER <<
71 select GENERIC_IRQ_PROBE 22 select GENERIC_IRQ_PROBE
72 select GENERIC_IRQ_SHOW <<
73 select GENERIC_IRQ_SHOW_LEVEL <<
74 select GENERIC_LIB_DEVMEM_IS_ALLOWED <<
75 select GENERIC_PCI_IOMAP 23 select GENERIC_PCI_IOMAP
76 select GENERIC_SCHED_CLOCK !! 24 select AUTO_IRQ_AFFINITY if SMP
>> 25 select GENERIC_IRQ_SHOW
>> 26 select ARCH_WANT_IPC_PARSE_VERSION
>> 27 select ARCH_HAVE_NMI_SAFE_CMPXCHG
>> 28 select AUDIT_ARCH
>> 29 select GENERIC_CPU_VULNERABILITIES
77 select GENERIC_SMP_IDLE_THREAD 30 select GENERIC_SMP_IDLE_THREAD
78 select HARDIRQS_SW_RESEND <<
79 select HAS_IOPORT 31 select HAS_IOPORT
80 select HAVE_ARCH_AUDITSYSCALL if AEABI !! 32 select HAVE_ARCH_AUDITSYSCALL
81 select HAVE_ARCH_BITREVERSE if (CPU_32 <<
82 select HAVE_ARCH_JUMP_LABEL if !XIP_KE <<
83 select HAVE_ARCH_KFENCE if MMU && !XIP <<
84 select HAVE_ARCH_KGDB if !CPU_ENDIAN_B <<
85 select HAVE_ARCH_KASAN if MMU && !XIP_ <<
86 select HAVE_ARCH_KASAN_VMALLOC if HAVE <<
87 select HAVE_ARCH_MMAP_RND_BITS if MMU <<
88 select HAVE_ARCH_PFN_VALID <<
89 select HAVE_ARCH_SECCOMP <<
90 select HAVE_ARCH_SECCOMP_FILTER if AEA <<
91 select HAVE_ARCH_STACKLEAK <<
92 select HAVE_ARCH_THREAD_STRUCT_WHITELI <<
93 select HAVE_ARCH_TRACEHOOK <<
94 select HAVE_ARCH_TRANSPARENT_HUGEPAGE <<
95 select HAVE_ARM_SMCCC if CPU_V7 <<
96 select HAVE_EBPF_JIT if !CPU_ENDIAN_BE <<
97 select HAVE_CONTEXT_TRACKING_USER <<
98 select HAVE_C_RECORDMCOUNT <<
99 select HAVE_BUILDTIME_MCOUNT_SORT <<
100 select HAVE_DEBUG_KMEMLEAK if !XIP_KER <<
101 select HAVE_DMA_CONTIGUOUS if MMU <<
102 select HAVE_DYNAMIC_FTRACE if !XIP_KER <<
103 select HAVE_DYNAMIC_FTRACE_WITH_REGS i <<
104 select HAVE_EFFICIENT_UNALIGNED_ACCESS <<
105 select HAVE_EXIT_THREAD <<
106 select HAVE_GUP_FAST if ARM_LPAE <<
107 select HAVE_FTRACE_MCOUNT_RECORD if !X <<
108 select HAVE_FUNCTION_ERROR_INJECTION <<
109 select HAVE_FUNCTION_GRAPH_TRACER <<
110 select HAVE_FUNCTION_TRACER if !XIP_KE <<
111 select HAVE_GCC_PLUGINS <<
112 select HAVE_HW_BREAKPOINT if PERF_EVEN <<
113 select HAVE_IRQ_TIME_ACCOUNTING <<
114 select HAVE_KERNEL_GZIP <<
115 select HAVE_KERNEL_LZ4 <<
116 select HAVE_KERNEL_LZMA <<
117 select HAVE_KERNEL_LZO <<
118 select HAVE_KERNEL_XZ <<
119 select HAVE_KPROBES if !XIP_KERNEL && <<
120 select HAVE_KRETPROBES if HAVE_KPROBES <<
121 select HAVE_LD_DEAD_CODE_DATA_ELIMINAT <<
122 select HAVE_MOD_ARCH_SPECIFIC 33 select HAVE_MOD_ARCH_SPECIFIC
123 select HAVE_NMI <<
124 select HAVE_OPTPROBES if !THUMB2_KERNE <<
125 select HAVE_PAGE_SIZE_4KB <<
126 select HAVE_PCI if MMU <<
127 select HAVE_PERF_EVENTS <<
128 select HAVE_PERF_REGS <<
129 select HAVE_PERF_USER_STACK_DUMP <<
130 select MMU_GATHER_RCU_TABLE_FREE if SM <<
131 select HAVE_REGS_AND_STACK_ACCESS_API <<
132 select HAVE_RSEQ <<
133 select HAVE_STACKPROTECTOR <<
134 select HAVE_SYSCALL_TRACEPOINTS <<
135 select HAVE_UID16 <<
136 select HAVE_VIRT_CPU_ACCOUNTING_GEN <<
137 select HOTPLUG_CORE_SYNC_DEAD if HOTPL <<
138 select IRQ_FORCED_THREADING <<
139 select LOCK_MM_AND_FIND_VMA 34 select LOCK_MM_AND_FIND_VMA
140 select MODULES_USE_ELF_REL !! 35 select MODULES_USE_ELF_RELA
141 select NEED_DMA_MAP_STATE !! 36 select ODD_RT_SIGACTION
142 select OF_EARLY_FLATTREE if OF !! 37 select OLD_SIGSUSPEND
143 select OLD_SIGACTION !! 38 select CPU_NO_EFFICIENT_FFS if !ALPHA_EV67
144 select OLD_SIGSUSPEND3 !! 39 select MMU_GATHER_NO_RANGE
145 select PCI_DOMAINS_GENERIC if PCI !! 40 select SPARSEMEM_EXTREME if SPARSEMEM
146 select PCI_SYSCALL if PCI !! 41 select ZONE_DMA
147 select PERF_USE_VMALLOC !! 42 help
148 select RTC_LIB !! 43 The Alpha is a 64-bit general-purpose processor designed and
149 select SPARSE_IRQ if !(ARCH_FOOTBRIDGE !! 44 marketed by the Digital Equipment Corporation of blessed memory,
150 select SYS_SUPPORTS_APM_EMULATION !! 45 now Hewlett-Packard. The Alpha Linux project has a home page at
151 select THREAD_INFO_IN_TASK !! 46 <http://www.alphalinux.org/>.
152 select TIMER_OF if OF <<
153 select HAVE_ARCH_VMAP_STACK if MMU && <<
154 select TRACE_IRQFLAGS_SUPPORT if !CPU_ <<
155 select USE_OF if !(ARCH_FOOTBRIDGE || <<
156 # Above selects are sorted alphabetica <<
157 # according to that. Thanks. <<
158 help <<
159 The ARM series is a line of low-powe <<
160 licensed by ARM Ltd and targeted at <<
161 handhelds such as the Compaq IPAQ. <<
162 manufactured, but legacy ARM-based P <<
163 Europe. There is an ARM Linux proje <<
164 <http://www.arm.linux.org.uk/>. <<
165 47
166 config ARM_HAS_GROUP_RELOCS !! 48 config 64BIT
167 def_bool y 49 def_bool y
168 depends on !LD_IS_LLD || LLD_VERSION > <<
169 depends on !COMPILE_TEST <<
170 help <<
171 Whether or not to use R_ARM_ALU_PC_G <<
172 relocations, which have been around <<
173 supported in LLD until version 14. T <<
174 which is usually sufficient, but not <<
175 this feature when doing compile test <<
176 <<
177 config ARM_DMA_USE_IOMMU <<
178 bool <<
179 select NEED_SG_DMA_LENGTH <<
180 <<
181 if ARM_DMA_USE_IOMMU <<
182 <<
183 config ARM_DMA_IOMMU_ALIGNMENT <<
184 int "Maximum PAGE_SIZE order of alignm <<
185 range 4 9 <<
186 default 8 <<
187 help <<
188 DMA mapping framework by default ali <<
189 PAGE_SIZE order which is greater tha <<
190 size. This works well for buffers up <<
191 for larger buffers it just a waste o <<
192 relatively small addressing window ( <<
193 virtual space with just a few alloca <<
194 <<
195 With this parameter you can specify <<
196 DMA IOMMU buffers. Larger buffers wi <<
197 specified order. The order is expres <<
198 by the PAGE_SIZE. <<
199 50
200 endif !! 51 config MMU
201 <<
202 config SYS_SUPPORTS_APM_EMULATION <<
203 bool <<
204 <<
205 config HAVE_TCM <<
206 bool <<
207 select GENERIC_ALLOCATOR <<
208 <<
209 config HAVE_PROC_CPU <<
210 bool <<
211 <<
212 config NO_IOPORT_MAP <<
213 bool <<
214 <<
215 config SBUS <<
216 bool <<
217 <<
218 config STACKTRACE_SUPPORT <<
219 bool <<
220 default y <<
221 <<
222 config LOCKDEP_SUPPORT <<
223 bool 52 bool
224 default y 53 default y
225 54
226 config ARCH_HAS_ILOG2_U32 55 config ARCH_HAS_ILOG2_U32
227 bool 56 bool
>> 57 default n
228 58
229 config ARCH_HAS_ILOG2_U64 59 config ARCH_HAS_ILOG2_U64
230 bool 60 bool
231 !! 61 default n
232 config ARCH_HAS_BANDGAP <<
233 bool <<
234 <<
235 config FIX_EARLYCON_MEM <<
236 def_bool y if MMU <<
237 <<
238 config GENERIC_HWEIGHT <<
239 bool <<
240 default y <<
241 62
242 config GENERIC_CALIBRATE_DELAY 63 config GENERIC_CALIBRATE_DELAY
243 bool 64 bool
244 default y 65 default y
245 66
246 config ARCH_MAY_HAVE_PC_FDC <<
247 bool <<
248 <<
249 config ARCH_SUPPORTS_UPROBES <<
250 def_bool y <<
251 <<
252 config GENERIC_ISA_DMA 67 config GENERIC_ISA_DMA
253 bool 68 bool
254 <<
255 config FIQ <<
256 bool <<
257 <<
258 config ARCH_MTD_XIP <<
259 bool <<
260 <<
261 config ARM_PATCH_PHYS_VIRT <<
262 bool "Patch physical to virtual transl <<
263 default y 69 default y
264 depends on MMU <<
265 help <<
266 Patch phys-to-virt and virt-to-phys <<
267 boot and module load time according <<
268 kernel in system memory. <<
269 <<
270 This can only be used with non-XIP M <<
271 of physical memory is at a 2 MiB bou <<
272 70
273 Only disable this option if you know !! 71 config PGTABLE_LEVELS
274 this feature (eg, building a kernel !! 72 int
275 you need to shrink the kernel to the !! 73 default 3
276 74
277 config NEED_MACH_IO_H !! 75 config AUDIT_ARCH
278 bool 76 bool
279 help <<
280 Select this when mach/io.h is requir <<
281 definitions for this platform. The <<
282 be avoided when possible. <<
283 77
284 config NEED_MACH_MEMORY_H !! 78 menu "System setup"
285 bool <<
286 help <<
287 Select this when mach/memory.h is re <<
288 definitions for this platform. The <<
289 be avoided when possible. <<
290 79
291 config PHYS_OFFSET !! 80 choice
292 hex "Physical address of main memory" !! 81 prompt "Alpha system type"
293 depends on !ARM_PATCH_PHYS_VIRT || !AU !! 82 default ALPHA_GENERIC
294 default DRAM_BASE if !MMU <<
295 default 0x00000000 if ARCH_FOOTBRIDGE <<
296 default 0x10000000 if ARCH_OMAP1 || AR <<
297 default 0xa0000000 if ARCH_PXA <<
298 default 0xc0000000 if ARCH_EP93XX || A <<
299 default 0 <<
300 help 83 help
301 Please provide the physical address !! 84 This is the system type of your hardware. A "generic" kernel will
302 location of main memory in your syst !! 85 run on any supported Alpha system. However, if you configure a
>> 86 kernel for your specific system, it will be faster and smaller.
303 87
304 config GENERIC_BUG !! 88 To find out what type of Alpha system you have, you may want to
305 def_bool y !! 89 check out the Linux/Alpha FAQ, accessible on the WWW from
306 depends on BUG !! 90 <http://www.alphalinux.org/>. In summary:
307 91
308 config PGTABLE_LEVELS !! 92 Alcor/Alpha-XLT AS 600, AS 500, XL-300, XL-366
309 int !! 93 DP264 DP264 / DS20 / ES40 / DS10 / DS10L
310 default 3 if ARM_LPAE !! 94 LX164 AlphaPC164-LX
311 default 2 !! 95 Miata Personal Workstation 433/500/600 a/au
>> 96 Marvel AlphaServer ES47 / ES80 / GS1280
>> 97 Mikasa AS 1000
>> 98 Noritake AS 1000A, AS 600A, AS 800
>> 99 PC164 AlphaPC164
>> 100 Rawhide AS 1200, AS 4000, AS 4100
>> 101 Ruffian RPX164-2, AlphaPC164-UX, AlphaPC164-BX
>> 102 SX164 AlphaPC164-SX
>> 103 Sable AS 2000, AS 2100
>> 104 Shark DS 20L
>> 105 Takara Takara (OEM)
>> 106 Titan AlphaServer ES45 / DS25 / DS15
>> 107 Wildfire AlphaServer GS 40/80/160/320
312 108
313 menu "System Type" !! 109 If you don't know what to do, choose "generic".
314 110
315 config MMU !! 111 config ALPHA_GENERIC
316 bool "MMU-based Paged Memory Managemen !! 112 bool "Generic"
317 default y !! 113 depends on TTY
>> 114 select HAVE_EISA
318 help 115 help
319 Select if you want MMU-based virtual !! 116 A generic kernel will run on all supported Alpha hardware.
320 support by paged memory management. <<
321 117
322 config ARM_SINGLE_ARMV7M !! 118 config ALPHA_ALCOR
323 def_bool !MMU !! 119 bool "Alcor/Alpha-XLT"
324 select ARM_NVIC !! 120 select HAVE_EISA
325 select CPU_V7M <<
326 select NO_IOPORT_MAP <<
327 <<
328 config ARCH_MMAP_RND_BITS_MIN <<
329 default 8 <<
330 <<
331 config ARCH_MMAP_RND_BITS_MAX <<
332 default 14 if PAGE_OFFSET=0x40000000 <<
333 default 15 if PAGE_OFFSET=0x80000000 <<
334 default 16 <<
335 <<
336 config ARCH_MULTIPLATFORM <<
337 bool "Require kernel to be portable to <<
338 depends on MMU && !(ARCH_FOOTBRIDGE || <<
339 default y <<
340 help 121 help
341 In general, all Arm machines can be !! 122 For systems using the Digital ALCOR chipset: 5 chips (4, 64-bit data
342 kernel image, covering either Armv4/ !! 123 slices (Data Switch, DSW) - 208-pin PQFP and 1 control (Control, I/O
343 !! 124 Address, CIA) - a 383 pin plastic PGA). It provides a DRAM
344 However, some configuration options !! 125 controller (256-bit memory bus) and a PCI interface. It also does
345 specific physical addresses or enabl !! 126 all the work required to support an external Bcache and to maintain
346 break other machines. !! 127 memory coherence when a PCI device DMAs into (or out of) memory.
347 <<
348 Selecting N here allows using those <<
349 DEBUG_UNCOMPRESS, XIP_KERNEL and ZBO <<
350 <<
351 source "arch/arm/Kconfig.platforms" <<
352 <<
353 # <<
354 # This is sorted alphabetically by mach-* path <<
355 # Kconfigs may be included either alphabetical <<
356 # plat- suffix) or along side the correspondin <<
357 # <<
358 source "arch/arm/mach-actions/Kconfig" <<
359 <<
360 source "arch/arm/mach-alpine/Kconfig" <<
361 <<
362 source "arch/arm/mach-artpec/Kconfig" <<
363 <<
364 source "arch/arm/mach-aspeed/Kconfig" <<
365 <<
366 source "arch/arm/mach-at91/Kconfig" <<
367 <<
368 source "arch/arm/mach-axxia/Kconfig" <<
369 <<
370 source "arch/arm/mach-bcm/Kconfig" <<
371 <<
372 source "arch/arm/mach-berlin/Kconfig" <<
373 128
374 source "arch/arm/mach-clps711x/Kconfig" !! 129 config ALPHA_DP264
375 !! 130 bool "DP264"
376 source "arch/arm/mach-davinci/Kconfig" !! 131 help
377 !! 132 Various 21264 systems with the tsunami core logic chipset.
378 source "arch/arm/mach-digicolor/Kconfig" !! 133 API Networks: 264DP, UP2000(+), CS20;
379 !! 134 Compaq: DS10(E,L), XP900, XP1000, DS20(E), ES40.
380 source "arch/arm/mach-dove/Kconfig" <<
381 <<
382 source "arch/arm/mach-ep93xx/Kconfig" <<
383 <<
384 source "arch/arm/mach-exynos/Kconfig" <<
385 <<
386 source "arch/arm/mach-footbridge/Kconfig" <<
387 <<
388 source "arch/arm/mach-gemini/Kconfig" <<
389 <<
390 source "arch/arm/mach-highbank/Kconfig" <<
391 <<
392 source "arch/arm/mach-hisi/Kconfig" <<
393 <<
394 source "arch/arm/mach-hpe/Kconfig" <<
395 <<
396 source "arch/arm/mach-imx/Kconfig" <<
397 <<
398 source "arch/arm/mach-ixp4xx/Kconfig" <<
399 <<
400 source "arch/arm/mach-keystone/Kconfig" <<
401 <<
402 source "arch/arm/mach-lpc32xx/Kconfig" <<
403 <<
404 source "arch/arm/mach-mediatek/Kconfig" <<
405 <<
406 source "arch/arm/mach-meson/Kconfig" <<
407 <<
408 source "arch/arm/mach-milbeaut/Kconfig" <<
409 <<
410 source "arch/arm/mach-mmp/Kconfig" <<
411 <<
412 source "arch/arm/mach-mstar/Kconfig" <<
413 <<
414 source "arch/arm/mach-mv78xx0/Kconfig" <<
415 <<
416 source "arch/arm/mach-mvebu/Kconfig" <<
417 <<
418 source "arch/arm/mach-mxs/Kconfig" <<
419 <<
420 source "arch/arm/mach-nomadik/Kconfig" <<
421 <<
422 source "arch/arm/mach-npcm/Kconfig" <<
423 <<
424 source "arch/arm/mach-omap1/Kconfig" <<
425 <<
426 source "arch/arm/mach-omap2/Kconfig" <<
427 <<
428 source "arch/arm/mach-orion5x/Kconfig" <<
429 <<
430 source "arch/arm/mach-pxa/Kconfig" <<
431 <<
432 source "arch/arm/mach-qcom/Kconfig" <<
433 <<
434 source "arch/arm/mach-realtek/Kconfig" <<
435 <<
436 source "arch/arm/mach-rpc/Kconfig" <<
437 <<
438 source "arch/arm/mach-rockchip/Kconfig" <<
439 <<
440 source "arch/arm/mach-s3c/Kconfig" <<
441 <<
442 source "arch/arm/mach-s5pv210/Kconfig" <<
443 <<
444 source "arch/arm/mach-sa1100/Kconfig" <<
445 <<
446 source "arch/arm/mach-shmobile/Kconfig" <<
447 <<
448 source "arch/arm/mach-socfpga/Kconfig" <<
449 <<
450 source "arch/arm/mach-spear/Kconfig" <<
451 <<
452 source "arch/arm/mach-sti/Kconfig" <<
453 <<
454 source "arch/arm/mach-stm32/Kconfig" <<
455 <<
456 source "arch/arm/mach-sunxi/Kconfig" <<
457 <<
458 source "arch/arm/mach-tegra/Kconfig" <<
459 135
460 source "arch/arm/mach-ux500/Kconfig" !! 136 config ALPHA_EIGER
>> 137 bool "Eiger"
>> 138 help
>> 139 Apparently an obscure OEM single-board computer based on the
>> 140 Typhoon/Tsunami chipset family. Information on it is scanty.
461 141
462 source "arch/arm/mach-versatile/Kconfig" !! 142 config ALPHA_LX164
>> 143 bool "LX164"
>> 144 help
>> 145 A technical overview of this board is available at
>> 146 <http://www.unix-ag.org/Linux-Alpha/Architectures/LX164.html>.
463 147
464 source "arch/arm/mach-vt8500/Kconfig" !! 148 config ALPHA_MARVEL
>> 149 bool "Marvel"
>> 150 help
>> 151 AlphaServer ES47 / ES80 / GS1280 based on EV7.
465 152
466 source "arch/arm/mach-zynq/Kconfig" !! 153 config ALPHA_MIATA
>> 154 bool "Miata"
>> 155 select HAVE_EISA
>> 156 help
>> 157 The Digital PersonalWorkStation (PWS 433a, 433au, 500a, 500au, 600a,
>> 158 or 600au).
467 159
468 # ARMv7-M architecture !! 160 config ALPHA_MIKASA
469 config ARCH_LPC18XX !! 161 bool "Mikasa"
470 bool "NXP LPC18xx/LPC43xx" <<
471 depends on ARM_SINGLE_ARMV7M <<
472 select ARCH_HAS_RESET_CONTROLLER <<
473 select ARM_AMBA <<
474 select CLKSRC_LPC32XX <<
475 select PINCTRL <<
476 help 162 help
477 Support for NXP's LPC18xx Cortex-M3 !! 163 AlphaServer 1000-based Alpha systems.
478 high performance microcontrollers. <<
479 164
480 config ARCH_MPS2 !! 165 config ALPHA_NAUTILUS
481 bool "ARM MPS2 platform" !! 166 bool "Nautilus"
482 depends on ARM_SINGLE_ARMV7M <<
483 select ARM_AMBA <<
484 select CLKSRC_MPS2 <<
485 help 167 help
486 Support for Cortex-M Prototyping Sys !! 168 Alpha systems based on the AMD 751 & ALI 1543C chipsets.
487 with a range of available cores like <<
488 169
489 Please, note that depends which Appl !! 170 config ALPHA_NORITAKE
490 for the platform may vary, so adjust !! 171 bool "Noritake"
>> 172 select HAVE_EISA
>> 173 help
>> 174 AlphaServer 1000A, AlphaServer 600A, and AlphaServer 800-based
>> 175 systems.
491 176
492 # Definitions to make life easier !! 177 config ALPHA_PC164
493 config ARCH_ACORN !! 178 bool "PC164"
494 bool <<
495 179
496 config PLAT_ORION !! 180 config ALPHA_RAWHIDE
497 bool !! 181 bool "Rawhide"
498 select CLKSRC_MMIO !! 182 select HAVE_EISA
499 select GENERIC_IRQ_CHIP !! 183 help
500 select IRQ_DOMAIN !! 184 AlphaServer 1200, AlphaServer 4000 and AlphaServer 4100 machines.
>> 185 See HOWTO at
>> 186 <http://www.alphalinux.org/docs/rawhide/4100_install.shtml>.
501 187
502 config PLAT_ORION_LEGACY !! 188 config ALPHA_RUFFIAN
503 bool !! 189 bool "Ruffian"
504 select PLAT_ORION !! 190 help
>> 191 Samsung APC164UX. There is a page on known problems and workarounds
>> 192 at <http://www.alphalinux.org/faq/FAQ-11.html>.
505 193
506 config PLAT_VERSATILE !! 194 config ALPHA_RX164
507 bool !! 195 bool "RX164"
508 196
509 source "arch/arm/mm/Kconfig" !! 197 config ALPHA_SX164
>> 198 bool "SX164"
510 199
511 config IWMMXT !! 200 config ALPHA_SABLE
512 bool "Enable iWMMXt support" !! 201 bool "Sable"
513 depends on CPU_XSCALE || CPU_XSC3 || C !! 202 select HAVE_EISA
514 default y if PXA27x || PXA3xx || ARCH_ <<
515 help 203 help
516 Enable support for iWMMXt context sw !! 204 Digital AlphaServer 2000 and 2100-based systems.
517 running on a CPU that supports it. <<
518 205
519 if !MMU !! 206 config ALPHA_SHARK
520 source "arch/arm/Kconfig-nommu" !! 207 bool "Shark"
521 endif <<
522 208
523 config PJ4B_ERRATA_4742 !! 209 config ALPHA_TAKARA
524 bool "PJ4B Errata 4742: IDLE Wake Up C !! 210 bool "Takara"
525 depends on CPU_PJ4B && MACH_ARMADA_370 <<
526 default y <<
527 help 211 help
528 When coming out of either a Wait for !! 212 Alpha 11164-based OEM single-board computer.
529 Event (WFE) IDLE states, a specific <<
530 the retiring WFI/WFE instructions an <<
531 instructions. This sensitivity can <<
532 Workaround: <<
533 The software must insert either a Da <<
534 or Data Memory Barrier (DMB) command <<
535 instruction <<
536 <<
537 config ARM_ERRATA_326103 <<
538 bool "ARM errata: FSR write bit incorr <<
539 depends on CPU_V6 <<
540 help <<
541 Executing a SWP instruction to read- <<
542 of the FSR on the ARM 1136 prior to <<
543 treat the access as a read, preventi <<
544 causing the faulting task to liveloc <<
545 <<
546 config ARM_ERRATA_411920 <<
547 bool "ARM errata: Invalidation of the <<
548 depends on CPU_V6 || CPU_V6K <<
549 help <<
550 Invalidation of the Instruction Cach <<
551 fail. This erratum is present in 113 <<
552 It does not affect the MPCore. This <<
553 recommended workaround. <<
554 <<
555 config ARM_ERRATA_430973 <<
556 bool "ARM errata: Stale prediction on <<
557 depends on CPU_V7 <<
558 help <<
559 This option enables the workaround f <<
560 r1p* erratum. If a code sequence con <<
561 interworking branch is replaced with <<
562 same virtual address, whether due to <<
563 to physical address re-mapping, Cort <<
564 stale interworking branch prediction <<
565 executing the new code sequence in t <<
566 The workaround enables the BTB/BTAC <<
567 and also flushes the branch target c <<
568 Note that setting specific bits in t <<
569 available in non-secure mode. <<
570 <<
571 config ARM_ERRATA_458693 <<
572 bool "ARM errata: Processor deadlock w <<
573 depends on CPU_V7 <<
574 depends on !ARCH_MULTIPLATFORM <<
575 help <<
576 This option enables the workaround f <<
577 erratum. For very specific sequences <<
578 possible for a hazard condition inte <<
579 be incorrectly associated with a dif <<
580 hazard might then cause a processor <<
581 the L1 caching of the NEON accesses <<
582 in the ACTLR register. Note that set <<
583 register may not be available in non <<
584 available on a multiplatform kernel. <<
585 bootloader instead. <<
586 <<
587 config ARM_ERRATA_460075 <<
588 bool "ARM errata: Data written to the <<
589 depends on CPU_V7 <<
590 depends on !ARCH_MULTIPLATFORM <<
591 help <<
592 This option enables the workaround f <<
593 erratum. Any asynchronous access to <<
594 situation in which recent store tran <<
595 and overwritten with stale memory co <<
596 workaround disables the write-alloca <<
597 ACTLR register. Note that setting sp <<
598 may not be available in non-secure m <<
599 a multiplatform kernel. This should <<
600 instead. <<
601 <<
602 config ARM_ERRATA_742230 <<
603 bool "ARM errata: DMB operation may be <<
604 depends on CPU_V7 && SMP <<
605 depends on !ARCH_MULTIPLATFORM <<
606 help <<
607 This option enables the workaround f <<
608 (r1p0..r2p2) erratum. Under rare cir <<
609 between two write operations may not <<
610 ordering of the two writes. This wor <<
611 the diagnostic register of the Corte <<
612 instruction to behave as a DSB, ensu <<
613 the two writes. Note that setting sp <<
614 register may not be available in non <<
615 available on a multiplatform kernel. <<
616 bootloader instead. <<
617 <<
618 config ARM_ERRATA_742231 <<
619 bool "ARM errata: Incorrect hazard han <<
620 depends on CPU_V7 && SMP <<
621 depends on !ARCH_MULTIPLATFORM <<
622 help <<
623 This option enables the workaround f <<
624 (r2p0..r2p2) erratum. Under certain <<
625 Cortex-A9 MPCore micro-architecture, <<
626 accessing some data located in the s <<
627 data due to bad handling of the addr <<
628 replaced from one of the CPUs at the <<
629 accessing it. This workaround sets s <<
630 register of the Cortex-A9 which redu <<
631 capabilities of the processor. Note <<
632 diagnostics register may not be avai <<
633 is not available on a multiplatform <<
634 the bootloader instead. <<
635 <<
636 config ARM_ERRATA_643719 <<
637 bool "ARM errata: LoUIS bit field in C <<
638 depends on CPU_V7 && SMP <<
639 default y <<
640 help <<
641 This option enables the workaround f <<
642 r1p0) erratum. On affected cores the <<
643 register returns zero when it should <<
644 corrects this value, ensuring cache <<
645 it behave as intended and avoiding d <<
646 <<
647 config ARM_ERRATA_720789 <<
648 bool "ARM errata: TLBIASIDIS and TLBIM <<
649 depends on CPU_V7 <<
650 help <<
651 This option enables the workaround f <<
652 r2p0) erratum. A faulty ASID can be <<
653 broadcasted CP15 TLB maintenance ope <<
654 As a consequence of this erratum, so <<
655 invalidated are not, resulting in an <<
656 tables. The workaround changes the T <<
657 entries regardless of the ASID. <<
658 <<
659 config ARM_ERRATA_743622 <<
660 bool "ARM errata: Faulty hazard checki <<
661 depends on CPU_V7 <<
662 depends on !ARCH_MULTIPLATFORM <<
663 help <<
664 This option enables the workaround f <<
665 (r2p*) erratum. Under very rare cond <<
666 optimisation in the Cortex-A9 Store <<
667 corruption. This workaround sets a s <<
668 register of the Cortex-A9 which disa <<
669 optimisation, preventing the defect <<
670 visible impact on the overall perfor <<
671 processor. Note that setting specifi <<
672 may not be available in non-secure m <<
673 multiplatform kernel. This should be <<
674 <<
675 config ARM_ERRATA_751472 <<
676 bool "ARM errata: Interrupted ICIALLUI <<
677 depends on CPU_V7 <<
678 depends on !ARCH_MULTIPLATFORM <<
679 help <<
680 This option enables the workaround f <<
681 to r3p0) erratum. An interrupted ICI <<
682 completion of a following broadcaste <<
683 operation is received by a CPU befor <<
684 potentially leading to corrupted ent <<
685 Note that setting specific bits in t <<
686 not be available in non-secure mode <<
687 a multiplatform kernel. This should <<
688 instead. <<
689 <<
690 config ARM_ERRATA_754322 <<
691 bool "ARM errata: possible faulty MMU <<
692 depends on CPU_V7 <<
693 help <<
694 This option enables the workaround f <<
695 r3p*) erratum. A speculative memory <<
696 which starts prior to an ASID switch <<
697 can populate the micro-TLB with a st <<
698 the new ASID. This workaround places <<
699 switching code so that no page table <<
700 <<
701 config ARM_ERRATA_754327 <<
702 bool "ARM errata: no automatic Store B <<
703 depends on CPU_V7 && SMP <<
704 help <<
705 This option enables the workaround f <<
706 r2p0) erratum. The Store Buffer does <<
707 mechanism and therefore a livelock m <<
708 continuously polls a memory location <<
709 This workaround defines cpu_relax() <<
710 written polling loops from denying v <<
711 <<
712 config ARM_ERRATA_364296 <<
713 bool "ARM errata: Possible cache data <<
714 depends on CPU_V6 <<
715 help <<
716 This options enables the workaround <<
717 r0p2 erratum (possible cache data co <<
718 hit-under-miss enabled). It sets the <<
719 the auxiliary control register and t <<
720 register, thus disabling hit-under-m <<
721 processor into full low interrupt la <<
722 is not affected. <<
723 <<
724 config ARM_ERRATA_764369 <<
725 bool "ARM errata: Data cache line main <<
726 depends on CPU_V7 && SMP <<
727 help <<
728 This option enables the workaround f <<
729 affecting Cortex-A9 MPCore with two <<
730 current revisions). Under certain ti <<
731 cache line maintenance operation by <<
732 Shareable memory region may fail to <<
733 Point of Coherency or to the Point o <<
734 system. This workaround adds a DSB i <<
735 relevant cache maintenance functions <<
736 in the diagnostic control register o <<
737 <<
738 config ARM_ERRATA_764319 <<
739 bool "ARM errata: Read to DBGPRSR and <<
740 depends on CPU_V7 <<
741 help <<
742 This option enables the workaround f <<
743 CP14 read accesses to the DBGPRSR an <<
744 unexpected Undefined Instruction exc <<
745 external pin is set to 0, even when <<
746 from a privileged mode. This work ar <<
747 way the kernel does not stop executi <<
748 <<
749 config ARM_ERRATA_775420 <<
750 bool "ARM errata: A data cache maintena <<
751 depends on CPU_V7 <<
752 help <<
753 This option enables the workaround fo <<
754 r2p6,r2p8,r2p10,r3p0) erratum. In cas <<
755 operation aborts with MMU exception, <<
756 to deadlock. This workaround puts DSB <<
757 an abort may occur on cache maintenan <<
758 <<
759 config ARM_ERRATA_798181 <<
760 bool "ARM errata: TLBI/DSB failure on <<
761 depends on CPU_V7 && SMP <<
762 help <<
763 On Cortex-A15 (r0p0..r3p2) the TLBI* <<
764 adequately shooting down all use of <<
765 option enables the Linux kernel work <<
766 which sends an IPI to the CPUs that <<
767 as the one being invalidated. <<
768 <<
769 config ARM_ERRATA_773022 <<
770 bool "ARM errata: incorrect instructio <<
771 depends on CPU_V7 <<
772 help <<
773 This option enables the workaround f <<
774 (up to r0p4) erratum. In certain rar <<
775 loop buffer may deliver incorrect in <<
776 workaround disables the loop buffer <<
777 <<
778 config ARM_ERRATA_818325_852422 <<
779 bool "ARM errata: A12: some seqs of op <<
780 depends on CPU_V7 <<
781 help <<
782 This option enables the workaround f <<
783 - Cortex-A12 818325: Execution of an <<
784 instruction might deadlock. Fixed <<
785 - Cortex-A12 852422: Execution of a <<
786 lead to either a data corruption o <<
787 any Cortex-A12 cores yet. <<
788 This workaround for all both errata <<
789 Feature Register. This bit disables <<
790 sequence of 2 instructions that use <<
791 <<
792 config ARM_ERRATA_821420 <<
793 bool "ARM errata: A12: sequence of VMO <<
794 depends on CPU_V7 <<
795 help <<
796 This option enables the workaround f <<
797 (all revs) erratum. In very rare tim <<
798 of VMOV to Core registers instructio <<
799 one is in the shadow of a branch or <<
800 deadlock when the VMOV instructions <<
801 <<
802 config ARM_ERRATA_825619 <<
803 bool "ARM errata: A12: DMB NSHST/ISHST <<
804 depends on CPU_V7 <<
805 help <<
806 This option enables the workaround f <<
807 (all revs) erratum. Within rare timi <<
808 DMB NSHST or DMB ISHST instruction f <<
809 and Device/Strongly-Ordered loads an <<
810 <<
811 config ARM_ERRATA_857271 <<
812 bool "ARM errata: A12: CPU might deadl <<
813 depends on CPU_V7 <<
814 help <<
815 This option enables the workaround f <<
816 (all revs) erratum. Under very rare <<
817 hang. The workaround is expected to <<
818 <<
819 config ARM_ERRATA_852421 <<
820 bool "ARM errata: A17: DMB ST might fa <<
821 depends on CPU_V7 <<
822 help <<
823 This option enables the workaround f <<
824 (r1p0, r1p1, r1p2) erratum. Under ve <<
825 execution of a DMB ST instruction mi <<
826 stores from GroupA and stores from G <<
827 <<
828 config ARM_ERRATA_852423 <<
829 bool "ARM errata: A17: some seqs of op <<
830 depends on CPU_V7 <<
831 help <<
832 This option enables the workaround f <<
833 - Cortex-A17 852423: Execution of a <<
834 lead to either a data corruption o <<
835 any Cortex-A17 cores yet. <<
836 This is identical to Cortex-A12 erra <<
837 config option from the A12 erratum d <<
838 for and handled. <<
839 <<
840 config ARM_ERRATA_857272 <<
841 bool "ARM errata: A17: CPU might deadl <<
842 depends on CPU_V7 <<
843 help <<
844 This option enables the workaround f <<
845 This erratum is not known to be fixe <<
846 This is identical to Cortex-A12 erra <<
847 config option from the A12 erratum d <<
848 for and handled. <<
849 213
850 endmenu !! 214 config ALPHA_TITAN
>> 215 bool "Titan"
>> 216 help
>> 217 AlphaServer ES45/DS25 SMP based on EV68 and Titan chipset.
851 218
852 source "arch/arm/common/Kconfig" !! 219 config ALPHA_WILDFIRE
>> 220 bool "Wildfire"
>> 221 help
>> 222 AlphaServer GS 40/80/160/320 SMP based on the EV67 core.
853 223
854 menu "Bus support" !! 224 endchoice
855 225
>> 226 # clear all implied options (don't want default values for those):
>> 227 # Most of these machines have ISA slots; not exactly sure which don't,
>> 228 # and this doesn't activate hordes of code, so do it always.
856 config ISA 229 config ISA
857 bool 230 bool
>> 231 default y
858 help 232 help
859 Find out whether you have ISA slots 233 Find out whether you have ISA slots on your motherboard. ISA is the
860 name of a bus system, i.e. the way t 234 name of a bus system, i.e. the way the CPU talks to the other stuff
861 inside your box. Other bus systems 235 inside your box. Other bus systems are PCI, EISA, MicroChannel
862 (MCA) or VESA. ISA is an older syst 236 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
863 newer boards don't support it. If y 237 newer boards don't support it. If you have ISA, say Y, otherwise N.
864 238
865 # Select ISA DMA interface <<
866 config ISA_DMA_API 239 config ISA_DMA_API
867 bool 240 bool
>> 241 default y
868 242
869 config ARM_ERRATA_814220 !! 243 config ALPHA_CIA
870 bool "ARM errata: Cache maintenance by <<
871 depends on CPU_V7 <<
872 help <<
873 The v7 ARM states that all cache and <<
874 operations that do not specify an ad <<
875 each other, in program order. <<
876 However, because of this erratum, an <<
877 operation can overtake an L1 set/way <<
878 This ERRATA only affected the Cortex <<
879 r0p4, r0p5. <<
880 <<
881 endmenu <<
882 <<
883 menu "Kernel Features" <<
884 <<
885 config HAVE_SMP <<
886 bool 244 bool
887 help !! 245 depends on ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_RUFFIAN || ALPHA_NORITAKE || ALPHA_MIKASA || ALPHA_PC164 || ALPHA_TAKARA || ALPHA_ALCOR
888 This option should be selected by ma <<
889 capable CPU. <<
890 <<
891 The only effect of this option is to <<
892 options available to the user for co <<
893 <<
894 config SMP <<
895 bool "Symmetric Multi-Processing" <<
896 depends on CPU_V6K || CPU_V7 <<
897 depends on HAVE_SMP <<
898 depends on MMU || ARM_MPU <<
899 select IRQ_WORK <<
900 help <<
901 This enables support for systems wit <<
902 a system with only one CPU, say N. I <<
903 than one CPU, say Y. <<
904 <<
905 If you say N here, the kernel will r <<
906 machines, but will use only one CPU <<
907 you say Y here, the kernel will run <<
908 uniprocessor machines. On a uniproce <<
909 will run faster if you say N here. <<
910 <<
911 See also <file:Documentation/arch/x8 <<
912 <file:Documentation/admin-guide/lock <<
913 <http://tldp.org/HOWTO/SMP-HOWTO.htm <<
914 <<
915 If you don't know what to do here, s <<
916 <<
917 config SMP_ON_UP <<
918 bool "Allow booting SMP kernel on unip <<
919 depends on SMP && MMU <<
920 default y 246 default y
921 help <<
922 SMP kernels contain instructions whi <<
923 Enabling this option allows the kern <<
924 these instructions safe. Disabling <<
925 savings. <<
926 <<
927 If you don't know what to do here, s <<
928 247
>> 248 config ALPHA_EV56
>> 249 bool
>> 250 default y if ALPHA_ALCOR || ALPHA_RX164 || ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_RUFFIAN || ALPHA_PC164 || ALPHA_TAKARA || ALPHA_NORITAKE || ALPHA_MIKASA || ALPHA_RAWHIDE || ALPHA_SABLE
929 251
930 config CURRENT_POINTER_IN_TPIDRURO !! 252 config ALPHA_T2
931 def_bool y !! 253 bool
932 depends on CPU_32v6K && !CPU_V6 !! 254 depends on ALPHA_SABLE
933 <<
934 config IRQSTACKS <<
935 def_bool y <<
936 select HAVE_IRQ_EXIT_ON_IRQ_STACK <<
937 select HAVE_SOFTIRQ_ON_OWN_STACK <<
938 <<
939 config ARM_CPU_TOPOLOGY <<
940 bool "Support cpu topology definition" <<
941 depends on SMP && CPU_V7 <<
942 default y 255 default y
943 help <<
944 Support ARM cpu topology definition. <<
945 affinity between processors which is <<
946 topology of an ARM System. <<
947 <<
948 config SCHED_MC <<
949 bool "Multi-core scheduler support" <<
950 depends on ARM_CPU_TOPOLOGY <<
951 help <<
952 Multi-core scheduler support improve <<
953 making when dealing with multi-core <<
954 increased overhead in some places. I <<
955 <<
956 config SCHED_SMT <<
957 bool "SMT scheduler support" <<
958 depends on ARM_CPU_TOPOLOGY <<
959 help <<
960 Improves the CPU scheduler's decisio <<
961 MultiThreading at a cost of slightly <<
962 places. If unsure say N here. <<
963 256
964 config HAVE_ARM_SCU !! 257 config ALPHA_PYXIS
965 bool 258 bool
966 help !! 259 depends on ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_RUFFIAN
967 This option enables support for the !! 260 default y
968 <<
969 config HAVE_ARM_ARCH_TIMER <<
970 bool "Architected timer support" <<
971 depends on CPU_V7 <<
972 select ARM_ARCH_TIMER <<
973 help <<
974 This option enables support for the <<
975 261
976 config HAVE_ARM_TWD !! 262 config ALPHA_EV6
977 bool 263 bool
978 help !! 264 depends on ALPHA_NAUTILUS || ALPHA_WILDFIRE || ALPHA_TITAN || ALPHA_SHARK || ALPHA_DP264 || ALPHA_EIGER || ALPHA_MARVEL
979 This options enables support for the !! 265 default y
980 <<
981 config MCPM <<
982 bool "Multi-Cluster Power Management" <<
983 depends on CPU_V7 && SMP <<
984 help <<
985 This option provides the common powe <<
986 for (multi-)cluster based systems, s <<
987 systems. <<
988 266
989 config MCPM_QUAD_CLUSTER !! 267 config ALPHA_TSUNAMI
990 bool 268 bool
991 depends on MCPM !! 269 depends on ALPHA_SHARK || ALPHA_DP264 || ALPHA_EIGER
992 help !! 270 default y
993 To avoid wasting resources unnecessa <<
994 to 2 clusters by default. <<
995 Platforms with 3 or 4 clusters that <<
996 option to allow the additional clust <<
997 <<
998 config BIG_LITTLE <<
999 bool "big.LITTLE support (Experimental <<
1000 depends on CPU_V7 && SMP <<
1001 select MCPM <<
1002 help <<
1003 This option enables support selecti <<
1004 system architecture. <<
1005 <<
1006 config BL_SWITCHER <<
1007 bool "big.LITTLE switcher support" <<
1008 depends on BIG_LITTLE && MCPM && HOTP <<
1009 select CPU_PM <<
1010 help <<
1011 The big.LITTLE "switcher" provides <<
1012 transparently handle transition bet <<
1013 and a cluster of A7's in a big.LITT <<
1014 <<
1015 config BL_SWITCHER_DUMMY_IF <<
1016 tristate "Simple big.LITTLE switcher <<
1017 depends on BL_SWITCHER && DEBUG_KERNE <<
1018 help <<
1019 This is a simple and dummy char dev <<
1020 the big.LITTLE switcher core code. <<
1021 debugging purposes only. <<
1022 <<
1023 choice <<
1024 prompt "Memory split" <<
1025 depends on MMU <<
1026 default VMSPLIT_3G <<
1027 help <<
1028 Select the desired split between ke <<
1029 <<
1030 If you are not absolutely sure what <<
1031 option alone! <<
1032 <<
1033 config VMSPLIT_3G <<
1034 bool "3G/1G user/kernel split <<
1035 config VMSPLIT_3G_OPT <<
1036 depends on !ARM_LPAE <<
1037 bool "3G/1G user/kernel split <<
1038 config VMSPLIT_2G <<
1039 bool "2G/2G user/kernel split <<
1040 config VMSPLIT_1G <<
1041 bool "1G/3G user/kernel split <<
1042 endchoice <<
1043 <<
1044 config PAGE_OFFSET <<
1045 hex <<
1046 default PHYS_OFFSET if !MMU <<
1047 default 0x40000000 if VMSPLIT_1G <<
1048 default 0x80000000 if VMSPLIT_2G <<
1049 default 0xB0000000 if VMSPLIT_3G_OPT <<
1050 default 0xC0000000 <<
1051 <<
1052 config KASAN_SHADOW_OFFSET <<
1053 hex <<
1054 depends on KASAN <<
1055 default 0x1f000000 if PAGE_OFFSET=0x4 <<
1056 default 0x5f000000 if PAGE_OFFSET=0x8 <<
1057 default 0x9f000000 if PAGE_OFFSET=0xC <<
1058 default 0x8f000000 if PAGE_OFFSET=0xB <<
1059 default 0xffffffff <<
1060 <<
1061 config NR_CPUS <<
1062 int "Maximum number of CPUs (2-32)" <<
1063 range 2 16 if DEBUG_KMAP_LOCAL <<
1064 range 2 32 if !DEBUG_KMAP_LOCAL <<
1065 depends on SMP <<
1066 default "4" <<
1067 help <<
1068 The maximum number of CPUs that the <<
1069 Up to 32 CPUs can be supported, or <<
1070 debugging is enabled, which uses ha <<
1071 slots as guard regions. <<
1072 <<
1073 config HOTPLUG_CPU <<
1074 bool "Support for hot-pluggable CPUs" <<
1075 depends on SMP <<
1076 select GENERIC_IRQ_MIGRATION <<
1077 help <<
1078 Say Y here to experiment with turni <<
1079 can be controlled through /sys/devi <<
1080 <<
1081 config ARM_PSCI <<
1082 bool "Support for the ARM Power State <<
1083 depends on HAVE_ARM_SMCCC <<
1084 select ARM_PSCI_FW <<
1085 help <<
1086 Say Y here if you want Linux to com <<
1087 implementing the PSCI specification <<
1088 management operations described in <<
1089 0022A ("Power State Coordination In <<
1090 ARM processors"). <<
1091 <<
1092 config HZ_FIXED <<
1093 int <<
1094 default 128 if SOC_AT91RM9200 <<
1095 default 0 <<
1096 <<
1097 choice <<
1098 depends on HZ_FIXED = 0 <<
1099 prompt "Timer frequency" <<
1100 <<
1101 config HZ_100 <<
1102 bool "100 Hz" <<
1103 <<
1104 config HZ_200 <<
1105 bool "200 Hz" <<
1106 <<
1107 config HZ_250 <<
1108 bool "250 Hz" <<
1109 <<
1110 config HZ_300 <<
1111 bool "300 Hz" <<
1112 <<
1113 config HZ_500 <<
1114 bool "500 Hz" <<
1115 <<
1116 config HZ_1000 <<
1117 bool "1000 Hz" <<
1118 <<
1119 endchoice <<
1120 271
1121 config HZ !! 272 config ALPHA_EV67
1122 int !! 273 bool "EV67 (or later) CPU (speed > 600MHz)?" if ALPHA_DP264 || ALPHA_EIGER
1123 default HZ_FIXED if HZ_FIXED != 0 !! 274 default y if ALPHA_NAUTILUS || ALPHA_WILDFIRE || ALPHA_TITAN || ALPHA_SHARK || ALPHA_MARVEL
1124 default 100 if HZ_100 <<
1125 default 200 if HZ_200 <<
1126 default 250 if HZ_250 <<
1127 default 300 if HZ_300 <<
1128 default 500 if HZ_500 <<
1129 default 1000 <<
1130 <<
1131 config SCHED_HRTICK <<
1132 def_bool HIGH_RES_TIMERS <<
1133 <<
1134 config THUMB2_KERNEL <<
1135 bool "Compile the kernel in Thumb-2 m <<
1136 depends on (CPU_V7 || CPU_V7M) && !CP <<
1137 default y if CPU_THUMBONLY <<
1138 select ARM_UNWIND <<
1139 help 275 help
1140 By enabling this option, the kernel !! 276 Is this a machine based on the EV67 core? If in doubt, select N here
1141 Thumb-2 mode. !! 277 and the machine will be treated as an EV6.
1142 278
1143 If unsure, say N. !! 279 config ALPHA_MCPCIA
1144 !! 280 bool
1145 config ARM_PATCH_IDIV !! 281 depends on ALPHA_RAWHIDE
1146 bool "Runtime patch udiv/sdiv instruc <<
1147 depends on CPU_32v7 <<
1148 default y 282 default y
1149 help <<
1150 The ARM compiler inserts calls to _ <<
1151 __aeabi_uidiv() when it needs to pe <<
1152 and unsigned integers. Some v7 CPUs <<
1153 and udiv instructions that can be u <<
1154 functions. <<
1155 <<
1156 Enabling this option allows the ker <<
1157 replace the first two instructions <<
1158 with the sdiv or udiv plus "bx lr" <<
1159 it is running on supports them. Typ <<
1160 and less power intensive than runni <<
1161 code to do integer division. <<
1162 <<
1163 config AEABI <<
1164 bool "Use the ARM EABI to compile the <<
1165 !CPU_V7M && !CPU_V6 && !CPU_V <<
1166 default CPU_V7 || CPU_V7M || CPU_V6 | <<
1167 help <<
1168 This option allows for the kernel t <<
1169 ARM ABI (aka EABI). This is only u <<
1170 space environment that is also comp <<
1171 <<
1172 Since there are major incompatibili <<
1173 EABI, especially with regard to str <<
1174 option also changes the kernel sysc <<
1175 disambiguate both ABIs and allow fo <<
1176 (selected with CONFIG_OABI_COMPAT). <<
1177 <<
1178 To use this you need GCC version 4. <<
1179 <<
1180 config OABI_COMPAT <<
1181 bool "Allow old ABI binaries to run w <<
1182 depends on AEABI && !THUMB2_KERNEL <<
1183 help <<
1184 This option preserves the old sysca <<
1185 new (ARM EABI) one. It also provide <<
1186 intercept syscalls that have struct <<
1187 in memory differs between the legac <<
1188 (only for non "thumb" binaries). Th <<
1189 overhead to all syscalls and produc <<
1190 <<
1191 The seccomp filter system will not <<
1192 selected, since there is no way yet <<
1193 between calling conventions during <<
1194 <<
1195 If you know you'll be using only pu <<
1196 can say N here. If this option is n <<
1197 to execute a legacy ABI binary then <<
1198 UNPREDICTABLE (in fact it can be pr <<
1199 at all). If in doubt say N. <<
1200 283
1201 config ARCH_SELECT_MEMORY_MODEL !! 284 config ALPHA_POLARIS
1202 def_bool y !! 285 bool
1203 !! 286 depends on ALPHA_RX164
1204 config ARCH_FLATMEM_ENABLE <<
1205 def_bool !(ARCH_RPC || ARCH_SA1100) <<
1206 <<
1207 config ARCH_SPARSEMEM_ENABLE <<
1208 def_bool !ARCH_FOOTBRIDGE <<
1209 select SPARSEMEM_STATIC if SPARSEMEM <<
1210 <<
1211 config HIGHMEM <<
1212 bool "High Memory Support" <<
1213 depends on MMU <<
1214 select KMAP_LOCAL <<
1215 select KMAP_LOCAL_NON_LINEAR_PTE_ARRA <<
1216 help <<
1217 The address space of ARM processors <<
1218 and it has to accommodate user addr <<
1219 space as well as some memory mapped <<
1220 have a large amount of physical mem <<
1221 memory can be "permanently mapped" <<
1222 memory that is not permanently mapp <<
1223 <<
1224 Depending on the selected kernel/us <<
1225 vmalloc space and actual amount of <<
1226 option which should result in a sli <<
1227 <<
1228 If unsure, say n. <<
1229 <<
1230 config HIGHPTE <<
1231 bool "Allocate 2nd-level pagetables f <<
1232 depends on HIGHMEM <<
1233 default y <<
1234 help <<
1235 The VM uses one page of physical me <<
1236 For systems with a lot of processes <<
1237 precious low memory, eventually lea <<
1238 consumed by page tables. Setting t <<
1239 user-space 2nd level page tables to <<
1240 <<
1241 config ARM_PAN <<
1242 bool "Enable privileged no-access" <<
1243 depends on MMU <<
1244 default y 287 default y
1245 help <<
1246 Increase kernel security by ensurin <<
1247 are unable to access userspace addr <<
1248 use-after-free bugs becoming an exp <<
1249 by ensuring that magic values (such <<
1250 fault when dereferenced. <<
1251 288
1252 The implementation uses CPU domains !! 289 config ALPHA_IRONGATE
1253 disabling of TTBR0 page table walks !! 290 bool
1254 !! 291 depends on ALPHA_NAUTILUS
1255 config CPU_SW_DOMAIN_PAN <<
1256 def_bool y <<
1257 depends on ARM_PAN && !ARM_LPAE <<
1258 help <<
1259 Enable use of CPU domains to implem <<
1260 <<
1261 CPUs with low-vector mappings use a <<
1262 Their lower 1MB needs to remain acc <<
1263 the remainder of userspace will bec <<
1264 <<
1265 config CPU_TTBR0_PAN <<
1266 def_bool y <<
1267 depends on ARM_PAN && ARM_LPAE <<
1268 help <<
1269 Enable privileged no-access by disa <<
1270 running in kernel mode. <<
1271 <<
1272 config HW_PERF_EVENTS <<
1273 def_bool y <<
1274 depends on ARM_PMU <<
1275 <<
1276 config ARM_MODULE_PLTS <<
1277 bool "Use PLTs to allow module memory <<
1278 depends on MODULES <<
1279 select KASAN_VMALLOC if KASAN <<
1280 default y 292 default y
1281 help <<
1282 Allocate PLTs when loading modules <<
1283 targets are too far away for their <<
1284 in the instructions themselves can <<
1285 module's PLT. This allows modules t <<
1286 vmalloc area after the dedicated mo <<
1287 exhausted. The modules will use sli <<
1288 rounding up to page size, the actua <<
1289 the same. <<
1290 <<
1291 Disabling this is usually safe for <<
1292 configurations. If unsure, say y. <<
1293 <<
1294 config ARCH_FORCE_MAX_ORDER <<
1295 int "Order of maximal physically cont <<
1296 default "11" if SOC_AM33XX <<
1297 default "8" if SA1111 <<
1298 default "10" <<
1299 help <<
1300 The kernel page allocator limits th <<
1301 contiguous allocations. The limit i <<
1302 defines the maximal power of two of <<
1303 allocated as a single contiguous bl <<
1304 overriding the default setting when <<
1305 large blocks of physically contiguo <<
1306 <<
1307 Don't change if unsure. <<
1308 <<
1309 config ALIGNMENT_TRAP <<
1310 def_bool CPU_CP15_MMU <<
1311 select HAVE_PROC_CPU if PROC_FS <<
1312 help <<
1313 ARM processors cannot fetch/store i <<
1314 naturally aligned on the bus, i.e., <<
1315 address divisible by 4. On 32-bit A <<
1316 fetch/store instructions will be em <<
1317 here, which has a severe performanc <<
1318 correct operation of some network p <<
1319 configuration it is safe to say N, <<
1320 <<
1321 config UACCESS_WITH_MEMCPY <<
1322 bool "Use kernel mem{cpy,set}() for { <<
1323 depends on MMU <<
1324 default y if CPU_FEROCEON <<
1325 help <<
1326 Implement faster copy_to_user and c <<
1327 cores where a 8-word STM instructio <<
1328 memory write throughput than a sequ <<
1329 <<
1330 A possible side effect is a slight <<
1331 between threads sharing the same ad <<
1332 such copy operations with large buf <<
1333 <<
1334 However, if the CPU data cache is u <<
1335 this option is unlikely to provide <<
1336 <<
1337 config PARAVIRT <<
1338 bool "Enable paravirtualization code" <<
1339 help <<
1340 This changes the kernel so it can m <<
1341 under a hypervisor, potentially imp <<
1342 over full virtualization. <<
1343 <<
1344 config PARAVIRT_TIME_ACCOUNTING <<
1345 bool "Paravirtual steal time accounti <<
1346 select PARAVIRT <<
1347 help <<
1348 Select this option to enable fine g <<
1349 accounting. Time spent executing ot <<
1350 the current vCPU is discounted from <<
1351 that, there can be a small performa <<
1352 <<
1353 If in doubt, say N here. <<
1354 293
1355 config XEN_DOM0 !! 294 config GENERIC_HWEIGHT
1356 def_bool y !! 295 bool
1357 depends on XEN !! 296 default y if !ALPHA_EV67
1358 297
1359 config XEN !! 298 config ALPHA_BROKEN_IRQ_MASK
1360 bool "Xen guest support on ARM" !! 299 bool
1361 depends on ARM && AEABI && OF !! 300 depends on ALPHA_GENERIC || ALPHA_PC164
1362 depends on CPU_V7 && !CPU_V6 <<
1363 depends on !GENERIC_ATOMIC64 <<
1364 depends on MMU <<
1365 select ARCH_DMA_ADDR_T_64BIT <<
1366 select ARM_PSCI <<
1367 select SWIOTLB <<
1368 select SWIOTLB_XEN <<
1369 select PARAVIRT <<
1370 help <<
1371 Say Y if you want to run Linux in a <<
1372 <<
1373 config CC_HAVE_STACKPROTECTOR_TLS <<
1374 def_bool $(cc-option,-mtp=cp15 -mstac <<
1375 <<
1376 config STACKPROTECTOR_PER_TASK <<
1377 bool "Use a unique stack canary value <<
1378 depends on STACKPROTECTOR && CURRENT_ <<
1379 depends on GCC_PLUGINS || CC_HAVE_STA <<
1380 select GCC_PLUGIN_ARM_SSP_PER_TASK if <<
1381 default y 301 default y
1382 help <<
1383 Due to the fact that GCC uses an or <<
1384 which to load the value of the stac <<
1385 change at reboot time on SMP system <<
1386 kernel's address space are forced t <<
1387 the entire duration that the system <<
1388 <<
1389 Enable this option to switch to a d <<
1390 different canary value for each tas <<
1391 302
1392 endmenu !! 303 config VGA_HOSE
1393 !! 304 bool
1394 menu "Boot options" !! 305 depends on VGA_CONSOLE && (ALPHA_GENERIC || ALPHA_TITAN || ALPHA_MARVEL || ALPHA_TSUNAMI)
1395 <<
1396 config USE_OF <<
1397 bool "Flattened Device Tree support" <<
1398 select IRQ_DOMAIN <<
1399 select OF <<
1400 help <<
1401 Include support for flattened devic <<
1402 <<
1403 config ARCH_WANT_FLAT_DTB_INSTALL <<
1404 def_bool y <<
1405 <<
1406 config ATAGS <<
1407 bool "Support for the traditional ATA <<
1408 default y 306 default y
1409 help 307 help
1410 This is the traditional way of pass !! 308 Support VGA on an arbitrary hose; needed for several platforms
1411 time. If you are solely relying on !! 309 which always have multiple hoses, and whose consoles support it.
1412 the ARM_ATAG_DTB_COMPAT option) the <<
1413 to remove ATAGS support from your k <<
1414 <<
1415 config DEPRECATED_PARAM_STRUCT <<
1416 bool "Provide old way to pass kernel <<
1417 depends on ATAGS <<
1418 help <<
1419 This was deprecated in 2001 and ann <<
1420 Some old boot loaders still use thi <<
1421 <<
1422 # Compressed boot loader in ROM. Yes, we rea <<
1423 # TEXT and BSS so we preserve their values in <<
1424 config ZBOOT_ROM_TEXT <<
1425 hex "Compressed ROM boot loader base <<
1426 default 0x0 <<
1427 help <<
1428 The physical address at which the R <<
1429 placed in the target. Platforms wh <<
1430 ROM-able zImage formats normally se <<
1431 value in their defconfig file. <<
1432 <<
1433 If ZBOOT_ROM is not enabled, this h <<
1434 <<
1435 config ZBOOT_ROM_BSS <<
1436 hex "Compressed ROM boot loader BSS a <<
1437 default 0x0 <<
1438 help <<
1439 The base address of an area of read <<
1440 for the ROM-able zImage which must <<
1441 decompressor is running. It must be <<
1442 entire decompressed kernel plus an <<
1443 Platforms which normally make use o <<
1444 normally set this to a suitable val <<
1445 <<
1446 If ZBOOT_ROM is not enabled, this h <<
1447 <<
1448 config ZBOOT_ROM <<
1449 bool "Compressed boot loader in ROM/f <<
1450 depends on ZBOOT_ROM_TEXT != ZBOOT_RO <<
1451 depends on !ARM_APPENDED_DTB && !XIP_ <<
1452 help <<
1453 Say Y here if you intend to execute <<
1454 (zImage) directly from ROM or flash <<
1455 <<
1456 config ARM_APPENDED_DTB <<
1457 bool "Use appended device tree blob t <<
1458 depends on OF <<
1459 help <<
1460 With this option, the boot code wil <<
1461 (DTB) appended to zImage <<
1462 (e.g. cat zImage <filename>.dtb > z <<
1463 <<
1464 This is meant as a backward compati <<
1465 systems with a bootloader that can' <<
1466 the documented boot protocol using <<
1467 <<
1468 Beware that there is very little in <<
1469 this option being confused by lefto <<
1470 look like a DTB header after a rebo <<
1471 to zImage. Do not leave this optio <<
1472 if you don't intend to always appen <<
1473 location into r2 of a bootloader pr <<
1474 to this option. <<
1475 <<
1476 config ARM_ATAG_DTB_COMPAT <<
1477 bool "Supplement the appended DTB wit <<
1478 depends on ARM_APPENDED_DTB <<
1479 help <<
1480 Some old bootloaders can't be updat <<
1481 they provide ATAGs with memory conf <<
1482 the kernel cmdline string, etc. Su <<
1483 provided by the bootloader and can' <<
1484 DTB. To allow a device tree enable <<
1485 bootloaders, this option allows zIm <<
1486 from the ATAG list and store it at <<
1487 310
1488 choice <<
1489 prompt "Kernel command line type" <<
1490 depends on ARM_ATAG_DTB_COMPAT <<
1491 default ARM_ATAG_DTB_COMPAT_CMDLINE_F <<
1492 <<
1493 config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTL <<
1494 bool "Use bootloader kernel arguments <<
1495 help <<
1496 Uses the command-line options passe <<
1497 the device tree bootargs property. <<
1498 any, the device tree bootargs prope <<
1499 311
1500 config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND !! 312 config ALPHA_QEMU
1501 bool "Extend with bootloader kernel a !! 313 bool "Run under QEMU emulation"
>> 314 depends on !ALPHA_GENERIC
1502 help 315 help
1503 The command-line arguments provided !! 316 Assume the presence of special features supported by QEMU PALcode
1504 appended to the the device tree boo !! 317 that reduce the overhead of system emulation.
1505 318
1506 endchoice !! 319 Generic kernels will auto-detect QEMU. But when building a
>> 320 system-specific kernel, the assumption is that we want to
>> 321 eliminate as many runtime tests as possible.
1507 322
1508 config CMDLINE !! 323 If unsure, say N.
1509 string "Default kernel command string <<
1510 default "" <<
1511 help <<
1512 On some architectures (e.g. CATS), <<
1513 for the boot loader to pass argumen <<
1514 architectures, you should supply so <<
1515 time by entering them here. As a mi <<
1516 memory size and the root device (e. <<
1517 324
1518 choice <<
1519 prompt "Kernel command line type" <<
1520 depends on CMDLINE != "" <<
1521 default CMDLINE_FROM_BOOTLOADER <<
1522 <<
1523 config CMDLINE_FROM_BOOTLOADER <<
1524 bool "Use bootloader kernel arguments <<
1525 help <<
1526 Uses the command-line options passe <<
1527 the boot loader doesn't provide any <<
1528 string provided in CMDLINE will be <<
1529 <<
1530 config CMDLINE_EXTEND <<
1531 bool "Extend bootloader kernel argume <<
1532 help <<
1533 The command-line arguments provided <<
1534 appended to the default kernel comm <<
1535 <<
1536 config CMDLINE_FORCE <<
1537 bool "Always use the default kernel c <<
1538 help <<
1539 Always use the default kernel comma <<
1540 loader passes other arguments to th <<
1541 This is useful if you cannot or don <<
1542 command-line options your boot load <<
1543 endchoice <<
1544 325
1545 config XIP_KERNEL !! 326 config ALPHA_SRM
1546 bool "Kernel Execute-In-Place from RO !! 327 bool "Use SRM as bootloader" if ALPHA_PC164 || ALPHA_TAKARA || ALPHA_ALCOR || ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_NAUTILUS
1547 depends on !ARM_LPAE && !ARCH_MULTIPL !! 328 depends on TTY
1548 depends on !ARM_PATCH_IDIV && !ARM_PA !! 329 default y if ALPHA_MIKASA || ALPHA_SABLE || ALPHA_NORITAKE || ALPHA_DP264 || ALPHA_RAWHIDE || ALPHA_EIGER || ALPHA_WILDFIRE || ALPHA_TITAN || ALPHA_SHARK || ALPHA_MARVEL
1549 help !! 330 help
1550 Execute-In-Place allows the kernel !! 331 There are two different types of booting firmware on Alphas: SRM,
1551 directly addressable by the CPU, su !! 332 which is command line driven, and ARC, which uses menus and arrow
1552 space since the text section of the !! 333 keys. Details about the Linux/Alpha booting process are contained in
1553 to RAM. Read-write sections, such !! 334 the Linux/Alpha FAQ, accessible on the WWW from
1554 are still copied to RAM. The XIP k !! 335 <http://www.alphalinux.org/>.
1555 it has to run directly from flash, !! 336
1556 store it. The flash address used t !! 337 The usual way to load Linux on an Alpha machine is to use MILO
1557 and for storing it, is configuratio !! 338 (a bootloader that lets you pass command line parameters to the
1558 say Y here, you must know the prope !! 339 kernel just like lilo does for the x86 architecture) which can be
1559 store the kernel image depending on !! 340 loaded either from ARC or can be installed directly as a permanent
1560 !! 341 firmware replacement from floppy (which requires changing a certain
1561 Also note that the make target beco !! 342 jumper on the motherboard). If you want to do either of these, say N
1562 "make zImage" or "make Image". The !! 343 here. If MILO doesn't work on your system (true for Jensen
1563 ROM memory will be arch/arm/boot/xi !! 344 motherboards), you can bypass it altogether and boot Linux directly
>> 345 from an SRM console; say Y here in order to do that. Note that you
>> 346 won't be able to boot from an IDE disk using SRM.
1564 347
1565 If unsure, say N. 348 If unsure, say N.
1566 349
1567 config XIP_PHYS_ADDR !! 350 config ARCH_MAY_HAVE_PC_FDC
1568 hex "XIP Kernel Physical Location" <<
1569 depends on XIP_KERNEL <<
1570 default "0x00080000" <<
1571 help <<
1572 This is the physical address in you <<
1573 be linked for and stored to. This <<
1574 own flash usage. <<
1575 <<
1576 config XIP_DEFLATED_DATA <<
1577 bool "Store kernel .data section comp <<
1578 depends on XIP_KERNEL <<
1579 select ZLIB_INFLATE <<
1580 help <<
1581 Before the kernel is actually execu <<
1582 copied to RAM from ROM. This option <<
1583 in compressed form and decompressed <<
1584 copied, saving some precious ROM sp <<
1585 slightly longer boot delay. <<
1586 <<
1587 config ARCH_SUPPORTS_KEXEC <<
1588 def_bool (!SMP || PM_SLEEP_SMP) && MM <<
1589 <<
1590 config ATAGS_PROC <<
1591 bool "Export atags in procfs" <<
1592 depends on ATAGS && KEXEC <<
1593 default y <<
1594 help <<
1595 Should the atags used to boot the k <<
1596 file in procfs. Useful with kexec. <<
1597 <<
1598 config ARCH_SUPPORTS_CRASH_DUMP <<
1599 def_bool y 351 def_bool y
1600 352
1601 config AUTO_ZRELADDR !! 353 config SMP
1602 bool "Auto calculation of the decompr !! 354 bool "Symmetric multi-processing support"
1603 default !(ARCH_FOOTBRIDGE || ARCH_RPC !! 355 depends on ALPHA_SABLE || ALPHA_RAWHIDE || ALPHA_DP264 || ALPHA_WILDFIRE || ALPHA_TITAN || ALPHA_GENERIC || ALPHA_SHARK || ALPHA_MARVEL
1604 help <<
1605 ZRELADDR is the physical address wh <<
1606 image will be placed. If AUTO_ZRELA <<
1607 will be determined at run-time, eit <<
1608 with 0xf8000000, or, if invalid, fr <<
1609 This assumes the zImage being place <<
1610 start of memory. <<
1611 <<
1612 config EFI_STUB <<
1613 bool <<
1614 <<
1615 config EFI <<
1616 bool "UEFI runtime support" <<
1617 depends on OF && !CPU_BIG_ENDIAN && M <<
1618 select UCS2_STRING <<
1619 select EFI_PARAMS_FROM_FDT <<
1620 select EFI_STUB <<
1621 select EFI_GENERIC_STUB <<
1622 select EFI_RUNTIME_WRAPPERS <<
1623 help <<
1624 This option provides support for ru <<
1625 by UEFI firmware (such as non-volat <<
1626 clock, and platform reset). A UEFI <<
1627 allow the kernel to be booted as an <<
1628 is only useful for kernels that may <<
1629 UEFI firmware. <<
1630 <<
1631 config DMI <<
1632 bool "Enable support for SMBIOS (DMI) <<
1633 depends on EFI <<
1634 default y <<
1635 help 356 help
1636 This enables SMBIOS/DMI feature for !! 357 This enables support for systems with more than one CPU. If you have
1637 !! 358 a system with only one CPU, say N. If you have a system with more
1638 This option is only useful on syste !! 359 than one CPU, say Y.
1639 However, even with this option, the <<
1640 continue to boot on existing non-UE <<
1641 <<
1642 NOTE: This does *NOT* enable or enc <<
1643 i.e., the the practice of identifyi <<
1644 decide whether certain workarounds <<
1645 firmware need to be enabled. This w <<
1646 to be enabled much earlier than we <<
1647 <<
1648 endmenu <<
1649 <<
1650 menu "CPU Power Management" <<
1651 <<
1652 source "drivers/cpufreq/Kconfig" <<
1653 360
1654 source "drivers/cpuidle/Kconfig" !! 361 If you say N here, the kernel will run on uni- and multiprocessor
>> 362 machines, but will use only one CPU of a multiprocessor machine. If
>> 363 you say Y here, the kernel will run on many, but not all,
>> 364 uniprocessor machines. On a uniprocessor machine, the kernel
>> 365 will run faster if you say N here.
1655 366
1656 endmenu !! 367 See also the SMP-HOWTO available at
>> 368 <https://www.tldp.org/docs.html#howto>.
1657 369
1658 menu "Floating point emulation" !! 370 If you don't know what to do here, say N.
1659 371
1660 comment "At least one emulation must be selec !! 372 config NR_CPUS
>> 373 int "Maximum number of CPUs (2-32)"
>> 374 range 2 32
>> 375 depends on SMP
>> 376 default "32" if ALPHA_GENERIC || ALPHA_MARVEL
>> 377 default "4" if !ALPHA_GENERIC && !ALPHA_MARVEL
>> 378 help
>> 379 MARVEL support can handle a maximum of 32 CPUs, all the others
>> 380 with working support have a maximum of 4 CPUs.
1661 381
1662 config FPE_NWFPE !! 382 config ARCH_SPARSEMEM_ENABLE
1663 bool "NWFPE math emulation" !! 383 bool "Sparse Memory Support"
1664 depends on (!AEABI || OABI_COMPAT) && <<
1665 help 384 help
1666 Say Y to include the NWFPE floating !! 385 Say Y to support efficient handling of discontiguous physical memory,
1667 This is necessary to run most binar !! 386 for systems that have huge holes in the physical address space.
1668 support floating point hardware so <<
1669 your machine has an FPA or floating <<
1670 387
1671 You may say N here if you are going !! 388 config ALPHA_WTINT
1672 early in the bootup. !! 389 bool "Use WTINT" if ALPHA_SRM || ALPHA_GENERIC
>> 390 default y if ALPHA_QEMU
>> 391 default n if ALPHA_EV56
>> 392 default n if !ALPHA_SRM && !ALPHA_GENERIC
>> 393 default y if SMP
>> 394 help
>> 395 The Wait for Interrupt (WTINT) PALcall attempts to place the CPU
>> 396 to sleep until the next interrupt. This may reduce the power
>> 397 consumed, and the heat produced by the computer. However, it has
>> 398 the side effect of making the cycle counter unreliable as a timing
>> 399 device across the sleep.
1673 400
1674 config FPE_NWFPE_XP !! 401 For emulation under QEMU, definitely say Y here, as we have other
1675 bool "Support extended precision" !! 402 mechanisms for measuring time than the cycle counter.
1676 depends on FPE_NWFPE <<
1677 help <<
1678 Say Y to include 80-bit support in <<
1679 emulator. Otherwise, only 32 and 6 <<
1680 Note that gcc does not generate 80- <<
1681 so in most cases this option only e <<
1682 floating point emulator without any <<
1683 403
1684 You almost surely want to say N her !! 404 For EV4 (but not LCA), EV5 and EV56 systems, or for systems running
>> 405 MILO, sleep mode is not supported so you might as well say N here.
1685 406
1686 config FPE_FASTFPE !! 407 For SMP systems we cannot use the cycle counter for timing anyway,
1687 bool "FastFPE math emulation (EXPERIM !! 408 so you might as well say Y here.
1688 depends on (!AEABI || OABI_COMPAT) && <<
1689 help <<
1690 Say Y here to include the FAST floa <<
1691 This is an experimental much faster <<
1692 precision for the mantissa. It doe <<
1693 It is very simple, and approximatel <<
1694 409
1695 It should be sufficient for most pr !! 410 If unsure, say N.
1696 for scientific calculations, but yo <<
1697 If you do not feel you need a faste <<
1698 choose NWFPE. <<
1699 411
1700 config VFP !! 412 # LARGE_VMALLOC is racy, if you *really* need it then fix it first
1701 bool "VFP-format floating point maths !! 413 config ALPHA_LARGE_VMALLOC
1702 depends on CPU_V6 || CPU_V6K || CPU_A !! 414 bool
1703 help 415 help
1704 Say Y to include VFP support code i !! 416 Process creation and other aspects of virtual memory management can
1705 if your hardware includes a VFP uni !! 417 be streamlined if we restrict the kernel to one PGD for all vmalloc
>> 418 allocations. This equates to about 8GB.
1706 419
1707 Please see <file:Documentation/arch !! 420 Under normal circumstances, this is so far and above what is needed
1708 release notes and additional status !! 421 as to be laughable. However, there are certain applications (such
>> 422 as benchmark-grade in-kernel web serving) that can make use of as
>> 423 much vmalloc space as is available.
1709 424
1710 Say N if your target does not have !! 425 Say N unless you know you need gobs and gobs of vmalloc space.
1711 426
1712 config VFPv3 !! 427 config VERBOSE_MCHECK
1713 bool !! 428 bool "Verbose Machine Checks"
1714 depends on VFP <<
1715 default y if CPU_V7 <<
1716 <<
1717 config NEON <<
1718 bool "Advanced SIMD (NEON) Extension <<
1719 depends on VFPv3 && CPU_V7 <<
1720 help <<
1721 Say Y to include support code for N <<
1722 Extension. <<
1723 429
1724 config KERNEL_MODE_NEON !! 430 config VERBOSE_MCHECK_ON
1725 bool "Support for NEON in kernel mode !! 431 int "Verbose Printing Mode (0=off, 1=on, 2=all)"
1726 depends on NEON && AEABI !! 432 depends on VERBOSE_MCHECK
>> 433 default 1
1727 help 434 help
1728 Say Y to include support for NEON i !! 435 This option allows the default printing mode to be set, and then
1729 !! 436 possibly overridden by a boot command argument.
1730 endmenu <<
1731 437
1732 menu "Power management options" !! 438 For example, if one wanted the option of printing verbose
>> 439 machine checks, but wanted the default to be as if verbose
>> 440 machine check printing was turned off, then one would choose
>> 441 the printing mode to be 0. Then, upon reboot, one could add
>> 442 the boot command line "verbose_mcheck=1" to get the normal
>> 443 verbose machine check printing, or "verbose_mcheck=2" to get
>> 444 the maximum information available.
1733 445
1734 source "kernel/power/Kconfig" !! 446 Take the default (1) unless you want more control or more info.
1735 447
1736 config ARCH_SUSPEND_POSSIBLE !! 448 choice
1737 depends on CPU_ARM920T || CPU_ARM926T !! 449 prompt "Timer interrupt frequency (HZ)?"
1738 CPU_V6 || CPU_V6K || CPU_V7 | !! 450 default HZ_128 if ALPHA_QEMU
1739 def_bool y !! 451 default HZ_1200 if ALPHA_RAWHIDE
>> 452 default HZ_1024
>> 453 help
>> 454 The frequency at which timer interrupts occur. A high frequency
>> 455 minimizes latency, whereas a low frequency minimizes overhead of
>> 456 process accounting. The later effect is especially significant
>> 457 when being run under QEMU.
>> 458
>> 459 Note that some Alpha hardware cannot change the interrupt frequency
>> 460 of the timer. If unsure, say 1024 (or 1200 for Rawhide).
>> 461
>> 462 config HZ_32
>> 463 bool "32 Hz"
>> 464 config HZ_64
>> 465 bool "64 Hz"
>> 466 config HZ_128
>> 467 bool "128 Hz"
>> 468 config HZ_256
>> 469 bool "256 Hz"
>> 470 config HZ_1024
>> 471 bool "1024 Hz"
>> 472 config HZ_1200
>> 473 bool "1200 Hz"
>> 474 endchoice
1740 475
1741 config ARM_CPU_SUSPEND !! 476 config HZ
1742 def_bool PM_SLEEP || BL_SWITCHER || A !! 477 int
1743 depends on ARCH_SUSPEND_POSSIBLE !! 478 default 32 if HZ_32
>> 479 default 64 if HZ_64
>> 480 default 128 if HZ_128
>> 481 default 256 if HZ_256
>> 482 default 1200 if HZ_1200
>> 483 default 1024
>> 484
>> 485 config SRM_ENV
>> 486 tristate "SRM environment through procfs"
>> 487 depends on PROC_FS
>> 488 help
>> 489 If you enable this option, a subdirectory inside /proc called
>> 490 /proc/srm_environment will give you access to the all important
>> 491 SRM environment variables (those which have a name) and also
>> 492 to all others (by their internal number).
>> 493
>> 494 SRM is something like a BIOS for Alpha machines. There are some
>> 495 other such BIOSes, like AlphaBIOS, which this driver cannot
>> 496 support (hey, that's not SRM!).
>> 497
>> 498 Despite the fact that this driver doesn't work on all Alphas (but
>> 499 only on those which have SRM as their firmware), it's save to
>> 500 build it even if your particular machine doesn't know about SRM
>> 501 (or if you intend to compile a generic kernel). It will simply
>> 502 not create those subdirectory in /proc (and give you some warning,
>> 503 of course).
1744 504
1745 config ARCH_HIBERNATION_POSSIBLE !! 505 This driver is also available as a module and will be called
1746 bool !! 506 srm_env then.
1747 depends on MMU <<
1748 default y if ARCH_SUSPEND_POSSIBLE <<
1749 507
1750 endmenu 508 endmenu
1751 509
1752 source "arch/arm/Kconfig.assembler" !! 510 # DUMMY_CONSOLE may be defined in drivers/video/console/Kconfig
>> 511 # but we also need it if VGA_HOSE is set
>> 512 config DUMMY_CONSOLE
>> 513 bool
>> 514 depends on VGA_HOSE
>> 515 default y
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