1 # SPDX-License-Identifier: GPL-2.0 !! 1 #
2 config ARM !! 2 # For a description of the syntax of this configuration file,
3 bool !! 3 # see Documentation/kbuild/kconfig-language.txt.
4 default y !! 4 #
5 select ARCH_32BIT_OFF_T <<
6 select ARCH_CORRECT_STACKTRACE_ON_KRET <<
7 select ARCH_HAS_BINFMT_FLAT <<
8 select ARCH_HAS_CPU_CACHE_ALIASING <<
9 select ARCH_HAS_CPU_FINALIZE_INIT if M <<
10 select ARCH_HAS_CURRENT_STACK_POINTER <<
11 select ARCH_HAS_DEBUG_VIRTUAL if MMU <<
12 select ARCH_HAS_DMA_ALLOC if MMU <<
13 select ARCH_HAS_DMA_OPS <<
14 select ARCH_HAS_DMA_WRITE_COMBINE if ! <<
15 select ARCH_HAS_ELF_RANDOMIZE <<
16 select ARCH_HAS_FORTIFY_SOURCE <<
17 select ARCH_HAS_KEEPINITRD <<
18 select ARCH_HAS_KCOV <<
19 select ARCH_HAS_MEMBARRIER_SYNC_CORE <<
20 select ARCH_HAS_NON_OVERLAPPING_ADDRES <<
21 select ARCH_HAS_PTE_SPECIAL if ARM_LPA <<
22 select ARCH_HAS_SETUP_DMA_OPS <<
23 select ARCH_HAS_SET_MEMORY <<
24 select ARCH_STACKWALK <<
25 select ARCH_HAS_STRICT_KERNEL_RWX if M <<
26 select ARCH_HAS_STRICT_MODULE_RWX if M <<
27 select ARCH_HAS_SYNC_DMA_FOR_DEVICE <<
28 select ARCH_HAS_SYNC_DMA_FOR_CPU <<
29 select ARCH_HAS_TEARDOWN_DMA_OPS if MM <<
30 select ARCH_HAS_TICK_BROADCAST if GENE <<
31 select ARCH_HAVE_NMI_SAFE_CMPXCHG if C <<
32 select ARCH_HAS_GCOV_PROFILE_ALL <<
33 select ARCH_KEEP_MEMBLOCK <<
34 select ARCH_HAS_UBSAN <<
35 select ARCH_MIGHT_HAVE_PC_PARPORT <<
36 select ARCH_OPTIONAL_KERNEL_RWX if ARC <<
37 select ARCH_OPTIONAL_KERNEL_RWX_DEFAUL <<
38 select ARCH_NEED_CMPXCHG_1_EMU if CPU_ <<
39 select ARCH_SUPPORTS_ATOMIC_RMW <<
40 select ARCH_SUPPORTS_CFI_CLANG <<
41 select ARCH_SUPPORTS_HUGETLBFS if ARM_ <<
42 select ARCH_SUPPORTS_PER_VMA_LOCK <<
43 select ARCH_USE_BUILTIN_BSWAP <<
44 select ARCH_USE_CMPXCHG_LOCKREF <<
45 select ARCH_USE_MEMTEST <<
46 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_ <<
47 select ARCH_WANT_GENERAL_HUGETLB <<
48 select ARCH_WANT_IPC_PARSE_VERSION <<
49 select ARCH_WANT_LD_ORPHAN_WARN <<
50 select BINFMT_FLAT_ARGVP_ENVP_ON_STACK <<
51 select BUILDTIME_TABLE_SORT if MMU <<
52 select COMMON_CLK if !(ARCH_RPC || ARC <<
53 select CLONE_BACKWARDS <<
54 select CPU_PM if SUSPEND || CPU_IDLE <<
55 select DCACHE_WORD_ACCESS if HAVE_EFFI <<
56 select DMA_DECLARE_COHERENT <<
57 select DMA_GLOBAL_POOL if !MMU <<
58 select DMA_NONCOHERENT_MMAP if MMU <<
59 select EDAC_SUPPORT <<
60 select EDAC_ATOMIC_SCRUB <<
61 select GENERIC_ALLOCATOR <<
62 select GENERIC_ARCH_TOPOLOGY if ARM_CP <<
63 select GENERIC_ATOMIC64 if CPU_V7M || <<
64 select GENERIC_CLOCKEVENTS_BROADCAST i <<
65 select GENERIC_IRQ_IPI if SMP <<
66 select GENERIC_CPU_AUTOPROBE <<
67 select GENERIC_CPU_DEVICES <<
68 select GENERIC_EARLY_IOREMAP <<
69 select GENERIC_IDLE_POLL_SETUP <<
70 select GENERIC_IRQ_MULTI_HANDLER <<
71 select GENERIC_IRQ_PROBE <<
72 select GENERIC_IRQ_SHOW <<
73 select GENERIC_IRQ_SHOW_LEVEL <<
74 select GENERIC_LIB_DEVMEM_IS_ALLOWED <<
75 select GENERIC_PCI_IOMAP <<
76 select GENERIC_SCHED_CLOCK <<
77 select GENERIC_SMP_IDLE_THREAD <<
78 select HARDIRQS_SW_RESEND <<
79 select HAS_IOPORT <<
80 select HAVE_ARCH_AUDITSYSCALL if AEABI <<
81 select HAVE_ARCH_BITREVERSE if (CPU_32 <<
82 select HAVE_ARCH_JUMP_LABEL if !XIP_KE <<
83 select HAVE_ARCH_KFENCE if MMU && !XIP <<
84 select HAVE_ARCH_KGDB if !CPU_ENDIAN_B <<
85 select HAVE_ARCH_KASAN if MMU && !XIP_ <<
86 select HAVE_ARCH_KASAN_VMALLOC if HAVE <<
87 select HAVE_ARCH_MMAP_RND_BITS if MMU <<
88 select HAVE_ARCH_PFN_VALID <<
89 select HAVE_ARCH_SECCOMP <<
90 select HAVE_ARCH_SECCOMP_FILTER if AEA <<
91 select HAVE_ARCH_STACKLEAK <<
92 select HAVE_ARCH_THREAD_STRUCT_WHITELI <<
93 select HAVE_ARCH_TRACEHOOK <<
94 select HAVE_ARCH_TRANSPARENT_HUGEPAGE <<
95 select HAVE_ARM_SMCCC if CPU_V7 <<
96 select HAVE_EBPF_JIT if !CPU_ENDIAN_BE <<
97 select HAVE_CONTEXT_TRACKING_USER <<
98 select HAVE_C_RECORDMCOUNT <<
99 select HAVE_BUILDTIME_MCOUNT_SORT <<
100 select HAVE_DEBUG_KMEMLEAK if !XIP_KER <<
101 select HAVE_DMA_CONTIGUOUS if MMU <<
102 select HAVE_DYNAMIC_FTRACE if !XIP_KER <<
103 select HAVE_DYNAMIC_FTRACE_WITH_REGS i <<
104 select HAVE_EFFICIENT_UNALIGNED_ACCESS <<
105 select HAVE_EXIT_THREAD <<
106 select HAVE_GUP_FAST if ARM_LPAE <<
107 select HAVE_FTRACE_MCOUNT_RECORD if !X <<
108 select HAVE_FUNCTION_ERROR_INJECTION <<
109 select HAVE_FUNCTION_GRAPH_TRACER <<
110 select HAVE_FUNCTION_TRACER if !XIP_KE <<
111 select HAVE_GCC_PLUGINS <<
112 select HAVE_HW_BREAKPOINT if PERF_EVEN <<
113 select HAVE_IRQ_TIME_ACCOUNTING <<
114 select HAVE_KERNEL_GZIP <<
115 select HAVE_KERNEL_LZ4 <<
116 select HAVE_KERNEL_LZMA <<
117 select HAVE_KERNEL_LZO <<
118 select HAVE_KERNEL_XZ <<
119 select HAVE_KPROBES if !XIP_KERNEL && <<
120 select HAVE_KRETPROBES if HAVE_KPROBES <<
121 select HAVE_LD_DEAD_CODE_DATA_ELIMINAT <<
122 select HAVE_MOD_ARCH_SPECIFIC <<
123 select HAVE_NMI <<
124 select HAVE_OPTPROBES if !THUMB2_KERNE <<
125 select HAVE_PAGE_SIZE_4KB <<
126 select HAVE_PCI if MMU <<
127 select HAVE_PERF_EVENTS <<
128 select HAVE_PERF_REGS <<
129 select HAVE_PERF_USER_STACK_DUMP <<
130 select MMU_GATHER_RCU_TABLE_FREE if SM <<
131 select HAVE_REGS_AND_STACK_ACCESS_API <<
132 select HAVE_RSEQ <<
133 select HAVE_STACKPROTECTOR <<
134 select HAVE_SYSCALL_TRACEPOINTS <<
135 select HAVE_UID16 <<
136 select HAVE_VIRT_CPU_ACCOUNTING_GEN <<
137 select HOTPLUG_CORE_SYNC_DEAD if HOTPL <<
138 select IRQ_FORCED_THREADING <<
139 select LOCK_MM_AND_FIND_VMA <<
140 select MODULES_USE_ELF_REL <<
141 select NEED_DMA_MAP_STATE <<
142 select OF_EARLY_FLATTREE if OF <<
143 select OLD_SIGACTION <<
144 select OLD_SIGSUSPEND3 <<
145 select PCI_DOMAINS_GENERIC if PCI <<
146 select PCI_SYSCALL if PCI <<
147 select PERF_USE_VMALLOC <<
148 select RTC_LIB <<
149 select SPARSE_IRQ if !(ARCH_FOOTBRIDGE <<
150 select SYS_SUPPORTS_APM_EMULATION <<
151 select THREAD_INFO_IN_TASK <<
152 select TIMER_OF if OF <<
153 select HAVE_ARCH_VMAP_STACK if MMU && <<
154 select TRACE_IRQFLAGS_SUPPORT if !CPU_ <<
155 select USE_OF if !(ARCH_FOOTBRIDGE || <<
156 # Above selects are sorted alphabetica <<
157 # according to that. Thanks. <<
158 help <<
159 The ARM series is a line of low-powe <<
160 licensed by ARM Ltd and targeted at <<
161 handhelds such as the Compaq IPAQ. <<
162 manufactured, but legacy ARM-based P <<
163 Europe. There is an ARM Linux proje <<
164 <http://www.arm.linux.org.uk/>. <<
165 <<
166 config ARM_HAS_GROUP_RELOCS <<
167 def_bool y <<
168 depends on !LD_IS_LLD || LLD_VERSION > <<
169 depends on !COMPILE_TEST <<
170 help <<
171 Whether or not to use R_ARM_ALU_PC_G <<
172 relocations, which have been around <<
173 supported in LLD until version 14. T <<
174 which is usually sufficient, but not <<
175 this feature when doing compile test <<
176 <<
177 config ARM_DMA_USE_IOMMU <<
178 bool <<
179 select NEED_SG_DMA_LENGTH <<
180 <<
181 if ARM_DMA_USE_IOMMU <<
182 <<
183 config ARM_DMA_IOMMU_ALIGNMENT <<
184 int "Maximum PAGE_SIZE order of alignm <<
185 range 4 9 <<
186 default 8 <<
187 help <<
188 DMA mapping framework by default ali <<
189 PAGE_SIZE order which is greater tha <<
190 size. This works well for buffers up <<
191 for larger buffers it just a waste o <<
192 relatively small addressing window ( <<
193 virtual space with just a few alloca <<
194 <<
195 With this parameter you can specify <<
196 DMA IOMMU buffers. Larger buffers wi <<
197 specified order. The order is expres <<
198 by the PAGE_SIZE. <<
199 <<
200 endif <<
201 <<
202 config SYS_SUPPORTS_APM_EMULATION <<
203 bool <<
204 <<
205 config HAVE_TCM <<
206 bool <<
207 select GENERIC_ALLOCATOR <<
208 <<
209 config HAVE_PROC_CPU <<
210 bool <<
211 <<
212 config NO_IOPORT_MAP <<
213 bool <<
214 5
215 config SBUS !! 6 mainmenu "Linux Kernel Configuration"
216 bool <<
217 7
218 config STACKTRACE_SUPPORT !! 8 config X86
219 bool 9 bool
220 default y 10 default y
>> 11 help
>> 12 This is Linux's home port. Linux was originally native to the Intel
>> 13 386, and runs on all the later x86 processors including the Intel
>> 14 486, 586, Pentiums, and various instruction-set-compatible chips by
>> 15 AMD, Cyrix, and others.
221 16
222 config LOCKDEP_SUPPORT !! 17 config MMU
223 bool 18 bool
224 default y 19 default y
225 20
226 config ARCH_HAS_ILOG2_U32 !! 21 config SBUS
227 bool <<
228 <<
229 config ARCH_HAS_ILOG2_U64 <<
230 bool 22 bool
231 23
232 config ARCH_HAS_BANDGAP !! 24 config UID16
233 bool <<
234 <<
235 config FIX_EARLYCON_MEM <<
236 def_bool y if MMU <<
237 <<
238 config GENERIC_HWEIGHT <<
239 bool 25 bool
240 default y 26 default y
241 27
242 config GENERIC_CALIBRATE_DELAY !! 28 config GENERIC_ISA_DMA
243 bool 29 bool
244 default y 30 default y
245 31
246 config ARCH_MAY_HAVE_PC_FDC !! 32 source "init/Kconfig"
247 bool <<
248 33
249 config ARCH_SUPPORTS_UPROBES <<
250 def_bool y <<
251 34
252 config GENERIC_ISA_DMA !! 35 menu "Processor type and features"
253 bool <<
254 36
255 config FIQ !! 37 choice
256 bool !! 38 prompt "Subarchitecture Type"
257 !! 39 default X86_PC
258 config ARCH_MTD_XIP <<
259 bool <<
260 40
261 config ARM_PATCH_PHYS_VIRT !! 41 config X86_PC
262 bool "Patch physical to virtual transl !! 42 bool "PC-compatible"
263 default y <<
264 depends on MMU <<
265 help 43 help
266 Patch phys-to-virt and virt-to-phys !! 44 Choose this option if your computer is a standard PC or compatible.
267 boot and module load time according <<
268 kernel in system memory. <<
269 45
270 This can only be used with non-XIP M !! 46 config X86_VOYAGER
271 of physical memory is at a 2 MiB bou !! 47 bool "Voyager (NCR)"
>> 48 help
>> 49 Voyager is a MCA based 32 way capable SMP architecture proprietary
>> 50 to NCR Corp. Machine classes 345x/35xx/4100/51xx are voyager based.
>> 51
>> 52 *** WARNING ***
>> 53
>> 54 If you do not specifically know you have a Voyager based machine,
>> 55 say N here otherwise the kernel you build will not be bootable.
>> 56
>> 57 config X86_NUMAQ
>> 58 bool "NUMAQ (IBM/Sequent)"
>> 59 help
>> 60 This option is used for getting Linux to run on a (IBM/Sequent) NUMA
>> 61 multiquad box. This changes the way that processors are bootstrapped,
>> 62 and uses Clustered Logical APIC addressing mode instead of Flat Logical.
>> 63 You will need a new lynxer.elf file to flash your firmware with - send
>> 64 email to Martin.Bligh@us.ibm.com
272 65
273 Only disable this option if you know !! 66 config X86_SUMMIT
274 this feature (eg, building a kernel !! 67 bool "Summit/EXA (IBM x440)"
275 you need to shrink the kernel to the !! 68 depends on SMP
276 <<
277 config NEED_MACH_IO_H <<
278 bool <<
279 help 69 help
280 Select this when mach/io.h is requir !! 70 This option is needed for IBM systems that use the Summit/EXA chipset.
281 definitions for this platform. The !! 71 In particular, it is needed for the x440.
282 be avoided when possible. <<
283 72
284 config NEED_MACH_MEMORY_H !! 73 If you don't have one of these computers, you should say N here.
285 bool <<
286 help <<
287 Select this when mach/memory.h is re <<
288 definitions for this platform. The <<
289 be avoided when possible. <<
290 74
291 config PHYS_OFFSET !! 75 config X86_BIGSMP
292 hex "Physical address of main memory" !! 76 bool "Support for other sub-arch SMP systems with more than 8 CPUs"
293 depends on !ARM_PATCH_PHYS_VIRT || !AU !! 77 depends on SMP
294 default DRAM_BASE if !MMU <<
295 default 0x00000000 if ARCH_FOOTBRIDGE <<
296 default 0x10000000 if ARCH_OMAP1 || AR <<
297 default 0xa0000000 if ARCH_PXA <<
298 default 0xc0000000 if ARCH_EP93XX || A <<
299 default 0 <<
300 help 78 help
301 Please provide the physical address !! 79 This option is needed for the systems that have more than 8 CPUs
302 location of main memory in your syst !! 80 and if the system is not of any sub-arch type above.
303 <<
304 config GENERIC_BUG <<
305 def_bool y <<
306 depends on BUG <<
307 <<
308 config PGTABLE_LEVELS <<
309 int <<
310 default 3 if ARM_LPAE <<
311 default 2 <<
312 81
313 menu "System Type" !! 82 If you don't have such a system, you should say N here.
314 83
315 config MMU !! 84 config X86_VISWS
316 bool "MMU-based Paged Memory Managemen !! 85 bool "SGI 320/540 (Visual Workstation)"
317 default y <<
318 help 86 help
319 Select if you want MMU-based virtual !! 87 The SGI Visual Workstation series is an IA32-based workstation
320 support by paged memory management. !! 88 based on SGI systems chips with some legacy PC hardware attached.
321 89
322 config ARM_SINGLE_ARMV7M !! 90 Say Y here to create a kernel to run on the SGI 320 or 540.
323 def_bool !MMU <<
324 select ARM_NVIC <<
325 select CPU_V7M <<
326 select NO_IOPORT_MAP <<
327 91
328 config ARCH_MMAP_RND_BITS_MIN !! 92 A kernel compiled for the Visual Workstation will not run on PCs
329 default 8 !! 93 and vice versa. See <file:Documentation/sgi-visws.txt> for details.
330 94
331 config ARCH_MMAP_RND_BITS_MAX !! 95 config X86_GENERICARCH
332 default 14 if PAGE_OFFSET=0x40000000 !! 96 bool "Generic architecture (Summit, bigsmp, default)"
333 default 15 if PAGE_OFFSET=0x80000000 !! 97 depends on SMP
334 default 16 !! 98 help
>> 99 This option compiles in the Summit, bigsmp, default subarchitectures.
>> 100 It is intended for a generic binary kernel.
335 101
336 config ARCH_MULTIPLATFORM !! 102 config X86_ES7000
337 bool "Require kernel to be portable to !! 103 bool "Support for Unisys ES7000 IA32 series"
338 depends on MMU && !(ARCH_FOOTBRIDGE || !! 104 depends on SMP
339 default y <<
340 help 105 help
341 In general, all Arm machines can be !! 106 Support for Unisys ES7000 systems. Say 'Y' here if this kernel is
342 kernel image, covering either Armv4/ !! 107 supposed to run on an IA32-based Unisys ES7000 system.
343 !! 108 Only choose this option if you have such a system, otherwise you
344 However, some configuration options !! 109 should say N here.
345 specific physical addresses or enabl <<
346 break other machines. <<
347 <<
348 Selecting N here allows using those <<
349 DEBUG_UNCOMPRESS, XIP_KERNEL and ZBO <<
350 <<
351 source "arch/arm/Kconfig.platforms" <<
352 <<
353 # <<
354 # This is sorted alphabetically by mach-* path <<
355 # Kconfigs may be included either alphabetical <<
356 # plat- suffix) or along side the correspondin <<
357 # <<
358 source "arch/arm/mach-actions/Kconfig" <<
359 <<
360 source "arch/arm/mach-alpine/Kconfig" <<
361 <<
362 source "arch/arm/mach-artpec/Kconfig" <<
363 <<
364 source "arch/arm/mach-aspeed/Kconfig" <<
365 <<
366 source "arch/arm/mach-at91/Kconfig" <<
367 <<
368 source "arch/arm/mach-axxia/Kconfig" <<
369 <<
370 source "arch/arm/mach-bcm/Kconfig" <<
371 <<
372 source "arch/arm/mach-berlin/Kconfig" <<
373 <<
374 source "arch/arm/mach-clps711x/Kconfig" <<
375 <<
376 source "arch/arm/mach-davinci/Kconfig" <<
377 <<
378 source "arch/arm/mach-digicolor/Kconfig" <<
379 <<
380 source "arch/arm/mach-dove/Kconfig" <<
381 <<
382 source "arch/arm/mach-ep93xx/Kconfig" <<
383 <<
384 source "arch/arm/mach-exynos/Kconfig" <<
385 <<
386 source "arch/arm/mach-footbridge/Kconfig" <<
387 <<
388 source "arch/arm/mach-gemini/Kconfig" <<
389 <<
390 source "arch/arm/mach-highbank/Kconfig" <<
391 <<
392 source "arch/arm/mach-hisi/Kconfig" <<
393 <<
394 source "arch/arm/mach-hpe/Kconfig" <<
395 110
396 source "arch/arm/mach-imx/Kconfig" !! 111 endchoice
397 <<
398 source "arch/arm/mach-ixp4xx/Kconfig" <<
399 <<
400 source "arch/arm/mach-keystone/Kconfig" <<
401 <<
402 source "arch/arm/mach-lpc32xx/Kconfig" <<
403 <<
404 source "arch/arm/mach-mediatek/Kconfig" <<
405 <<
406 source "arch/arm/mach-meson/Kconfig" <<
407 112
408 source "arch/arm/mach-milbeaut/Kconfig" !! 113 config ACPI_SRAT
>> 114 bool
>> 115 default y
>> 116 depends on NUMA && (X86_SUMMIT || X86_GENERICARCH)
409 117
410 source "arch/arm/mach-mmp/Kconfig" !! 118 config X86_CYCLONE_TIMER
>> 119 bool
>> 120 default y
>> 121 depends on X86_SUMMIT || X86_GENERICARCH
411 122
412 source "arch/arm/mach-mstar/Kconfig" !! 123 config ES7000_CLUSTERED_APIC
>> 124 bool
>> 125 default y
>> 126 depends on SMP && X86_ES7000 && MPENTIUMIII
413 127
414 source "arch/arm/mach-mv78xx0/Kconfig" !! 128 choice
>> 129 prompt "Processor family"
>> 130 default M686
415 131
416 source "arch/arm/mach-mvebu/Kconfig" !! 132 config M386
>> 133 bool "386"
>> 134 ---help---
>> 135 This is the processor type of your CPU. This information is used for
>> 136 optimizing purposes. In order to compile a kernel that can run on
>> 137 all x86 CPU types (albeit not optimally fast), you can specify
>> 138 "386" here.
>> 139
>> 140 The kernel will not necessarily run on earlier architectures than
>> 141 the one you have chosen, e.g. a Pentium optimized kernel will run on
>> 142 a PPro, but not necessarily on a i486.
>> 143
>> 144 Here are the settings recommended for greatest speed:
>> 145 - "386" for the AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI
>> 146 486DLC/DLC2, UMC 486SX-S and NexGen Nx586. Only "386" kernels
>> 147 will run on a 386 class machine.
>> 148 - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
>> 149 SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
>> 150 - "586" for generic Pentium CPUs lacking the TSC
>> 151 (time stamp counter) register.
>> 152 - "Pentium-Classic" for the Intel Pentium.
>> 153 - "Pentium-MMX" for the Intel Pentium MMX.
>> 154 - "Pentium-Pro" for the Intel Pentium Pro.
>> 155 - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
>> 156 - "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
>> 157 - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
>> 158 - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
>> 159 - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
>> 160 - "Crusoe" for the Transmeta Crusoe series.
>> 161 - "Winchip-C6" for original IDT Winchip.
>> 162 - "Winchip-2" for IDT Winchip 2.
>> 163 - "Winchip-2A" for IDT Winchips with 3dNow! capabilities.
>> 164 - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
>> 165 - "VIA C3-2 for VIA C3-2 "Nehemiah" (model 9 and above).
>> 166
>> 167 If you don't know what to do, choose "386".
>> 168
>> 169 config M486
>> 170 bool "486"
>> 171 help
>> 172 Select this for a 486 series processor, either Intel or one of the
>> 173 compatible processors from AMD, Cyrix, IBM, or Intel. Includes DX,
>> 174 DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or
>> 175 U5S.
>> 176
>> 177 config M586
>> 178 bool "586/K5/5x86/6x86/6x86MX"
>> 179 help
>> 180 Select this for an 586 or 686 series processor such as the AMD K5,
>> 181 the Intel 5x86 or 6x86, or the Intel 6x86MX. This choice does not
>> 182 assume the RDTSC (Read Time Stamp Counter) instruction.
>> 183
>> 184 config M586TSC
>> 185 bool "Pentium-Classic"
>> 186 help
>> 187 Select this for a Pentium Classic processor with the RDTSC (Read
>> 188 Time Stamp Counter) instruction for benchmarking.
>> 189
>> 190 config M586MMX
>> 191 bool "Pentium-MMX"
>> 192 help
>> 193 Select this for a Pentium with the MMX graphics/multimedia
>> 194 extended instructions.
>> 195
>> 196 config M686
>> 197 bool "Pentium-Pro"
>> 198 help
>> 199 Select this for Intel Pentium Pro chips. This enables the use of
>> 200 Pentium Pro extended instructions, and disables the init-time guard
>> 201 against the f00f bug found in earlier Pentiums.
>> 202
>> 203 config MPENTIUMII
>> 204 bool "Pentium-II/Celeron(pre-Coppermine)"
>> 205 help
>> 206 Select this for Intel chips based on the Pentium-II and
>> 207 pre-Coppermine Celeron core. This option enables an unaligned
>> 208 copy optimization, compiles the kernel with optimization flags
>> 209 tailored for the chip, and applies any applicable Pentium Pro
>> 210 optimizations.
>> 211
>> 212 config MPENTIUMIII
>> 213 bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
>> 214 help
>> 215 Select this for Intel chips based on the Pentium-III and
>> 216 Celeron-Coppermine core. This option enables use of some
>> 217 extended prefetch instructions in addition to the Pentium II
>> 218 extensions.
>> 219
>> 220 config MPENTIUM4
>> 221 bool "Pentium-4/Celeron(P4-based)/Xeon"
>> 222 help
>> 223 Select this for Intel Pentium 4 chips. This includes both
>> 224 the Pentium 4 and P4-based Celeron chips. This option
>> 225 enables compile flags optimized for the chip, uses the
>> 226 correct cache shift, and applies any applicable Pentium III
>> 227 optimizations.
>> 228
>> 229 config MK6
>> 230 bool "K6/K6-II/K6-III"
>> 231 help
>> 232 Select this for an AMD K6-family processor. Enables use of
>> 233 some extended instructions, and passes appropriate optimization
>> 234 flags to GCC.
>> 235
>> 236 config MK7
>> 237 bool "Athlon/Duron/K7"
>> 238 help
>> 239 Select this for an AMD Athlon K7-family processor. Enables use of
>> 240 some extended instructions, and passes appropriate optimization
>> 241 flags to GCC.
>> 242
>> 243 config MK8
>> 244 bool "Opteron/Athlon64/Hammer/K8"
>> 245 help
>> 246 Select this for an AMD Opteron or Athlon64 Hammer-family processor. Enables
>> 247 use of some extended instructions, and passes appropriate optimization
>> 248 flags to GCC.
>> 249
>> 250 config MELAN
>> 251 bool "Elan"
>> 252
>> 253 config MCRUSOE
>> 254 bool "Crusoe"
>> 255 help
>> 256 Select this for a Transmeta Crusoe processor. Treats the processor
>> 257 like a 586 with TSC, and sets some GCC optimization flags (like a
>> 258 Pentium Pro with no alignment requirements).
>> 259
>> 260 config MWINCHIPC6
>> 261 bool "Winchip-C6"
>> 262 help
>> 263 Select this for an IDT Winchip C6 chip. Linux and GCC
>> 264 treat this chip as a 586TSC with some extended instructions
>> 265 and alignment requirements.
>> 266
>> 267 config MWINCHIP2
>> 268 bool "Winchip-2"
>> 269 help
>> 270 Select this for an IDT Winchip-2. Linux and GCC
>> 271 treat this chip as a 586TSC with some extended instructions
>> 272 and alignment requirements.
>> 273
>> 274 config MWINCHIP3D
>> 275 bool "Winchip-2A/Winchip-3"
>> 276 help
>> 277 Select this for an IDT Winchip-2A or 3. Linux and GCC
>> 278 treat this chip as a 586TSC with some extended instructions
>> 279 and alignment reqirements. Also enable out of order memory
>> 280 stores for this CPU, which can increase performance of some
>> 281 operations.
>> 282
>> 283 config MCYRIXIII
>> 284 bool "CyrixIII/VIA-C3"
>> 285 help
>> 286 Select this for a Cyrix III or C3 chip. Presently Linux and GCC
>> 287 treat this chip as a generic 586. Whilst the CPU is 686 class,
>> 288 it lacks the cmov extension which gcc assumes is present when
>> 289 generating 686 code.
>> 290 Note that Nehemiah (Model 9) and above will not boot with this
>> 291 kernel due to them lacking the 3DNow! instructions used in earlier
>> 292 incarnations of the CPU.
>> 293
>> 294 config MVIAC3_2
>> 295 bool "VIA C3-2 (Nehemiah)"
>> 296 help
>> 297 Select this for a VIA C3 "Nehemiah". Selecting this enables usage
>> 298 of SSE and tells gcc to treat the CPU as a 686.
>> 299 Note, this kernel will not boot on older (pre model 9) C3s.
417 300
418 source "arch/arm/mach-mxs/Kconfig" !! 301 endchoice
419 302
420 source "arch/arm/mach-nomadik/Kconfig" !! 303 config X86_GENERIC
>> 304 bool "Generic x86 support"
>> 305 help
>> 306 Including some tuning for non selected x86 CPUs too.
>> 307 when it has moderate overhead. This is intended for generic
>> 308 distributions kernels.
421 309
422 source "arch/arm/mach-npcm/Kconfig" !! 310 #
>> 311 # Define implied options from the CPU selection here
>> 312 #
>> 313 config X86_CMPXCHG
>> 314 bool
>> 315 depends on !M386
>> 316 default y
423 317
424 source "arch/arm/mach-omap1/Kconfig" !! 318 config X86_XADD
>> 319 bool
>> 320 depends on !M386
>> 321 default y
425 322
426 source "arch/arm/mach-omap2/Kconfig" !! 323 config X86_L1_CACHE_SHIFT
>> 324 int
>> 325 default "7" if MPENTIUM4 || X86_GENERIC
>> 326 default "4" if MELAN || M486 || M386
>> 327 default "5" if MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCRUSOE || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2
>> 328 default "6" if MK7 || MK8
427 329
428 source "arch/arm/mach-orion5x/Kconfig" !! 330 config RWSEM_GENERIC_SPINLOCK
>> 331 bool
>> 332 depends on M386
>> 333 default y
429 334
430 source "arch/arm/mach-pxa/Kconfig" !! 335 config RWSEM_XCHGADD_ALGORITHM
>> 336 bool
>> 337 depends on !M386
>> 338 default y
431 339
432 source "arch/arm/mach-qcom/Kconfig" !! 340 config X86_PPRO_FENCE
>> 341 bool
>> 342 depends on M686 || M586MMX || M586TSC || M586 || M486 || M386
>> 343 default y
433 344
434 source "arch/arm/mach-realtek/Kconfig" !! 345 config X86_F00F_BUG
>> 346 bool
>> 347 depends on M586MMX || M586TSC || M586 || M486 || M386
>> 348 default y
435 349
436 source "arch/arm/mach-rpc/Kconfig" !! 350 config X86_WP_WORKS_OK
>> 351 bool
>> 352 depends on !M386
>> 353 default y
437 354
438 source "arch/arm/mach-rockchip/Kconfig" !! 355 config X86_INVLPG
>> 356 bool
>> 357 depends on !M386
>> 358 default y
439 359
440 source "arch/arm/mach-s3c/Kconfig" !! 360 config X86_BSWAP
>> 361 bool
>> 362 depends on !M386
>> 363 default y
441 364
442 source "arch/arm/mach-s5pv210/Kconfig" !! 365 config X86_POPAD_OK
>> 366 bool
>> 367 depends on !M386
>> 368 default y
443 369
444 source "arch/arm/mach-sa1100/Kconfig" !! 370 config X86_ALIGNMENT_16
>> 371 bool
>> 372 depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || MELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2
>> 373 default y
445 374
446 source "arch/arm/mach-shmobile/Kconfig" !! 375 config X86_GOOD_APIC
>> 376 bool
>> 377 depends on MK7 || MPENTIUM4 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || MK8
>> 378 default y
447 379
448 source "arch/arm/mach-socfpga/Kconfig" !! 380 config X86_INTEL_USERCOPY
>> 381 bool
>> 382 depends on MPENTIUM4 || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7
>> 383 default y
449 384
450 source "arch/arm/mach-spear/Kconfig" !! 385 config X86_USE_PPRO_CHECKSUM
>> 386 bool
>> 387 depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2
>> 388 default y
451 389
452 source "arch/arm/mach-sti/Kconfig" !! 390 config X86_USE_3DNOW
>> 391 bool
>> 392 depends on MCYRIXIII || MK7
>> 393 default y
453 394
454 source "arch/arm/mach-stm32/Kconfig" !! 395 config X86_OOSTORE
>> 396 bool
>> 397 depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6
>> 398 default y
455 399
456 source "arch/arm/mach-sunxi/Kconfig" !! 400 config HPET_TIMER
>> 401 bool "HPET Timer Support"
>> 402 help
>> 403 This enables the use of the HPET for the kernel's internal timer.
>> 404 HPET is the next generation timer replacing legacy 8254s.
>> 405 You can safely choose Y here. However, HPET will only be
>> 406 activated if the platform and the BIOS support this feature.
>> 407 Otherwise the 8254 will be used for timing services.
457 408
458 source "arch/arm/mach-tegra/Kconfig" !! 409 Choose N to continue using the legacy 8254 timer.
459 410
460 source "arch/arm/mach-ux500/Kconfig" !! 411 config HPET_EMULATE_RTC
>> 412 def_bool HPET_TIMER && RTC=y
461 413
462 source "arch/arm/mach-versatile/Kconfig" !! 414 config SMP
>> 415 bool "Symmetric multi-processing support"
>> 416 ---help---
>> 417 This enables support for systems with more than one CPU. If you have
>> 418 a system with only one CPU, like most personal computers, say N. If
>> 419 you have a system with more than one CPU, say Y.
463 420
464 source "arch/arm/mach-vt8500/Kconfig" !! 421 If you say N here, the kernel will run on single and multiprocessor
>> 422 machines, but will use only one CPU of a multiprocessor machine. If
>> 423 you say Y here, the kernel will run on many, but not all,
>> 424 singleprocessor machines. On a singleprocessor machine, the kernel
>> 425 will run faster if you say N here.
465 426
466 source "arch/arm/mach-zynq/Kconfig" !! 427 Note that if you say Y here and choose architecture "586" or
>> 428 "Pentium" under "Processor family", the kernel will not work on 486
>> 429 architectures. Similarly, multiprocessor kernels for the "PPro"
>> 430 architecture may not work on all Pentium based boards.
>> 431
>> 432 People using multiprocessor machines who say Y here should also say
>> 433 Y to "Enhanced Real Time Clock Support", below. The "Advanced Power
>> 434 Management" code will be disabled if you say Y here.
>> 435
>> 436 See also the <file:Documentation/smp.tex>,
>> 437 <file:Documentation/smp.txt>, <file:Documentation/i386/IO-APIC.txt>,
>> 438 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
>> 439 <http://www.tldp.org/docs.html#howto>.
467 440
468 # ARMv7-M architecture !! 441 If you don't know what to do here, say N.
469 config ARCH_LPC18XX <<
470 bool "NXP LPC18xx/LPC43xx" <<
471 depends on ARM_SINGLE_ARMV7M <<
472 select ARCH_HAS_RESET_CONTROLLER <<
473 select ARM_AMBA <<
474 select CLKSRC_LPC32XX <<
475 select PINCTRL <<
476 help <<
477 Support for NXP's LPC18xx Cortex-M3 <<
478 high performance microcontrollers. <<
479 442
480 config ARCH_MPS2 !! 443 config NR_CPUS
481 bool "ARM MPS2 platform" !! 444 int "Maximum number of CPUs (2-255)"
482 depends on ARM_SINGLE_ARMV7M !! 445 depends on SMP
483 select ARM_AMBA !! 446 default "32" if X86_NUMAQ || X86_SUMMIT || X86_BIGSMP || X86_ES7000
484 select CLKSRC_MPS2 !! 447 default "8"
485 help 448 help
486 Support for Cortex-M Prototyping Sys !! 449 This allows you to specify the maximum number of CPUs which this
487 with a range of available cores like !! 450 kernel will support. The maximum supported value is 255 and the
>> 451 minimum value which makes sense is 2.
>> 452
>> 453 This is purely to save memory - each supported CPU adds
>> 454 approximately eight kilobytes to the kernel image.
>> 455
>> 456 config PREEMPT
>> 457 bool "Preemptible Kernel"
>> 458 help
>> 459 This option reduces the latency of the kernel when reacting to
>> 460 real-time or interactive events by allowing a low priority process to
>> 461 be preempted even if it is in kernel mode executing a system call.
>> 462 This allows applications to run more reliably even when the system is
>> 463 under load.
>> 464
>> 465 Say Y here if you are building a kernel for a desktop, embedded
>> 466 or real-time system. Say N if you are unsure.
>> 467
>> 468 config X86_UP_APIC
>> 469 bool "Local APIC support on uniprocessors" if !SMP
>> 470 depends on !(X86_VISWS || X86_VOYAGER)
>> 471 ---help---
>> 472 A local APIC (Advanced Programmable Interrupt Controller) is an
>> 473 integrated interrupt controller in the CPU. If you have a single-CPU
>> 474 system which has a processor with a local APIC, you can say Y here to
>> 475 enable and use it. If you say Y here even though your machine doesn't
>> 476 have a local APIC, then the kernel will still run with no slowdown at
>> 477 all. The local APIC supports CPU-generated self-interrupts (timer,
>> 478 performance counters), and the NMI watchdog which detects hard
>> 479 lockups.
>> 480
>> 481 If you have a system with several CPUs, you do not need to say Y
>> 482 here: the local APIC will be used automatically.
>> 483
>> 484 config X86_UP_IOAPIC
>> 485 bool "IO-APIC support on uniprocessors"
>> 486 depends on !SMP && X86_UP_APIC
>> 487 help
>> 488 An IO-APIC (I/O Advanced Programmable Interrupt Controller) is an
>> 489 SMP-capable replacement for PC-style interrupt controllers. Most
>> 490 SMP systems and a small number of uniprocessor systems have one.
>> 491 If you have a single-CPU system with an IO-APIC, you can say Y here
>> 492 to use it. If you say Y here even though your machine doesn't have
>> 493 an IO-APIC, then the kernel will still run with no slowdown at all.
488 494
489 Please, note that depends which Appl !! 495 If you have a system with several CPUs, you do not need to say Y
490 for the platform may vary, so adjust !! 496 here: the IO-APIC will be used automatically.
491 <<
492 # Definitions to make life easier <<
493 config ARCH_ACORN <<
494 bool <<
495 497
496 config PLAT_ORION !! 498 config X86_LOCAL_APIC
497 bool 499 bool
498 select CLKSRC_MMIO !! 500 depends on !SMP && X86_UP_APIC
499 select GENERIC_IRQ_CHIP !! 501 default y
500 select IRQ_DOMAIN <<
501 502
502 config PLAT_ORION_LEGACY !! 503 config X86_IO_APIC
503 bool 504 bool
504 select PLAT_ORION !! 505 depends on !SMP && X86_UP_IOAPIC
>> 506 default y
505 507
506 config PLAT_VERSATILE !! 508 config X86_TSC
507 bool 509 bool
508 !! 510 depends on (MWINCHIP3D || MWINCHIP2 || MCRUSOE || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2) && !X86_NUMAQ
509 source "arch/arm/mm/Kconfig" <<
510 <<
511 config IWMMXT <<
512 bool "Enable iWMMXt support" <<
513 depends on CPU_XSCALE || CPU_XSC3 || C <<
514 default y if PXA27x || PXA3xx || ARCH_ <<
515 help <<
516 Enable support for iWMMXt context sw <<
517 running on a CPU that supports it. <<
518 <<
519 if !MMU <<
520 source "arch/arm/Kconfig-nommu" <<
521 endif <<
522 <<
523 config PJ4B_ERRATA_4742 <<
524 bool "PJ4B Errata 4742: IDLE Wake Up C <<
525 depends on CPU_PJ4B && MACH_ARMADA_370 <<
526 default y 511 default y
527 help <<
528 When coming out of either a Wait for <<
529 Event (WFE) IDLE states, a specific <<
530 the retiring WFI/WFE instructions an <<
531 instructions. This sensitivity can <<
532 Workaround: <<
533 The software must insert either a Da <<
534 or Data Memory Barrier (DMB) command <<
535 instruction <<
536 512
537 config ARM_ERRATA_326103 !! 513 config X86_MCE
538 bool "ARM errata: FSR write bit incorr !! 514 bool "Machine Check Exception"
539 depends on CPU_V6 !! 515 ---help---
540 help !! 516 Machine Check Exception support allows the processor to notify the
541 Executing a SWP instruction to read- !! 517 kernel if it detects a problem (e.g. overheating, component failure).
542 of the FSR on the ARM 1136 prior to !! 518 The action the kernel takes depends on the severity of the problem,
543 treat the access as a read, preventi !! 519 ranging from a warning message on the console, to halting the machine.
544 causing the faulting task to liveloc !! 520 Your processor must be a Pentium or newer to support this - check the
>> 521 flags in /proc/cpuinfo for mce. Note that some older Pentium systems
>> 522 have a design flaw which leads to false MCE events - hence MCE is
>> 523 disabled on all P5 processors, unless explicitly enabled with "mce"
>> 524 as a boot argument. Similarly, if MCE is built in and creates a
>> 525 problem on some new non-standard machine, you can boot with "nomce"
>> 526 to disable it. MCE support simply ignores non-MCE processors like
>> 527 the 386 and 486, so nearly everyone can say Y here.
>> 528
>> 529 config X86_MCE_NONFATAL
>> 530 bool "Check for non-fatal errors on AMD Athlon/Duron / Intel Pentium 4"
>> 531 depends on X86_MCE
>> 532 help
>> 533 Enabling this feature starts a timer that triggers every 5 seconds which
>> 534 will look at the machine check registers to see if anything happened.
>> 535 Non-fatal problems automatically get corrected (but still logged).
>> 536 Disable this if you don't want to see these messages.
>> 537 Seeing the messages this option prints out may be indicative of dying hardware,
>> 538 or out-of-spec (ie, overclocked) hardware.
>> 539 This option only does something on certain CPUs.
>> 540 (AMD Athlon/Duron and Intel Pentium 4)
>> 541
>> 542 config X86_MCE_P4THERMAL
>> 543 bool "check for P4 thermal throttling interrupt."
>> 544 depends on X86_MCE && (X86_UP_APIC || SMP)
>> 545 help
>> 546 Enabling this feature will cause a message to be printed when the P4
>> 547 enters thermal throttling.
>> 548
>> 549 config TOSHIBA
>> 550 tristate "Toshiba Laptop support"
>> 551 ---help---
>> 552 This adds a driver to safely access the System Management Mode of
>> 553 the CPU on Toshiba portables with a genuine Toshiba BIOS. It does
>> 554 not work on models with a Phoenix BIOS. The System Management Mode
>> 555 is used to set the BIOS and power saving options on Toshiba portables.
>> 556
>> 557 For information on utilities to make use of this driver see the
>> 558 Toshiba Linux utilities web site at:
>> 559 <http://www.buzzard.org.uk/toshiba/>.
>> 560
>> 561 Say Y if you intend to run this kernel on a Toshiba portable.
>> 562 Say N otherwise.
>> 563
>> 564 config I8K
>> 565 tristate "Dell laptop support"
>> 566 ---help---
>> 567 This adds a driver to safely access the System Management Mode
>> 568 of the CPU on the Dell Inspiron 8000. The System Management Mode
>> 569 is used to read cpu temperature and cooling fan status and to
>> 570 control the fans on the I8K portables.
>> 571
>> 572 This driver has been tested only on the Inspiron 8000 but it may
>> 573 also work with other Dell laptops. You can force loading on other
>> 574 models by passing the parameter `force=1' to the module. Use at
>> 575 your own risk.
>> 576
>> 577 For information on utilities to make use of this driver see the
>> 578 I8K Linux utilities web site at:
>> 579 <http://www.debian.org/~dz/i8k/>
>> 580
>> 581 Say Y if you intend to run this kernel on a Dell Inspiron 8000.
>> 582 Say N otherwise.
>> 583
>> 584 config MICROCODE
>> 585 tristate "/dev/cpu/microcode - Intel IA32 CPU microcode support"
>> 586 ---help---
>> 587 If you say Y here and also to "/dev file system support" in the
>> 588 'File systems' section, you will be able to update the microcode on
>> 589 Intel processors in the IA32 family, e.g. Pentium Pro, Pentium II,
>> 590 Pentium III, Pentium 4, Xeon etc. You will obviously need the
>> 591 actual microcode binary data itself which is not shipped with the
>> 592 Linux kernel.
>> 593
>> 594 For latest news and information on obtaining all the required
>> 595 ingredients for this driver, check:
>> 596 <http://www.urbanmyth.org/microcode/>.
>> 597
>> 598 To compile this driver as a module, choose M here: the
>> 599 module will be called microcode.
>> 600 If you use modprobe or kmod you may also want to add the line
>> 601 'alias char-major-10-184 microcode' to your /etc/modules.conf file.
>> 602
>> 603 config X86_MSR
>> 604 tristate "/dev/cpu/*/msr - Model-specific register support"
>> 605 help
>> 606 This device gives privileged processes access to the x86
>> 607 Model-Specific Registers (MSRs). It is a character device with
>> 608 major 202 and minors 0 to 31 for /dev/cpu/0/msr to /dev/cpu/31/msr.
>> 609 MSR accesses are directed to a specific CPU on multi-processor
>> 610 systems.
545 611
546 config ARM_ERRATA_411920 !! 612 config X86_CPUID
547 bool "ARM errata: Invalidation of the !! 613 tristate "/dev/cpu/*/cpuid - CPU information support"
548 depends on CPU_V6 || CPU_V6K <<
549 help 614 help
550 Invalidation of the Instruction Cach !! 615 This device gives processes access to the x86 CPUID instruction to
551 fail. This erratum is present in 113 !! 616 be executed on a specific processor. It is a character device
552 It does not affect the MPCore. This !! 617 with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to
553 recommended workaround. !! 618 /dev/cpu/31/cpuid.
>> 619
>> 620 config EDD
>> 621 tristate "BIOS Enhanced Disk Drive calls determine boot disk (EXPERIMENTAL)"
>> 622 depends on EXPERIMENTAL
>> 623 help
>> 624 Say Y or M here if you want to enable BIOS Enhanced Disk Drive
>> 625 Services real mode BIOS calls to determine which disk
>> 626 BIOS tries boot from. This information is then exported via driverfs.
554 627
555 config ARM_ERRATA_430973 !! 628 This option is experimental, but believed to be safe,
556 bool "ARM errata: Stale prediction on !! 629 and most disk controller BIOS vendors do not yet implement this feature.
557 depends on CPU_V7 <<
558 help <<
559 This option enables the workaround f <<
560 r1p* erratum. If a code sequence con <<
561 interworking branch is replaced with <<
562 same virtual address, whether due to <<
563 to physical address re-mapping, Cort <<
564 stale interworking branch prediction <<
565 executing the new code sequence in t <<
566 The workaround enables the BTB/BTAC <<
567 and also flushes the branch target c <<
568 Note that setting specific bits in t <<
569 available in non-secure mode. <<
570 630
571 config ARM_ERRATA_458693 !! 631 choice
572 bool "ARM errata: Processor deadlock w !! 632 prompt "High Memory Support"
573 depends on CPU_V7 !! 633 default NOHIGHMEM
574 depends on !ARCH_MULTIPLATFORM <<
575 help <<
576 This option enables the workaround f <<
577 erratum. For very specific sequences <<
578 possible for a hazard condition inte <<
579 be incorrectly associated with a dif <<
580 hazard might then cause a processor <<
581 the L1 caching of the NEON accesses <<
582 in the ACTLR register. Note that set <<
583 register may not be available in non <<
584 available on a multiplatform kernel. <<
585 bootloader instead. <<
586 634
587 config ARM_ERRATA_460075 !! 635 config NOHIGHMEM
588 bool "ARM errata: Data written to the !! 636 bool "off"
589 depends on CPU_V7 !! 637 ---help---
590 depends on !ARCH_MULTIPLATFORM !! 638 Linux can use up to 64 Gigabytes of physical memory on x86 systems.
>> 639 However, the address space of 32-bit x86 processors is only 4
>> 640 Gigabytes large. That means that, if you have a large amount of
>> 641 physical memory, not all of it can be "permanently mapped" by the
>> 642 kernel. The physical memory that's not permanently mapped is called
>> 643 "high memory".
>> 644
>> 645 If you are compiling a kernel which will never run on a machine with
>> 646 more than 1 Gigabyte total physical RAM, answer "off" here (default
>> 647 choice and suitable for most users). This will result in a "3GB/1GB"
>> 648 split: 3GB are mapped so that each process sees a 3GB virtual memory
>> 649 space and the remaining part of the 4GB virtual memory space is used
>> 650 by the kernel to permanently map as much physical memory as
>> 651 possible.
>> 652
>> 653 If the machine has between 1 and 4 Gigabytes physical RAM, then
>> 654 answer "4GB" here.
>> 655
>> 656 If more than 4 Gigabytes is used then answer "64GB" here. This
>> 657 selection turns Intel PAE (Physical Address Extension) mode on.
>> 658 PAE implements 3-level paging on IA32 processors. PAE is fully
>> 659 supported by Linux, PAE mode is implemented on all recent Intel
>> 660 processors (Pentium Pro and better). NOTE: If you say "64GB" here,
>> 661 then the kernel will not boot on CPUs that don't support PAE!
>> 662
>> 663 The actual amount of total physical memory will either be
>> 664 auto detected or can be forced by using a kernel command line option
>> 665 such as "mem=256M". (Try "man bootparam" or see the documentation of
>> 666 your boot loader (lilo or loadlin) about how to pass options to the
>> 667 kernel at boot time.)
>> 668
>> 669 If unsure, say "off".
>> 670
>> 671 config HIGHMEM4G
>> 672 bool "4GB"
591 help 673 help
592 This option enables the workaround f !! 674 Select this if you have a 32-bit processor and between 1 and 4
593 erratum. Any asynchronous access to !! 675 gigabytes of physical RAM.
594 situation in which recent store tran <<
595 and overwritten with stale memory co <<
596 workaround disables the write-alloca <<
597 ACTLR register. Note that setting sp <<
598 may not be available in non-secure m <<
599 a multiplatform kernel. This should <<
600 instead. <<
601 676
602 config ARM_ERRATA_742230 !! 677 config HIGHMEM64G
603 bool "ARM errata: DMB operation may be !! 678 bool "64GB"
604 depends on CPU_V7 && SMP <<
605 depends on !ARCH_MULTIPLATFORM <<
606 help 679 help
607 This option enables the workaround f !! 680 Select this if you have a 32-bit processor and more than 4
608 (r1p0..r2p2) erratum. Under rare cir !! 681 gigabytes of physical RAM.
609 between two write operations may not <<
610 ordering of the two writes. This wor <<
611 the diagnostic register of the Corte <<
612 instruction to behave as a DSB, ensu <<
613 the two writes. Note that setting sp <<
614 register may not be available in non <<
615 available on a multiplatform kernel. <<
616 bootloader instead. <<
617 682
618 config ARM_ERRATA_742231 !! 683 endchoice
619 bool "ARM errata: Incorrect hazard han <<
620 depends on CPU_V7 && SMP <<
621 depends on !ARCH_MULTIPLATFORM <<
622 help <<
623 This option enables the workaround f <<
624 (r2p0..r2p2) erratum. Under certain <<
625 Cortex-A9 MPCore micro-architecture, <<
626 accessing some data located in the s <<
627 data due to bad handling of the addr <<
628 replaced from one of the CPUs at the <<
629 accessing it. This workaround sets s <<
630 register of the Cortex-A9 which redu <<
631 capabilities of the processor. Note <<
632 diagnostics register may not be avai <<
633 is not available on a multiplatform <<
634 the bootloader instead. <<
635 684
636 config ARM_ERRATA_643719 !! 685 config HIGHMEM
637 bool "ARM errata: LoUIS bit field in C !! 686 bool
638 depends on CPU_V7 && SMP !! 687 depends on HIGHMEM64G || HIGHMEM4G
639 default y 688 default y
640 help <<
641 This option enables the workaround f <<
642 r1p0) erratum. On affected cores the <<
643 register returns zero when it should <<
644 corrects this value, ensuring cache <<
645 it behave as intended and avoiding d <<
646 <<
647 config ARM_ERRATA_720789 <<
648 bool "ARM errata: TLBIASIDIS and TLBIM <<
649 depends on CPU_V7 <<
650 help <<
651 This option enables the workaround f <<
652 r2p0) erratum. A faulty ASID can be <<
653 broadcasted CP15 TLB maintenance ope <<
654 As a consequence of this erratum, so <<
655 invalidated are not, resulting in an <<
656 tables. The workaround changes the T <<
657 entries regardless of the ASID. <<
658 <<
659 config ARM_ERRATA_743622 <<
660 bool "ARM errata: Faulty hazard checki <<
661 depends on CPU_V7 <<
662 depends on !ARCH_MULTIPLATFORM <<
663 help <<
664 This option enables the workaround f <<
665 (r2p*) erratum. Under very rare cond <<
666 optimisation in the Cortex-A9 Store <<
667 corruption. This workaround sets a s <<
668 register of the Cortex-A9 which disa <<
669 optimisation, preventing the defect <<
670 visible impact on the overall perfor <<
671 processor. Note that setting specifi <<
672 may not be available in non-secure m <<
673 multiplatform kernel. This should be <<
674 689
675 config ARM_ERRATA_751472 !! 690 config X86_PAE
676 bool "ARM errata: Interrupted ICIALLUI !! 691 bool
677 depends on CPU_V7 !! 692 depends on HIGHMEM64G
678 depends on !ARCH_MULTIPLATFORM !! 693 default y
679 help <<
680 This option enables the workaround f <<
681 to r3p0) erratum. An interrupted ICI <<
682 completion of a following broadcaste <<
683 operation is received by a CPU befor <<
684 potentially leading to corrupted ent <<
685 Note that setting specific bits in t <<
686 not be available in non-secure mode <<
687 a multiplatform kernel. This should <<
688 instead. <<
689 694
690 config ARM_ERRATA_754322 !! 695 # Common NUMA Features
691 bool "ARM errata: possible faulty MMU !! 696 config NUMA
692 depends on CPU_V7 !! 697 bool "Numa Memory Allocation Support"
693 help !! 698 depends on SMP && HIGHMEM64G && (X86_PC || X86_NUMAQ || X86_GENERICARCH || (X86_SUMMIT && ACPI && !ACPI_HT_ONLY))
694 This option enables the workaround f !! 699 default n if X86_PC
695 r3p*) erratum. A speculative memory !! 700 default y if (X86_NUMAQ || X86_SUMMIT)
696 which starts prior to an ASID switch !! 701
697 can populate the micro-TLB with a st !! 702 # Need comments to help the hapless user trying to turn on NUMA support
698 the new ASID. This workaround places !! 703 comment "NUMA (NUMA-Q) requires SMP, 64GB highmem support"
699 switching code so that no page table !! 704 depends on X86_NUMAQ && (!HIGHMEM64G || !SMP)
700 705
701 config ARM_ERRATA_754327 !! 706 comment "NUMA (Summit) requires SMP, 64GB highmem support, full ACPI"
702 bool "ARM errata: no automatic Store B !! 707 depends on X86_SUMMIT && (!HIGHMEM64G || !ACPI || ACPI_HT_ONLY)
703 depends on CPU_V7 && SMP <<
704 help <<
705 This option enables the workaround f <<
706 r2p0) erratum. The Store Buffer does <<
707 mechanism and therefore a livelock m <<
708 continuously polls a memory location <<
709 This workaround defines cpu_relax() <<
710 written polling loops from denying v <<
711 708
712 config ARM_ERRATA_364296 !! 709 config DISCONTIGMEM
713 bool "ARM errata: Possible cache data !! 710 bool
714 depends on CPU_V6 !! 711 depends on NUMA
715 help !! 712 default y
716 This options enables the workaround <<
717 r0p2 erratum (possible cache data co <<
718 hit-under-miss enabled). It sets the <<
719 the auxiliary control register and t <<
720 register, thus disabling hit-under-m <<
721 processor into full low interrupt la <<
722 is not affected. <<
723 713
724 config ARM_ERRATA_764369 !! 714 config HAVE_ARCH_BOOTMEM_NODE
725 bool "ARM errata: Data cache line main !! 715 bool
726 depends on CPU_V7 && SMP !! 716 depends on NUMA
727 help !! 717 default y
728 This option enables the workaround f <<
729 affecting Cortex-A9 MPCore with two <<
730 current revisions). Under certain ti <<
731 cache line maintenance operation by <<
732 Shareable memory region may fail to <<
733 Point of Coherency or to the Point o <<
734 system. This workaround adds a DSB i <<
735 relevant cache maintenance functions <<
736 in the diagnostic control register o <<
737 718
738 config ARM_ERRATA_764319 !! 719 config HIGHPTE
739 bool "ARM errata: Read to DBGPRSR and !! 720 bool "Allocate 3rd-level pagetables from highmem"
740 depends on CPU_V7 !! 721 depends on HIGHMEM4G || HIGHMEM64G
741 help 722 help
742 This option enables the workaround f !! 723 The VM uses one page table entry for each page of physical memory.
743 CP14 read accesses to the DBGPRSR an !! 724 For systems with a lot of RAM, this can be wasteful of precious
744 unexpected Undefined Instruction exc !! 725 low memory. Setting this option will put user-space page table
745 external pin is set to 0, even when !! 726 entries in high memory.
746 from a privileged mode. This work ar !! 727
747 way the kernel does not stop executi !! 728 config MATH_EMULATION
>> 729 bool "Math emulation"
>> 730 ---help---
>> 731 Linux can emulate a math coprocessor (used for floating point
>> 732 operations) if you don't have one. 486DX and Pentium processors have
>> 733 a math coprocessor built in, 486SX and 386 do not, unless you added
>> 734 a 487DX or 387, respectively. (The messages during boot time can
>> 735 give you some hints here ["man dmesg"].) Everyone needs either a
>> 736 coprocessor or this emulation.
>> 737
>> 738 If you don't have a math coprocessor, you need to say Y here; if you
>> 739 say Y here even though you have a coprocessor, the coprocessor will
>> 740 be used nevertheless. (This behavior can be changed with the kernel
>> 741 command line option "no387", which comes handy if your coprocessor
>> 742 is broken. Try "man bootparam" or see the documentation of your boot
>> 743 loader (lilo or loadlin) about how to pass options to the kernel at
>> 744 boot time.) This means that it is a good idea to say Y here if you
>> 745 intend to use this kernel on different machines.
>> 746
>> 747 More information about the internals of the Linux math coprocessor
>> 748 emulation can be found in <file:arch/i386/math-emu/README>.
>> 749
>> 750 If you are not sure, say Y; apart from resulting in a 66 KB bigger
>> 751 kernel, it won't hurt.
>> 752
>> 753 config MTRR
>> 754 bool "MTRR (Memory Type Range Register) support"
>> 755 ---help---
>> 756 On Intel P6 family processors (Pentium Pro, Pentium II and later)
>> 757 the Memory Type Range Registers (MTRRs) may be used to control
>> 758 processor access to memory ranges. This is most useful if you have
>> 759 a video (VGA) card on a PCI or AGP bus. Enabling write-combining
>> 760 allows bus write transfers to be combined into a larger transfer
>> 761 before bursting over the PCI/AGP bus. This can increase performance
>> 762 of image write operations 2.5 times or more. Saying Y here creates a
>> 763 /proc/mtrr file which may be used to manipulate your processor's
>> 764 MTRRs. Typically the X server should use this.
>> 765
>> 766 This code has a reasonably generic interface so that similar
>> 767 control registers on other processors can be easily supported
>> 768 as well:
>> 769
>> 770 The Cyrix 6x86, 6x86MX and M II processors have Address Range
>> 771 Registers (ARRs) which provide a similar functionality to MTRRs. For
>> 772 these, the ARRs are used to emulate the MTRRs.
>> 773 The AMD K6-2 (stepping 8 and above) and K6-3 processors have two
>> 774 MTRRs. The Centaur C6 (WinChip) has 8 MCRs, allowing
>> 775 write-combining. All of these processors are supported by this code
>> 776 and it makes sense to say Y here if you have one of them.
>> 777
>> 778 Saying Y here also fixes a problem with buggy SMP BIOSes which only
>> 779 set the MTRRs for the boot CPU and not for the secondary CPUs. This
>> 780 can lead to all sorts of problems, so it's good to say Y here.
748 781
749 config ARM_ERRATA_775420 !! 782 You can safely say Y even if your machine doesn't have MTRRs, you'll
750 bool "ARM errata: A data cache maintena !! 783 just add about 9 KB to your kernel.
751 depends on CPU_V7 <<
752 help <<
753 This option enables the workaround fo <<
754 r2p6,r2p8,r2p10,r3p0) erratum. In cas <<
755 operation aborts with MMU exception, <<
756 to deadlock. This workaround puts DSB <<
757 an abort may occur on cache maintenan <<
758 <<
759 config ARM_ERRATA_798181 <<
760 bool "ARM errata: TLBI/DSB failure on <<
761 depends on CPU_V7 && SMP <<
762 help <<
763 On Cortex-A15 (r0p0..r3p2) the TLBI* <<
764 adequately shooting down all use of <<
765 option enables the Linux kernel work <<
766 which sends an IPI to the CPUs that <<
767 as the one being invalidated. <<
768 <<
769 config ARM_ERRATA_773022 <<
770 bool "ARM errata: incorrect instructio <<
771 depends on CPU_V7 <<
772 help <<
773 This option enables the workaround f <<
774 (up to r0p4) erratum. In certain rar <<
775 loop buffer may deliver incorrect in <<
776 workaround disables the loop buffer <<
777 <<
778 config ARM_ERRATA_818325_852422 <<
779 bool "ARM errata: A12: some seqs of op <<
780 depends on CPU_V7 <<
781 help <<
782 This option enables the workaround f <<
783 - Cortex-A12 818325: Execution of an <<
784 instruction might deadlock. Fixed <<
785 - Cortex-A12 852422: Execution of a <<
786 lead to either a data corruption o <<
787 any Cortex-A12 cores yet. <<
788 This workaround for all both errata <<
789 Feature Register. This bit disables <<
790 sequence of 2 instructions that use <<
791 <<
792 config ARM_ERRATA_821420 <<
793 bool "ARM errata: A12: sequence of VMO <<
794 depends on CPU_V7 <<
795 help <<
796 This option enables the workaround f <<
797 (all revs) erratum. In very rare tim <<
798 of VMOV to Core registers instructio <<
799 one is in the shadow of a branch or <<
800 deadlock when the VMOV instructions <<
801 <<
802 config ARM_ERRATA_825619 <<
803 bool "ARM errata: A12: DMB NSHST/ISHST <<
804 depends on CPU_V7 <<
805 help <<
806 This option enables the workaround f <<
807 (all revs) erratum. Within rare timi <<
808 DMB NSHST or DMB ISHST instruction f <<
809 and Device/Strongly-Ordered loads an <<
810 <<
811 config ARM_ERRATA_857271 <<
812 bool "ARM errata: A12: CPU might deadl <<
813 depends on CPU_V7 <<
814 help <<
815 This option enables the workaround f <<
816 (all revs) erratum. Under very rare <<
817 hang. The workaround is expected to <<
818 <<
819 config ARM_ERRATA_852421 <<
820 bool "ARM errata: A17: DMB ST might fa <<
821 depends on CPU_V7 <<
822 help <<
823 This option enables the workaround f <<
824 (r1p0, r1p1, r1p2) erratum. Under ve <<
825 execution of a DMB ST instruction mi <<
826 stores from GroupA and stores from G <<
827 <<
828 config ARM_ERRATA_852423 <<
829 bool "ARM errata: A17: some seqs of op <<
830 depends on CPU_V7 <<
831 help <<
832 This option enables the workaround f <<
833 - Cortex-A17 852423: Execution of a <<
834 lead to either a data corruption o <<
835 any Cortex-A17 cores yet. <<
836 This is identical to Cortex-A12 erra <<
837 config option from the A12 erratum d <<
838 for and handled. <<
839 <<
840 config ARM_ERRATA_857272 <<
841 bool "ARM errata: A17: CPU might deadl <<
842 depends on CPU_V7 <<
843 help <<
844 This option enables the workaround f <<
845 This erratum is not known to be fixe <<
846 This is identical to Cortex-A12 erra <<
847 config option from the A12 erratum d <<
848 for and handled. <<
849 <<
850 endmenu <<
851 <<
852 source "arch/arm/common/Kconfig" <<
853 784
854 menu "Bus support" !! 785 See <file:Documentation/mtrr.txt> for more information.
855 786
856 config ISA !! 787 config HAVE_DEC_LOCK
857 bool 788 bool
858 help !! 789 depends on (SMP || PREEMPT) && X86_CMPXCHG
859 Find out whether you have ISA slots !! 790 default y
860 name of a bus system, i.e. the way t <<
861 inside your box. Other bus systems <<
862 (MCA) or VESA. ISA is an older syst <<
863 newer boards don't support it. If y <<
864 791
865 # Select ISA DMA interface !! 792 # turning this on wastes a bunch of space.
866 config ISA_DMA_API !! 793 # Summit needs it only when NUMA is on
>> 794 config BOOT_IOREMAP
867 bool 795 bool
868 !! 796 depends on ((X86_SUMMIT || X86_GENERICARCH) && NUMA)
869 config ARM_ERRATA_814220 !! 797 default y
870 bool "ARM errata: Cache maintenance by <<
871 depends on CPU_V7 <<
872 help <<
873 The v7 ARM states that all cache and <<
874 operations that do not specify an ad <<
875 each other, in program order. <<
876 However, because of this erratum, an <<
877 operation can overtake an L1 set/way <<
878 This ERRATA only affected the Cortex <<
879 r0p4, r0p5. <<
880 798
881 endmenu 799 endmenu
882 800
883 menu "Kernel Features" <<
884 801
885 config HAVE_SMP !! 802 menu "Power management options (ACPI, APM)"
886 bool !! 803 depends on !X86_VOYAGER
887 help <<
888 This option should be selected by ma <<
889 capable CPU. <<
890 804
891 The only effect of this option is to !! 805 source kernel/power/Kconfig
892 options available to the user for co <<
893 806
894 config SMP !! 807 source "drivers/acpi/Kconfig"
895 bool "Symmetric Multi-Processing" <<
896 depends on CPU_V6K || CPU_V7 <<
897 depends on HAVE_SMP <<
898 depends on MMU || ARM_MPU <<
899 select IRQ_WORK <<
900 help <<
901 This enables support for systems wit <<
902 a system with only one CPU, say N. I <<
903 than one CPU, say Y. <<
904 <<
905 If you say N here, the kernel will r <<
906 machines, but will use only one CPU <<
907 you say Y here, the kernel will run <<
908 uniprocessor machines. On a uniproce <<
909 will run faster if you say N here. <<
910 808
911 See also <file:Documentation/arch/x8 !! 809 menu "APM (Advanced Power Management) BIOS Support"
912 <file:Documentation/admin-guide/lock !! 810 depends on PM
913 <http://tldp.org/HOWTO/SMP-HOWTO.htm !! 811
914 !! 812 config APM
915 If you don't know what to do here, s !! 813 tristate "APM (Advanced Power Management) BIOS support"
>> 814 depends on PM
>> 815 ---help---
>> 816 APM is a BIOS specification for saving power using several different
>> 817 techniques. This is mostly useful for battery powered laptops with
>> 818 APM compliant BIOSes. If you say Y here, the system time will be
>> 819 reset after a RESUME operation, the /proc/apm device will provide
>> 820 battery status information, and user-space programs will receive
>> 821 notification of APM "events" (e.g. battery status change).
>> 822
>> 823 If you select "Y" here, you can disable actual use of the APM
>> 824 BIOS by passing the "apm=off" option to the kernel at boot time.
>> 825
>> 826 Note that the APM support is almost completely disabled for
>> 827 machines with more than one CPU.
>> 828
>> 829 In order to use APM, you will need supporting software. For location
>> 830 and more information, read <file:Documentation/pm.txt> and the
>> 831 Battery Powered Linux mini-HOWTO, available from
>> 832 <http://www.tldp.org/docs.html#howto>.
>> 833
>> 834 This driver does not spin down disk drives (see the hdparm(8)
>> 835 manpage ("man 8 hdparm") for that), and it doesn't turn off
>> 836 VESA-compliant "green" monitors.
>> 837
>> 838 This driver does not support the TI 4000M TravelMate and the ACER
>> 839 486/DX4/75 because they don't have compliant BIOSes. Many "green"
>> 840 desktop machines also don't have compliant BIOSes, and this driver
>> 841 may cause those machines to panic during the boot phase.
>> 842
>> 843 Generally, if you don't have a battery in your machine, there isn't
>> 844 much point in using this driver and you should say N. If you get
>> 845 random kernel OOPSes or reboots that don't seem to be related to
>> 846 anything, try disabling/enabling this option (or disabling/enabling
>> 847 APM in your BIOS).
>> 848
>> 849 Some other things you should try when experiencing seemingly random,
>> 850 "weird" problems:
>> 851
>> 852 1) make sure that you have enough swap space and that it is
>> 853 enabled.
>> 854 2) pass the "no-hlt" option to the kernel
>> 855 3) switch on floating point emulation in the kernel and pass
>> 856 the "no387" option to the kernel
>> 857 4) pass the "floppy=nodma" option to the kernel
>> 858 5) pass the "mem=4M" option to the kernel (thereby disabling
>> 859 all but the first 4 MB of RAM)
>> 860 6) make sure that the CPU is not over clocked.
>> 861 7) read the sig11 FAQ at <http://www.bitwizard.nl/sig11/>
>> 862 8) disable the cache from your BIOS settings
>> 863 9) install a fan for the video card or exchange video RAM
>> 864 10) install a better fan for the CPU
>> 865 11) exchange RAM chips
>> 866 12) exchange the motherboard.
>> 867
>> 868 To compile this driver as a module, choose M here: the
>> 869 module will be called apm.
>> 870
>> 871 config APM_IGNORE_USER_SUSPEND
>> 872 bool "Ignore USER SUSPEND"
>> 873 depends on APM
>> 874 help
>> 875 This option will ignore USER SUSPEND requests. On machines with a
>> 876 compliant APM BIOS, you want to say N. However, on the NEC Versa M
>> 877 series notebooks, it is necessary to say Y because of a BIOS bug.
>> 878
>> 879 config APM_DO_ENABLE
>> 880 bool "Enable PM at boot time"
>> 881 depends on APM
>> 882 ---help---
>> 883 Enable APM features at boot time. From page 36 of the APM BIOS
>> 884 specification: "When disabled, the APM BIOS does not automatically
>> 885 power manage devices, enter the Standby State, enter the Suspend
>> 886 State, or take power saving steps in response to CPU Idle calls."
>> 887 This driver will make CPU Idle calls when Linux is idle (unless this
>> 888 feature is turned off -- see "Do CPU IDLE calls", below). This
>> 889 should always save battery power, but more complicated APM features
>> 890 will be dependent on your BIOS implementation. You may need to turn
>> 891 this option off if your computer hangs at boot time when using APM
>> 892 support, or if it beeps continuously instead of suspending. Turn
>> 893 this off if you have a NEC UltraLite Versa 33/C or a Toshiba
>> 894 T400CDT. This is off by default since most machines do fine without
>> 895 this feature.
>> 896
>> 897 config APM_CPU_IDLE
>> 898 bool "Make CPU Idle calls when idle"
>> 899 depends on APM
>> 900 help
>> 901 Enable calls to APM CPU Idle/CPU Busy inside the kernel's idle loop.
>> 902 On some machines, this can activate improved power savings, such as
>> 903 a slowed CPU clock rate, when the machine is idle. These idle calls
>> 904 are made after the idle loop has run for some length of time (e.g.,
>> 905 333 mS). On some machines, this will cause a hang at boot time or
>> 906 whenever the CPU becomes idle. (On machines with more than one CPU,
>> 907 this option does nothing.)
>> 908
>> 909 config APM_DISPLAY_BLANK
>> 910 bool "Enable console blanking using APM"
>> 911 depends on APM
>> 912 help
>> 913 Enable console blanking using the APM. Some laptops can use this to
>> 914 turn off the LCD backlight when the screen blanker of the Linux
>> 915 virtual console blanks the screen. Note that this is only used by
>> 916 the virtual console screen blanker, and won't turn off the backlight
>> 917 when using the X Window system. This also doesn't have anything to
>> 918 do with your VESA-compliant power-saving monitor. Further, this
>> 919 option doesn't work for all laptops -- it might not turn off your
>> 920 backlight at all, or it might print a lot of errors to the console,
>> 921 especially if you are using gpm.
>> 922
>> 923 config APM_RTC_IS_GMT
>> 924 bool "RTC stores time in GMT"
>> 925 depends on APM
>> 926 help
>> 927 Say Y here if your RTC (Real Time Clock a.k.a. hardware clock)
>> 928 stores the time in GMT (Greenwich Mean Time). Say N if your RTC
>> 929 stores localtime.
>> 930
>> 931 It is in fact recommended to store GMT in your RTC, because then you
>> 932 don't have to worry about daylight savings time changes. The only
>> 933 reason not to use GMT in your RTC is if you also run a broken OS
>> 934 that doesn't understand GMT.
>> 935
>> 936 config APM_ALLOW_INTS
>> 937 bool "Allow interrupts during APM BIOS calls"
>> 938 depends on APM
>> 939 help
>> 940 Normally we disable external interrupts while we are making calls to
>> 941 the APM BIOS as a measure to lessen the effects of a badly behaving
>> 942 BIOS implementation. The BIOS should reenable interrupts if it
>> 943 needs to. Unfortunately, some BIOSes do not -- especially those in
>> 944 many of the newer IBM Thinkpads. If you experience hangs when you
>> 945 suspend, try setting this to Y. Otherwise, say N.
>> 946
>> 947 config APM_REAL_MODE_POWER_OFF
>> 948 bool "Use real mode APM BIOS call to power off"
>> 949 depends on APM
>> 950 help
>> 951 Use real mode APM BIOS calls to switch off the computer. This is
>> 952 a work-around for a number of buggy BIOSes. Switch this option on if
>> 953 your computer crashes instead of powering off properly.
916 954
917 config SMP_ON_UP !! 955 endmenu
918 bool "Allow booting SMP kernel on unip <<
919 depends on SMP && MMU <<
920 default y <<
921 help <<
922 SMP kernels contain instructions whi <<
923 Enabling this option allows the kern <<
924 these instructions safe. Disabling <<
925 savings. <<
926 956
927 If you don't know what to do here, s !! 957 source "arch/i386/kernel/cpu/cpufreq/Kconfig"
928 958
>> 959 endmenu
929 960
930 config CURRENT_POINTER_IN_TPIDRURO <<
931 def_bool y <<
932 depends on CPU_32v6K && !CPU_V6 <<
933 961
934 config IRQSTACKS !! 962 menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
935 def_bool y <<
936 select HAVE_IRQ_EXIT_ON_IRQ_STACK <<
937 select HAVE_SOFTIRQ_ON_OWN_STACK <<
938 963
939 config ARM_CPU_TOPOLOGY !! 964 config X86_VISWS_APIC
940 bool "Support cpu topology definition" !! 965 bool
941 depends on SMP && CPU_V7 !! 966 depends on X86_VISWS
942 default y 967 default y
943 help <<
944 Support ARM cpu topology definition. <<
945 affinity between processors which is <<
946 topology of an ARM System. <<
947 <<
948 config SCHED_MC <<
949 bool "Multi-core scheduler support" <<
950 depends on ARM_CPU_TOPOLOGY <<
951 help <<
952 Multi-core scheduler support improve <<
953 making when dealing with multi-core <<
954 increased overhead in some places. I <<
955 968
956 config SCHED_SMT !! 969 config X86_LOCAL_APIC
957 bool "SMT scheduler support" <<
958 depends on ARM_CPU_TOPOLOGY <<
959 help <<
960 Improves the CPU scheduler's decisio <<
961 MultiThreading at a cost of slightly <<
962 places. If unsure say N here. <<
963 <<
964 config HAVE_ARM_SCU <<
965 bool 970 bool
966 help !! 971 depends on (X86_VISWS || SMP) && !X86_VOYAGER
967 This option enables support for the !! 972 default y
968 <<
969 config HAVE_ARM_ARCH_TIMER <<
970 bool "Architected timer support" <<
971 depends on CPU_V7 <<
972 select ARM_ARCH_TIMER <<
973 help <<
974 This option enables support for the <<
975 973
976 config HAVE_ARM_TWD !! 974 config X86_IO_APIC
977 bool 975 bool
978 help !! 976 depends on SMP && !(X86_VISWS || X86_VOYAGER)
979 This options enables support for the !! 977 default y
980 <<
981 config MCPM <<
982 bool "Multi-Cluster Power Management" <<
983 depends on CPU_V7 && SMP <<
984 help <<
985 This option provides the common powe <<
986 for (multi-)cluster based systems, s <<
987 systems. <<
988 978
989 config MCPM_QUAD_CLUSTER !! 979 config PCI
990 bool !! 980 bool "PCI support" if !X86_VISWS
991 depends on MCPM !! 981 depends on !X86_VOYAGER
992 help !! 982 default y if X86_VISWS
993 To avoid wasting resources unnecessa !! 983 help
994 to 2 clusters by default. !! 984 Find out whether you have a PCI motherboard. PCI is the name of a
995 Platforms with 3 or 4 clusters that !! 985 bus system, i.e. the way the CPU talks to the other stuff inside
996 option to allow the additional clust !! 986 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
997 !! 987 VESA. If you have PCI, say Y, otherwise N.
998 config BIG_LITTLE !! 988
999 bool "big.LITTLE support (Experimental !! 989 The PCI-HOWTO, available from
1000 depends on CPU_V7 && SMP !! 990 <http://www.tldp.org/docs.html#howto>, contains valuable
1001 select MCPM !! 991 information about which PCI hardware does work under Linux and which
1002 help !! 992 doesn't.
1003 This option enables support selecti <<
1004 system architecture. <<
1005 <<
1006 config BL_SWITCHER <<
1007 bool "big.LITTLE switcher support" <<
1008 depends on BIG_LITTLE && MCPM && HOTP <<
1009 select CPU_PM <<
1010 help <<
1011 The big.LITTLE "switcher" provides <<
1012 transparently handle transition bet <<
1013 and a cluster of A7's in a big.LITT <<
1014 <<
1015 config BL_SWITCHER_DUMMY_IF <<
1016 tristate "Simple big.LITTLE switcher <<
1017 depends on BL_SWITCHER && DEBUG_KERNE <<
1018 help <<
1019 This is a simple and dummy char dev <<
1020 the big.LITTLE switcher core code. <<
1021 debugging purposes only. <<
1022 993
1023 choice 994 choice
1024 prompt "Memory split" !! 995 prompt "PCI access mode"
1025 depends on MMU !! 996 depends on PCI && !X86_VISWS
1026 default VMSPLIT_3G !! 997 default PCI_GOANY
1027 help !! 998
1028 Select the desired split between ke !! 999 config PCI_GOBIOS
1029 !! 1000 bool "BIOS"
1030 If you are not absolutely sure what !! 1001 ---help---
1031 option alone! !! 1002 On PCI systems, the BIOS can be used to detect the PCI devices and
1032 !! 1003 determine their configuration. However, some old PCI motherboards
1033 config VMSPLIT_3G !! 1004 have BIOS bugs and may crash if this is done. Also, some embedded
1034 bool "3G/1G user/kernel split !! 1005 PCI-based systems don't have any BIOS at all. Linux can also try to
1035 config VMSPLIT_3G_OPT !! 1006 detect the PCI hardware directly without using the BIOS.
1036 depends on !ARM_LPAE !! 1007
1037 bool "3G/1G user/kernel split !! 1008 With this option, you can specify how Linux should detect the PCI
1038 config VMSPLIT_2G !! 1009 devices. If you choose "BIOS", the BIOS will be used, if you choose
1039 bool "2G/2G user/kernel split !! 1010 "Direct", the BIOS won't be used, and if you choose "Any", the
1040 config VMSPLIT_1G !! 1011 kernel will try the direct access method and falls back to the BIOS
1041 bool "1G/3G user/kernel split !! 1012 if that doesn't work. If unsure, go with the default, which is
1042 endchoice !! 1013 "Any".
1043 1014
1044 config PAGE_OFFSET !! 1015 config PCI_GODIRECT
1045 hex !! 1016 bool "Direct"
1046 default PHYS_OFFSET if !MMU <<
1047 default 0x40000000 if VMSPLIT_1G <<
1048 default 0x80000000 if VMSPLIT_2G <<
1049 default 0xB0000000 if VMSPLIT_3G_OPT <<
1050 default 0xC0000000 <<
1051 <<
1052 config KASAN_SHADOW_OFFSET <<
1053 hex <<
1054 depends on KASAN <<
1055 default 0x1f000000 if PAGE_OFFSET=0x4 <<
1056 default 0x5f000000 if PAGE_OFFSET=0x8 <<
1057 default 0x9f000000 if PAGE_OFFSET=0xC <<
1058 default 0x8f000000 if PAGE_OFFSET=0xB <<
1059 default 0xffffffff <<
1060 1017
1061 config NR_CPUS !! 1018 config PCI_GOANY
1062 int "Maximum number of CPUs (2-32)" !! 1019 bool "Any"
1063 range 2 16 if DEBUG_KMAP_LOCAL <<
1064 range 2 32 if !DEBUG_KMAP_LOCAL <<
1065 depends on SMP <<
1066 default "4" <<
1067 help <<
1068 The maximum number of CPUs that the <<
1069 Up to 32 CPUs can be supported, or <<
1070 debugging is enabled, which uses ha <<
1071 slots as guard regions. <<
1072 1020
1073 config HOTPLUG_CPU !! 1021 endchoice
1074 bool "Support for hot-pluggable CPUs" <<
1075 depends on SMP <<
1076 select GENERIC_IRQ_MIGRATION <<
1077 help <<
1078 Say Y here to experiment with turni <<
1079 can be controlled through /sys/devi <<
1080 <<
1081 config ARM_PSCI <<
1082 bool "Support for the ARM Power State <<
1083 depends on HAVE_ARM_SMCCC <<
1084 select ARM_PSCI_FW <<
1085 help <<
1086 Say Y here if you want Linux to com <<
1087 implementing the PSCI specification <<
1088 management operations described in <<
1089 0022A ("Power State Coordination In <<
1090 ARM processors"). <<
1091 1022
1092 config HZ_FIXED !! 1023 config PCI_BIOS
1093 int !! 1024 bool
1094 default 128 if SOC_AT91RM9200 !! 1025 depends on !X86_VISWS && PCI && (PCI_GOBIOS || PCI_GOANY)
1095 default 0 !! 1026 default y
1096 1027
1097 choice !! 1028 config PCI_DIRECT
1098 depends on HZ_FIXED = 0 !! 1029 bool
1099 prompt "Timer frequency" !! 1030 depends on PCI && ((PCI_GODIRECT || PCI_GOANY) || X86_VISWS)
>> 1031 default y
1100 1032
1101 config HZ_100 !! 1033 source "drivers/pci/Kconfig"
1102 bool "100 Hz" <<
1103 1034
1104 config HZ_200 !! 1035 config ISA
1105 bool "200 Hz" !! 1036 bool "ISA support"
>> 1037 depends on !(X86_VOYAGER || X86_VISWS)
>> 1038 help
>> 1039 Find out whether you have ISA slots on your motherboard. ISA is the
>> 1040 name of a bus system, i.e. the way the CPU talks to the other stuff
>> 1041 inside your box. Other bus systems are PCI, EISA, MicroChannel
>> 1042 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
>> 1043 newer boards don't support it. If you have ISA, say Y, otherwise N.
1106 1044
1107 config HZ_250 !! 1045 config EISA
1108 bool "250 Hz" !! 1046 bool "EISA support"
>> 1047 depends on ISA
>> 1048 ---help---
>> 1049 The Extended Industry Standard Architecture (EISA) bus was
>> 1050 developed as an open alternative to the IBM MicroChannel bus.
1109 1051
1110 config HZ_300 !! 1052 The EISA bus provided some of the features of the IBM MicroChannel
1111 bool "300 Hz" !! 1053 bus while maintaining backward compatibility with cards made for
>> 1054 the older ISA bus. The EISA bus saw limited use between 1988 and
>> 1055 1995 when it was made obsolete by the PCI bus.
1112 1056
1113 config HZ_500 !! 1057 Say Y here if you are building a kernel for an EISA-based machine.
1114 bool "500 Hz" <<
1115 1058
1116 config HZ_1000 !! 1059 Otherwise, say N.
1117 bool "1000 Hz" <<
1118 1060
1119 endchoice !! 1061 source "drivers/eisa/Kconfig"
1120 1062
1121 config HZ !! 1063 config MCA
1122 int !! 1064 bool "MCA support"
1123 default HZ_FIXED if HZ_FIXED != 0 !! 1065 depends on !(X86_VISWS || X86_VOYAGER)
1124 default 100 if HZ_100 !! 1066 help
1125 default 200 if HZ_200 !! 1067 MicroChannel Architecture is found in some IBM PS/2 machines and
1126 default 250 if HZ_250 !! 1068 laptops. It is a bus system similar to PCI or ISA. See
1127 default 300 if HZ_300 !! 1069 <file:Documentation/mca.txt> (and especially the web page given
1128 default 500 if HZ_500 !! 1070 there) before attempting to build an MCA bus kernel.
1129 default 1000 <<
1130 <<
1131 config SCHED_HRTICK <<
1132 def_bool HIGH_RES_TIMERS <<
1133 <<
1134 config THUMB2_KERNEL <<
1135 bool "Compile the kernel in Thumb-2 m <<
1136 depends on (CPU_V7 || CPU_V7M) && !CP <<
1137 default y if CPU_THUMBONLY <<
1138 select ARM_UNWIND <<
1139 help <<
1140 By enabling this option, the kernel <<
1141 Thumb-2 mode. <<
1142 <<
1143 If unsure, say N. <<
1144 <<
1145 config ARM_PATCH_IDIV <<
1146 bool "Runtime patch udiv/sdiv instruc <<
1147 depends on CPU_32v7 <<
1148 default y <<
1149 help <<
1150 The ARM compiler inserts calls to _ <<
1151 __aeabi_uidiv() when it needs to pe <<
1152 and unsigned integers. Some v7 CPUs <<
1153 and udiv instructions that can be u <<
1154 functions. <<
1155 <<
1156 Enabling this option allows the ker <<
1157 replace the first two instructions <<
1158 with the sdiv or udiv plus "bx lr" <<
1159 it is running on supports them. Typ <<
1160 and less power intensive than runni <<
1161 code to do integer division. <<
1162 <<
1163 config AEABI <<
1164 bool "Use the ARM EABI to compile the <<
1165 !CPU_V7M && !CPU_V6 && !CPU_V <<
1166 default CPU_V7 || CPU_V7M || CPU_V6 | <<
1167 help <<
1168 This option allows for the kernel t <<
1169 ARM ABI (aka EABI). This is only u <<
1170 space environment that is also comp <<
1171 <<
1172 Since there are major incompatibili <<
1173 EABI, especially with regard to str <<
1174 option also changes the kernel sysc <<
1175 disambiguate both ABIs and allow fo <<
1176 (selected with CONFIG_OABI_COMPAT). <<
1177 <<
1178 To use this you need GCC version 4. <<
1179 <<
1180 config OABI_COMPAT <<
1181 bool "Allow old ABI binaries to run w <<
1182 depends on AEABI && !THUMB2_KERNEL <<
1183 help <<
1184 This option preserves the old sysca <<
1185 new (ARM EABI) one. It also provide <<
1186 intercept syscalls that have struct <<
1187 in memory differs between the legac <<
1188 (only for non "thumb" binaries). Th <<
1189 overhead to all syscalls and produc <<
1190 <<
1191 The seccomp filter system will not <<
1192 selected, since there is no way yet <<
1193 between calling conventions during <<
1194 <<
1195 If you know you'll be using only pu <<
1196 can say N here. If this option is n <<
1197 to execute a legacy ABI binary then <<
1198 UNPREDICTABLE (in fact it can be pr <<
1199 at all). If in doubt say N. <<
1200 <<
1201 config ARCH_SELECT_MEMORY_MODEL <<
1202 def_bool y <<
1203 <<
1204 config ARCH_FLATMEM_ENABLE <<
1205 def_bool !(ARCH_RPC || ARCH_SA1100) <<
1206 <<
1207 config ARCH_SPARSEMEM_ENABLE <<
1208 def_bool !ARCH_FOOTBRIDGE <<
1209 select SPARSEMEM_STATIC if SPARSEMEM <<
1210 1071
1211 config HIGHMEM !! 1072 config MCA
1212 bool "High Memory Support" !! 1073 depends on X86_VOYAGER
1213 depends on MMU !! 1074 default y if X86_VOYAGER
1214 select KMAP_LOCAL <<
1215 select KMAP_LOCAL_NON_LINEAR_PTE_ARRA <<
1216 help <<
1217 The address space of ARM processors <<
1218 and it has to accommodate user addr <<
1219 space as well as some memory mapped <<
1220 have a large amount of physical mem <<
1221 memory can be "permanently mapped" <<
1222 memory that is not permanently mapp <<
1223 <<
1224 Depending on the selected kernel/us <<
1225 vmalloc space and actual amount of <<
1226 option which should result in a sli <<
1227 1075
1228 If unsure, say n. !! 1076 source "drivers/mca/Kconfig"
1229 1077
1230 config HIGHPTE !! 1078 config SCx200
1231 bool "Allocate 2nd-level pagetables f !! 1079 tristate "NatSemi SCx200 support"
1232 depends on HIGHMEM !! 1080 depends on !X86_VOYAGER
1233 default y <<
1234 help 1081 help
1235 The VM uses one page of physical me !! 1082 This provides basic support for the National Semiconductor SCx200
1236 For systems with a lot of processes !! 1083 processor. Right now this is just a driver for the GPIO pins.
1237 precious low memory, eventually lea <<
1238 consumed by page tables. Setting t <<
1239 user-space 2nd level page tables to <<
1240 <<
1241 config ARM_PAN <<
1242 bool "Enable privileged no-access" <<
1243 depends on MMU <<
1244 default y <<
1245 help <<
1246 Increase kernel security by ensurin <<
1247 are unable to access userspace addr <<
1248 use-after-free bugs becoming an exp <<
1249 by ensuring that magic values (such <<
1250 fault when dereferenced. <<
1251 <<
1252 The implementation uses CPU domains <<
1253 disabling of TTBR0 page table walks <<
1254 <<
1255 config CPU_SW_DOMAIN_PAN <<
1256 def_bool y <<
1257 depends on ARM_PAN && !ARM_LPAE <<
1258 help <<
1259 Enable use of CPU domains to implem <<
1260 <<
1261 CPUs with low-vector mappings use a <<
1262 Their lower 1MB needs to remain acc <<
1263 the remainder of userspace will bec <<
1264 <<
1265 config CPU_TTBR0_PAN <<
1266 def_bool y <<
1267 depends on ARM_PAN && ARM_LPAE <<
1268 help <<
1269 Enable privileged no-access by disa <<
1270 running in kernel mode. <<
1271 <<
1272 config HW_PERF_EVENTS <<
1273 def_bool y <<
1274 depends on ARM_PMU <<
1275 <<
1276 config ARM_MODULE_PLTS <<
1277 bool "Use PLTs to allow module memory <<
1278 depends on MODULES <<
1279 select KASAN_VMALLOC if KASAN <<
1280 default y <<
1281 help <<
1282 Allocate PLTs when loading modules <<
1283 targets are too far away for their <<
1284 in the instructions themselves can <<
1285 module's PLT. This allows modules t <<
1286 vmalloc area after the dedicated mo <<
1287 exhausted. The modules will use sli <<
1288 rounding up to page size, the actua <<
1289 the same. <<
1290 <<
1291 Disabling this is usually safe for <<
1292 configurations. If unsure, say y. <<
1293 <<
1294 config ARCH_FORCE_MAX_ORDER <<
1295 int "Order of maximal physically cont <<
1296 default "11" if SOC_AM33XX <<
1297 default "8" if SA1111 <<
1298 default "10" <<
1299 help <<
1300 The kernel page allocator limits th <<
1301 contiguous allocations. The limit i <<
1302 defines the maximal power of two of <<
1303 allocated as a single contiguous bl <<
1304 overriding the default setting when <<
1305 large blocks of physically contiguo <<
1306 <<
1307 Don't change if unsure. <<
1308 <<
1309 config ALIGNMENT_TRAP <<
1310 def_bool CPU_CP15_MMU <<
1311 select HAVE_PROC_CPU if PROC_FS <<
1312 help <<
1313 ARM processors cannot fetch/store i <<
1314 naturally aligned on the bus, i.e., <<
1315 address divisible by 4. On 32-bit A <<
1316 fetch/store instructions will be em <<
1317 here, which has a severe performanc <<
1318 correct operation of some network p <<
1319 configuration it is safe to say N, <<
1320 <<
1321 config UACCESS_WITH_MEMCPY <<
1322 bool "Use kernel mem{cpy,set}() for { <<
1323 depends on MMU <<
1324 default y if CPU_FEROCEON <<
1325 help <<
1326 Implement faster copy_to_user and c <<
1327 cores where a 8-word STM instructio <<
1328 memory write throughput than a sequ <<
1329 <<
1330 A possible side effect is a slight <<
1331 between threads sharing the same ad <<
1332 such copy operations with large buf <<
1333 <<
1334 However, if the CPU data cache is u <<
1335 this option is unlikely to provide <<
1336 <<
1337 config PARAVIRT <<
1338 bool "Enable paravirtualization code" <<
1339 help <<
1340 This changes the kernel so it can m <<
1341 under a hypervisor, potentially imp <<
1342 over full virtualization. <<
1343 <<
1344 config PARAVIRT_TIME_ACCOUNTING <<
1345 bool "Paravirtual steal time accounti <<
1346 select PARAVIRT <<
1347 help <<
1348 Select this option to enable fine g <<
1349 accounting. Time spent executing ot <<
1350 the current vCPU is discounted from <<
1351 that, there can be a small performa <<
1352 <<
1353 If in doubt, say N here. <<
1354 <<
1355 config XEN_DOM0 <<
1356 def_bool y <<
1357 depends on XEN <<
1358 <<
1359 config XEN <<
1360 bool "Xen guest support on ARM" <<
1361 depends on ARM && AEABI && OF <<
1362 depends on CPU_V7 && !CPU_V6 <<
1363 depends on !GENERIC_ATOMIC64 <<
1364 depends on MMU <<
1365 select ARCH_DMA_ADDR_T_64BIT <<
1366 select ARM_PSCI <<
1367 select SWIOTLB <<
1368 select SWIOTLB_XEN <<
1369 select PARAVIRT <<
1370 help <<
1371 Say Y if you want to run Linux in a <<
1372 <<
1373 config CC_HAVE_STACKPROTECTOR_TLS <<
1374 def_bool $(cc-option,-mtp=cp15 -mstac <<
1375 <<
1376 config STACKPROTECTOR_PER_TASK <<
1377 bool "Use a unique stack canary value <<
1378 depends on STACKPROTECTOR && CURRENT_ <<
1379 depends on GCC_PLUGINS || CC_HAVE_STA <<
1380 select GCC_PLUGIN_ARM_SSP_PER_TASK if <<
1381 default y <<
1382 help <<
1383 Due to the fact that GCC uses an or <<
1384 which to load the value of the stac <<
1385 change at reboot time on SMP system <<
1386 kernel's address space are forced t <<
1387 the entire duration that the system <<
1388 1084
1389 Enable this option to switch to a d !! 1085 If you don't know what to do here, say N.
1390 different canary value for each tas <<
1391 1086
1392 endmenu !! 1087 This support is also available as a module. If compiled as a
>> 1088 module, it will be called scx200.
1393 1089
1394 menu "Boot options" !! 1090 config HOTPLUG
>> 1091 bool "Support for hot-pluggable devices"
>> 1092 ---help---
>> 1093 Say Y here if you want to plug devices into your computer while
>> 1094 the system is running, and be able to use them quickly. In many
>> 1095 cases, the devices can likewise be unplugged at any time too.
>> 1096
>> 1097 One well known example of this is PCMCIA- or PC-cards, credit-card
>> 1098 size devices such as network cards, modems or hard drives which are
>> 1099 plugged into slots found on all modern laptop computers. Another
>> 1100 example, used on modern desktops as well as laptops, is USB.
>> 1101
>> 1102 Enable HOTPLUG and KMOD, and build a modular kernel. Get agent
>> 1103 software (at <http://linux-hotplug.sourceforge.net/>) and install it.
>> 1104 Then your kernel will automatically call out to a user mode "policy
>> 1105 agent" (/sbin/hotplug) to load modules and set up software needed
>> 1106 to use devices as you hotplug them.
1395 1107
1396 config USE_OF !! 1108 source "drivers/pcmcia/Kconfig"
1397 bool "Flattened Device Tree support" <<
1398 select IRQ_DOMAIN <<
1399 select OF <<
1400 help <<
1401 Include support for flattened devic <<
1402 <<
1403 config ARCH_WANT_FLAT_DTB_INSTALL <<
1404 def_bool y <<
1405 <<
1406 config ATAGS <<
1407 bool "Support for the traditional ATA <<
1408 default y <<
1409 help <<
1410 This is the traditional way of pass <<
1411 time. If you are solely relying on <<
1412 the ARM_ATAG_DTB_COMPAT option) the <<
1413 to remove ATAGS support from your k <<
1414 <<
1415 config DEPRECATED_PARAM_STRUCT <<
1416 bool "Provide old way to pass kernel <<
1417 depends on ATAGS <<
1418 help <<
1419 This was deprecated in 2001 and ann <<
1420 Some old boot loaders still use thi <<
1421 <<
1422 # Compressed boot loader in ROM. Yes, we rea <<
1423 # TEXT and BSS so we preserve their values in <<
1424 config ZBOOT_ROM_TEXT <<
1425 hex "Compressed ROM boot loader base <<
1426 default 0x0 <<
1427 help <<
1428 The physical address at which the R <<
1429 placed in the target. Platforms wh <<
1430 ROM-able zImage formats normally se <<
1431 value in their defconfig file. <<
1432 <<
1433 If ZBOOT_ROM is not enabled, this h <<
1434 <<
1435 config ZBOOT_ROM_BSS <<
1436 hex "Compressed ROM boot loader BSS a <<
1437 default 0x0 <<
1438 help <<
1439 The base address of an area of read <<
1440 for the ROM-able zImage which must <<
1441 decompressor is running. It must be <<
1442 entire decompressed kernel plus an <<
1443 Platforms which normally make use o <<
1444 normally set this to a suitable val <<
1445 <<
1446 If ZBOOT_ROM is not enabled, this h <<
1447 <<
1448 config ZBOOT_ROM <<
1449 bool "Compressed boot loader in ROM/f <<
1450 depends on ZBOOT_ROM_TEXT != ZBOOT_RO <<
1451 depends on !ARM_APPENDED_DTB && !XIP_ <<
1452 help <<
1453 Say Y here if you intend to execute <<
1454 (zImage) directly from ROM or flash <<
1455 <<
1456 config ARM_APPENDED_DTB <<
1457 bool "Use appended device tree blob t <<
1458 depends on OF <<
1459 help <<
1460 With this option, the boot code wil <<
1461 (DTB) appended to zImage <<
1462 (e.g. cat zImage <filename>.dtb > z <<
1463 <<
1464 This is meant as a backward compati <<
1465 systems with a bootloader that can' <<
1466 the documented boot protocol using <<
1467 <<
1468 Beware that there is very little in <<
1469 this option being confused by lefto <<
1470 look like a DTB header after a rebo <<
1471 to zImage. Do not leave this optio <<
1472 if you don't intend to always appen <<
1473 location into r2 of a bootloader pr <<
1474 to this option. <<
1475 <<
1476 config ARM_ATAG_DTB_COMPAT <<
1477 bool "Supplement the appended DTB wit <<
1478 depends on ARM_APPENDED_DTB <<
1479 help <<
1480 Some old bootloaders can't be updat <<
1481 they provide ATAGs with memory conf <<
1482 the kernel cmdline string, etc. Su <<
1483 provided by the bootloader and can' <<
1484 DTB. To allow a device tree enable <<
1485 bootloaders, this option allows zIm <<
1486 from the ATAG list and store it at <<
1487 1109
1488 choice !! 1110 source "drivers/pci/hotplug/Kconfig"
1489 prompt "Kernel command line type" <<
1490 depends on ARM_ATAG_DTB_COMPAT <<
1491 default ARM_ATAG_DTB_COMPAT_CMDLINE_F <<
1492 <<
1493 config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTL <<
1494 bool "Use bootloader kernel arguments <<
1495 help <<
1496 Uses the command-line options passe <<
1497 the device tree bootargs property. <<
1498 any, the device tree bootargs prope <<
1499 1111
1500 config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND !! 1112 endmenu
1501 bool "Extend with bootloader kernel a <<
1502 help <<
1503 The command-line arguments provided <<
1504 appended to the the device tree boo <<
1505 1113
1506 endchoice <<
1507 1114
1508 config CMDLINE !! 1115 menu "Executable file formats"
1509 string "Default kernel command string <<
1510 default "" <<
1511 help <<
1512 On some architectures (e.g. CATS), <<
1513 for the boot loader to pass argumen <<
1514 architectures, you should supply so <<
1515 time by entering them here. As a mi <<
1516 memory size and the root device (e. <<
1517 1116
1518 choice !! 1117 source "fs/Kconfig.binfmt"
1519 prompt "Kernel command line type" <<
1520 depends on CMDLINE != "" <<
1521 default CMDLINE_FROM_BOOTLOADER <<
1522 <<
1523 config CMDLINE_FROM_BOOTLOADER <<
1524 bool "Use bootloader kernel arguments <<
1525 help <<
1526 Uses the command-line options passe <<
1527 the boot loader doesn't provide any <<
1528 string provided in CMDLINE will be <<
1529 <<
1530 config CMDLINE_EXTEND <<
1531 bool "Extend bootloader kernel argume <<
1532 help <<
1533 The command-line arguments provided <<
1534 appended to the default kernel comm <<
1535 <<
1536 config CMDLINE_FORCE <<
1537 bool "Always use the default kernel c <<
1538 help <<
1539 Always use the default kernel comma <<
1540 loader passes other arguments to th <<
1541 This is useful if you cannot or don <<
1542 command-line options your boot load <<
1543 endchoice <<
1544 <<
1545 config XIP_KERNEL <<
1546 bool "Kernel Execute-In-Place from RO <<
1547 depends on !ARM_LPAE && !ARCH_MULTIPL <<
1548 depends on !ARM_PATCH_IDIV && !ARM_PA <<
1549 help <<
1550 Execute-In-Place allows the kernel <<
1551 directly addressable by the CPU, su <<
1552 space since the text section of the <<
1553 to RAM. Read-write sections, such <<
1554 are still copied to RAM. The XIP k <<
1555 it has to run directly from flash, <<
1556 store it. The flash address used t <<
1557 and for storing it, is configuratio <<
1558 say Y here, you must know the prope <<
1559 store the kernel image depending on <<
1560 <<
1561 Also note that the make target beco <<
1562 "make zImage" or "make Image". The <<
1563 ROM memory will be arch/arm/boot/xi <<
1564 <<
1565 If unsure, say N. <<
1566 <<
1567 config XIP_PHYS_ADDR <<
1568 hex "XIP Kernel Physical Location" <<
1569 depends on XIP_KERNEL <<
1570 default "0x00080000" <<
1571 help <<
1572 This is the physical address in you <<
1573 be linked for and stored to. This <<
1574 own flash usage. <<
1575 <<
1576 config XIP_DEFLATED_DATA <<
1577 bool "Store kernel .data section comp <<
1578 depends on XIP_KERNEL <<
1579 select ZLIB_INFLATE <<
1580 help <<
1581 Before the kernel is actually execu <<
1582 copied to RAM from ROM. This option <<
1583 in compressed form and decompressed <<
1584 copied, saving some precious ROM sp <<
1585 slightly longer boot delay. <<
1586 <<
1587 config ARCH_SUPPORTS_KEXEC <<
1588 def_bool (!SMP || PM_SLEEP_SMP) && MM <<
1589 <<
1590 config ATAGS_PROC <<
1591 bool "Export atags in procfs" <<
1592 depends on ATAGS && KEXEC <<
1593 default y <<
1594 help <<
1595 Should the atags used to boot the k <<
1596 file in procfs. Useful with kexec. <<
1597 <<
1598 config ARCH_SUPPORTS_CRASH_DUMP <<
1599 def_bool y <<
1600 <<
1601 config AUTO_ZRELADDR <<
1602 bool "Auto calculation of the decompr <<
1603 default !(ARCH_FOOTBRIDGE || ARCH_RPC <<
1604 help <<
1605 ZRELADDR is the physical address wh <<
1606 image will be placed. If AUTO_ZRELA <<
1607 will be determined at run-time, eit <<
1608 with 0xf8000000, or, if invalid, fr <<
1609 This assumes the zImage being place <<
1610 start of memory. <<
1611 <<
1612 config EFI_STUB <<
1613 bool <<
1614 <<
1615 config EFI <<
1616 bool "UEFI runtime support" <<
1617 depends on OF && !CPU_BIG_ENDIAN && M <<
1618 select UCS2_STRING <<
1619 select EFI_PARAMS_FROM_FDT <<
1620 select EFI_STUB <<
1621 select EFI_GENERIC_STUB <<
1622 select EFI_RUNTIME_WRAPPERS <<
1623 help <<
1624 This option provides support for ru <<
1625 by UEFI firmware (such as non-volat <<
1626 clock, and platform reset). A UEFI <<
1627 allow the kernel to be booted as an <<
1628 is only useful for kernels that may <<
1629 UEFI firmware. <<
1630 <<
1631 config DMI <<
1632 bool "Enable support for SMBIOS (DMI) <<
1633 depends on EFI <<
1634 default y <<
1635 help <<
1636 This enables SMBIOS/DMI feature for <<
1637 <<
1638 This option is only useful on syste <<
1639 However, even with this option, the <<
1640 continue to boot on existing non-UE <<
1641 <<
1642 NOTE: This does *NOT* enable or enc <<
1643 i.e., the the practice of identifyi <<
1644 decide whether certain workarounds <<
1645 firmware need to be enabled. This w <<
1646 to be enabled much earlier than we <<
1647 1118
1648 endmenu 1119 endmenu
1649 1120
1650 menu "CPU Power Management" !! 1121 source "drivers/Kconfig"
1651 <<
1652 source "drivers/cpufreq/Kconfig" <<
1653 1122
1654 source "drivers/cpuidle/Kconfig" !! 1123 source "fs/Kconfig"
1655 1124
1656 endmenu !! 1125 source "arch/i386/oprofile/Kconfig"
1657 1126
1658 menu "Floating point emulation" <<
1659 1127
1660 comment "At least one emulation must be selec !! 1128 menu "Kernel hacking"
1661 1129
1662 config FPE_NWFPE !! 1130 config DEBUG_KERNEL
1663 bool "NWFPE math emulation" !! 1131 bool "Kernel debugging"
1664 depends on (!AEABI || OABI_COMPAT) && <<
1665 help 1132 help
1666 Say Y to include the NWFPE floating !! 1133 Say Y here if you are developing drivers or trying to debug and
1667 This is necessary to run most binar !! 1134 identify kernel problems.
1668 support floating point hardware so <<
1669 your machine has an FPA or floating <<
1670 1135
1671 You may say N here if you are going !! 1136 config DEBUG_STACKOVERFLOW
1672 early in the bootup. !! 1137 bool "Check for stack overflows"
>> 1138 depends on DEBUG_KERNEL
1673 1139
1674 config FPE_NWFPE_XP !! 1140 config DEBUG_SLAB
1675 bool "Support extended precision" !! 1141 bool "Debug memory allocations"
1676 depends on FPE_NWFPE !! 1142 depends on DEBUG_KERNEL
1677 help 1143 help
1678 Say Y to include 80-bit support in !! 1144 Say Y here to have the kernel do limited verification on memory
1679 emulator. Otherwise, only 32 and 6 !! 1145 allocation as well as poisoning memory on free to catch use of freed
1680 Note that gcc does not generate 80- !! 1146 memory.
1681 so in most cases this option only e <<
1682 floating point emulator without any <<
1683 1147
1684 You almost surely want to say N her !! 1148 config DEBUG_IOVIRT
>> 1149 bool "Memory mapped I/O debugging"
>> 1150 depends on DEBUG_KERNEL
>> 1151 help
>> 1152 Say Y here to get warned whenever an attempt is made to do I/O on
>> 1153 obviously invalid addresses such as those generated when ioremap()
>> 1154 calls are forgotten. Memory mapped I/O will go through an extra
>> 1155 check to catch access to unmapped ISA addresses, an access method
>> 1156 that can still be used by old drivers that are being ported from
>> 1157 2.0/2.2.
1685 1158
1686 config FPE_FASTFPE !! 1159 config MAGIC_SYSRQ
1687 bool "FastFPE math emulation (EXPERIM !! 1160 bool "Magic SysRq key"
1688 depends on (!AEABI || OABI_COMPAT) && !! 1161 depends on DEBUG_KERNEL
1689 help 1162 help
1690 Say Y here to include the FAST floa !! 1163 If you say Y here, you will have some control over the system even
1691 This is an experimental much faster !! 1164 if the system crashes for example during kernel debugging (e.g., you
1692 precision for the mantissa. It doe !! 1165 will be able to flush the buffer cache to disk, reboot the system
1693 It is very simple, and approximatel !! 1166 immediately or dump some status information). This is accomplished
>> 1167 by pressing various keys while holding SysRq (Alt+PrintScreen). It
>> 1168 also works on a serial console (on PC hardware at least), if you
>> 1169 send a BREAK and then within 5 seconds a command keypress. The
>> 1170 keys are documented in <file:Documentation/sysrq.txt>. Don't say Y
>> 1171 unless you really know what this hack does.
1694 1172
1695 It should be sufficient for most pr !! 1173 config DEBUG_SPINLOCK
1696 for scientific calculations, but yo !! 1174 bool "Spinlock debugging"
1697 If you do not feel you need a faste !! 1175 depends on DEBUG_KERNEL
1698 choose NWFPE. !! 1176 help
>> 1177 Say Y here and build SMP to catch missing spinlock initialization
>> 1178 and certain other kinds of spinlock errors commonly made. This is
>> 1179 best used in conjunction with the NMI watchdog so that spinlock
>> 1180 deadlocks are also debuggable.
>> 1181
>> 1182 config DEBUG_PAGEALLOC
>> 1183 bool "Page alloc debugging"
>> 1184 depends on DEBUG_KERNEL
>> 1185 help
>> 1186 Unmap pages from the kernel linear mapping after free_pages().
>> 1187 This results in a large slowdown, but helps to find certain types
>> 1188 of memory corruptions.
1699 1189
1700 config VFP !! 1190 config DEBUG_HIGHMEM
1701 bool "VFP-format floating point maths !! 1191 bool "Highmem debugging"
1702 depends on CPU_V6 || CPU_V6K || CPU_A !! 1192 depends on DEBUG_KERNEL && HIGHMEM
1703 help 1193 help
1704 Say Y to include VFP support code i !! 1194 This options enables addition error checking for high memory systems.
1705 if your hardware includes a VFP uni !! 1195 Disable for production systems.
1706 1196
1707 Please see <file:Documentation/arch !! 1197 config DEBUG_INFO
1708 release notes and additional status !! 1198 bool "Compile the kernel with debug info"
>> 1199 depends on DEBUG_KERNEL
>> 1200 help
>> 1201 If you say Y here the resulting kernel image will include
>> 1202 debugging info resulting in a larger kernel image.
>> 1203 Say Y here only if you plan to use gdb to debug the kernel.
>> 1204 If you don't debug the kernel, you can say N.
>> 1205
>> 1206 config DEBUG_SPINLOCK_SLEEP
>> 1207 bool "Sleep-inside-spinlock checking"
>> 1208 help
>> 1209 If you say Y here, various routines which may sleep will become very
>> 1210 noisy if they are called with a spinlock held.
1709 1211
1710 Say N if your target does not have !! 1212 config FRAME_POINTER
>> 1213 bool "Compile the kernel with frame pointers"
>> 1214 help
>> 1215 If you say Y here the resulting kernel image will be slightly larger
>> 1216 and slower, but it will give very useful debugging information.
>> 1217 If you don't debug the kernel, you can say N, but we may not be able
>> 1218 to solve problems without frame pointers.
1711 1219
1712 config VFPv3 !! 1220 config X86_EXTRA_IRQS
1713 bool 1221 bool
1714 depends on VFP !! 1222 depends on X86_LOCAL_APIC || X86_VOYAGER
1715 default y if CPU_V7 !! 1223 default y
1716 1224
1717 config NEON !! 1225 config X86_FIND_SMP_CONFIG
1718 bool "Advanced SIMD (NEON) Extension !! 1226 bool
1719 depends on VFPv3 && CPU_V7 !! 1227 depends on X86_LOCAL_APIC || X86_VOYAGER
1720 help !! 1228 default y
1721 Say Y to include support code for N <<
1722 Extension. <<
1723 1229
1724 config KERNEL_MODE_NEON !! 1230 config X86_MPPARSE
1725 bool "Support for NEON in kernel mode !! 1231 bool
1726 depends on NEON && AEABI !! 1232 depends on X86_LOCAL_APIC && !X86_VISWS
1727 help !! 1233 default y
1728 Say Y to include support for NEON i <<
1729 1234
1730 endmenu 1235 endmenu
1731 1236
1732 menu "Power management options" !! 1237 source "security/Kconfig"
>> 1238
>> 1239 source "crypto/Kconfig"
1733 1240
1734 source "kernel/power/Kconfig" !! 1241 source "lib/Kconfig"
1735 1242
1736 config ARCH_SUSPEND_POSSIBLE !! 1243 config X86_SMP
1737 depends on CPU_ARM920T || CPU_ARM926T !! 1244 bool
1738 CPU_V6 || CPU_V6K || CPU_V7 | !! 1245 depends on SMP && !X86_VOYAGER
1739 def_bool y !! 1246 default y
1740 1247
1741 config ARM_CPU_SUSPEND !! 1248 config X86_HT
1742 def_bool PM_SLEEP || BL_SWITCHER || A !! 1249 bool
1743 depends on ARCH_SUSPEND_POSSIBLE !! 1250 depends on SMP && !(X86_VISWS || X86_VOYAGER)
>> 1251 default y
1744 1252
1745 config ARCH_HIBERNATION_POSSIBLE !! 1253 config X86_BIOS_REBOOT
1746 bool 1254 bool
1747 depends on MMU !! 1255 depends on !(X86_VISWS || X86_VOYAGER)
1748 default y if ARCH_SUSPEND_POSSIBLE !! 1256 default y
1749 1257
1750 endmenu !! 1258 config X86_TRAMPOLINE
>> 1259 bool
>> 1260 depends on SMP || X86_VISWS
>> 1261 default y
1751 1262
1752 source "arch/arm/Kconfig.assembler" !! 1263 config PC
>> 1264 bool
>> 1265 depends on X86 && !EMBEDDED
>> 1266 default y
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