1 /*
2 * Copyright 2013 Maxime Ripard
3 *
4 * Maxime Ripard <maxime.ripard@free-electrons.
5 *
6 * This file is dual-licensed: you can use it
7 * of the GPL or the X11 license, at your opti
8 * licensing only applies to this file, and no
9 * whole.
10 *
11 * a) This library is free software; you can
12 * modify it under the terms of the GNU Ge
13 * published by the Free Software Foundati
14 * License, or (at your option) any later
15 *
16 * This library is distributed in the hope
17 * but WITHOUT ANY WARRANTY; without even
18 * MERCHANTABILITY or FITNESS FOR A PARTIC
19 * GNU General Public License for more det
20 *
21 * Or, alternatively,
22 *
23 * b) Permission is hereby granted, free of c
24 * obtaining a copy of this software and a
25 * files (the "Software"), to deal in the
26 * restriction, including without limitati
27 * copy, modify, merge, publish, distribut
28 * sell copies of the Software, and to per
29 * Software is furnished to do so, subject
30 * conditions:
31 *
32 * The above copyright notice and this per
33 * included in all copies or substantial p
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHO
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT L
37 * OF MERCHANTABILITY, FITNESS FOR A PARTI
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGE
40 * WHETHER IN AN ACTION OF CONTRACT, TORT
41 * FROM, OUT OF OR IN CONNECTION WITH THE
42 * OTHER DEALINGS IN THE SOFTWARE.
43 */
44
45 #include "sun5i.dtsi"
46
47 #include <dt-bindings/dma/sun4i-a10.h>
48
49 / {
50 aliases {
51 ethernet0 = &emac;
52 };
53
54 chosen {
55 #address-cells = <1>;
56 #size-cells = <1>;
57 ranges;
58
59 framebuffer-lcd0-hdmi {
60 compatible = "allwinne
61 "simple-f
62 allwinner,pipeline = "
63 clocks = <&ccu CLK_AHB
64 <&ccu CLK_AHB
65 <&ccu CLK_DE_
66 status = "disabled";
67 };
68 };
69
70 display-engine {
71 compatible = "allwinner,sun5i-
72 allwinner,pipelines = <&fe0>;
73 };
74
75 soc {
76 hdmi: hdmi@1c16000 {
77 compatible = "allwinne
78 reg = <0x01c16000 0x10
79 interrupts = <58>;
80 clocks = <&ccu CLK_AHB
81 <&ccu CLK_PLL
82 <&ccu CLK_PLL
83 clock-names = "ahb", "
84 dmas = <&dma SUN4I_DMA
85 <&dma SUN4I_DMA
86 <&dma SUN4I_DMA
87 dma-names = "ddc-tx",
88 status = "disabled";
89
90 ports {
91 #address-cells
92 #size-cells =
93
94 hdmi_in: port@
95 reg =
96
97 hdmi_i
98
99 };
100 };
101
102 hdmi_out: port
103 reg =
104 };
105 };
106 };
107
108 pwm: pwm@1c20e00 {
109 compatible = "allwinne
110 reg = <0x01c20e00 0xc>
111 clocks = <&ccu CLK_HOS
112 #pwm-cells = <3>;
113 status = "disabled";
114 };
115 };
116 };
117
118 &ccu {
119 compatible = "allwinner,sun5i-a10s-ccu
120 };
121
122 &mmc1 {
123 pinctrl-names = "default";
124 pinctrl-0 = <&mmc1_pins>;
125 };
126
127 &pio {
128 compatible = "allwinner,sun5i-a10s-pin
129
130 uart0_pb_pins: uart0-pb-pins {
131 pins = "PB19", "PB20";
132 function = "uart0";
133 };
134
135 uart2_pc_pins: uart2-pc-pins {
136 pins = "PC18", "PC19";
137 function = "uart2";
138 };
139
140 emac_pa_pins: emac-pa-pins {
141 pins = "PA0", "PA1", "PA2",
142 "PA3", "PA4",
143 "PA7", "PA8",
144 "PA11", "PA12"
145 "PA15", "PA16"
146 function = "emac";
147 };
148
149 mmc1_pins: mmc1-pins {
150 pins = "PG3", "PG4", "PG5",
151 "PG6", "PG7",
152 function = "mmc1";
153 drive-strength = <30>;
154 };
155
156 spi2_pb_pins: spi2-pb-pins {
157 pins = "PB12", "PB13", "PB14";
158 function = "spi2";
159 };
160
161 spi2_cs0_pb_pin: spi2-cs0-pb-pin {
162 pins = "PB11";
163 function = "spi2";
164 };
165 };
166
167 &tcon0_out {
168 tcon0_out_hdmi: endpoint@2 {
169 reg = <2>;
170 remote-endpoint = <&hdmi_in_tc
171 allwinner,tcon-channel = <1>;
172 };
173 };
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