1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
3
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/i2c/i2c.h>
7 #include <dt-bindings/interrupt-controller/irq
8 #include <dt-bindings/leds/common.h>
9
10 /{
11 model = "ASRock SPC621D8HM3 BMC";
12 compatible = "asrock,spc621d8hm3-bmc",
13
14 aliases {
15 serial4 = &uart5;
16
17 i2c20 = &i2c1mux0ch0;
18 i2c21 = &i2c1mux0ch1;
19 };
20
21 chosen {
22 stdout-path = &uart5;
23 };
24
25 memory@80000000 {
26 reg = <0x80000000 0x20000000>;
27 };
28
29 leds {
30 compatible = "gpio-leds";
31
32 /* BMC heartbeat */
33 led-0 {
34 gpios = <&gpio ASPEED_
35 function = LED_FUNCTIO
36 color = <LED_COLOR_ID_
37 linux,default-trigger
38 };
39
40 /* system fault */
41 led-1 {
42 gpios = <&gpio ASPEED_
43 function = LED_FUNCTIO
44 color = <LED_COLOR_ID_
45 panic-indicator;
46 };
47 };
48
49 iio-hwmon {
50 compatible = "iio-hwmon";
51 io-channels = <&adc 0>, <&adc
52 <&adc 4>, <&adc 5>, <&
53 <&adc 8>, <&adc 9>, <&
54 <&adc 12>, <&adc 13>,
55 };
56 };
57
58 &fmc {
59 status = "okay";
60 flash@0 {
61 status = "okay";
62 m25p,fast-read;
63 label = "bmc";
64 spi-max-frequency = <50000000>
65 #include "openbmc-flash-layout-64.dtsi"
66 };
67 };
68
69 &uart5 {
70 status = "okay";
71 };
72
73 &vuart {
74 status = "okay";
75 aspeed,lpc-io-reg = <0x2f8>;
76 aspeed,lpc-interrupts = <3 IRQ_TYPE_LE
77 };
78
79 &mac0 {
80 status = "okay";
81
82 pinctrl-names = "default";
83 pinctrl-0 = <&pinctrl_rgmii1_default &
84
85 nvmem-cells = <ð0_macaddress>;
86 nvmem-cell-names = "mac-address";
87 };
88
89 &i2c0 {
90 status = "okay";
91 };
92
93 &i2c1 {
94 status = "okay";
95
96 /* hardware monitor/thermal sensor */
97 temperature-sensor@29 {
98 compatible = "nuvoton,nct7802"
99 reg = <0x29>;
100 };
101
102 /* motherboard temp sensor (TMP1, near
103 temperature-sensor@4c {
104 compatible = "nuvoton,w83773g"
105 reg = <0x4c>;
106 };
107
108 /* motherboard FRU eeprom */
109 eeprom@50 {
110 compatible = "st,24c128", "atm
111 reg = <0x50>;
112 pagesize = <16>;
113
114 nvmem-layout {
115 compatible = "fixed-la
116 #address-cells = <1>;
117 #size-cells = <1>;
118
119 eth0_macaddress: macad
120 reg = <0x3f80
121 };
122 };
123 };
124
125 /* M.2 slot smbus mux */
126 i2c-mux@71 {
127 compatible = "nxp,pca9545";
128 reg = <0x71>;
129 #address-cells = <1>;
130 #size-cells = <0>;
131
132 i2c1mux0ch0: i2c@0 {
133 #address-cells = <1>;
134 #size-cells = <0>;
135 reg = <0>;
136 };
137
138 i2c1mux0ch1: i2c@1 {
139 #address-cells = <1>;
140 #size-cells = <0>;
141 reg = <1>;
142 };
143 };
144 };
145
146 &i2c2 {
147 status = "okay";
148 };
149
150 &i2c3 {
151 status = "okay";
152 };
153
154 &i2c4 {
155 status = "okay";
156 };
157
158 &i2c5 {
159 status = "okay";
160 };
161
162 &i2c6 {
163 status = "okay";
164 };
165
166 &i2c7 {
167 status = "okay";
168 };
169
170 &i2c8 {
171 status = "okay";
172 };
173
174 &i2c9 {
175 status = "okay";
176 };
177
178 &i2c10 {
179 status = "okay";
180 };
181
182 &i2c11 {
183 status = "okay";
184 };
185
186 &i2c12 {
187 status = "okay";
188 };
189
190 &i2c13 {
191 status = "okay";
192 };
193
194 &video {
195 status = "okay";
196 };
197
198 &vhub {
199 status = "okay";
200 };
201
202 &lpc_ctrl {
203 status = "okay";
204 };
205
206 &lpc_snoop {
207 status = "okay";
208 snoop-ports = <0x80>;
209 };
210
211 &kcs3 {
212 status = "okay";
213 aspeed,lpc-io-reg = <0xca2>;
214 };
215
216 &peci0 {
217 status = "okay";
218 };
219
220 &pwm_tacho {
221 status = "okay";
222 pinctrl-names = "default";
223 pinctrl-0 = <&pinctrl_pwm0_default
224 &pinctrl_pwm2_default
225 &pinctrl_pwm3_default
226 &pinctrl_pwm4_default>;
227
228 fan@0 {
229 reg = <0x00>;
230 aspeed,fan-tach-ch = /bits/ 8
231 };
232
233 fan@2 {
234 reg = <0x02>;
235 aspeed,fan-tach-ch = /bits/ 8
236 };
237
238 fan@3 {
239 reg = <0x03>;
240 aspeed,fan-tach-ch = /bits/ 8
241 };
242
243 fan@4 {
244 reg = <0x04>;
245 aspeed,fan-tach-ch = /bits/ 8
246 };
247 };
248
249 &gpio {
250 status = "okay";
251 gpio-line-names =
252 /* A */ "LOCATORLED_STATUS_N"
253 "BMC_READY_N", "FM_SPD
254 "", "", "", "",
255 /* B */ "NODE_ID_1", "NODE_ID
256 "", "", "", "GPIO_RST"
257 /* C */ "", "", "", "", "", "
258 /* D */ "FP_PWR_BTN_MUX_N", "
259 "FP_RST_BTN_N", "RST_B
260 "NMI_BTN_N", "BMC_NMI"
261 "", "",
262 /* E */ "", "", "", "FM_ME_RC
263 /* F */ "BMC_SMB_SEL_N", "FM_
264 "FM_REMOTE_DEBUG_BMC_E
265 "FM_CPU_ERR1_LVT3_EN",
266 "FM_MEM_THERM_EVENT_CP
267 /* G */ "HWM_BAT_EN", "", "BM
268 "BMC_ALERT1_N", "BMC_A
269 /* H */ "BMC_SMB_PRESENT_1_N"
270 "FM_MFG_MODE", "BMC_RT
271 /* I */ "IRQ_PVDDQ_ABCD_CPU1_
272 "IRQ_PVDDQ_EFGH_CPU1_V
273 "", "", "", "",
274 /* J */ "", "", "", "", "", "
275 /* K */ "", "", "", "", "", "
276 /* L */ "", "", "", "", "", "
277 /* M */ "FM_PVCCIN_CPU1_PWR_I
278 "IRQ_PVCCIN_CPU1_VRHOT
279 "FM_CPU1_PROCHOT_BMC_L
280 "FM_CPU1_MEMHOT_OUT_N"
281 /* N */ "", "", "", "", "", "
282 /* O */ "", "", "", "", "", "
283 /* P */ "", "", "", "", "", "
284 /* Q */ "", "", "", "", "", "
285 /* R */ "", "", "FM_BMC_SUSAC
286 "", "FM_BMC_PCH_SCI_LP
287 /* S */ "FM_DBP_PRESENT_N", "
288 "FM_CPU1_FIVR_FAULT_LV
289 "", "", "", "",
290 /* T */ "", "", "", "", "", "
291 /* U */ "", "", "", "", "", "
292 /* V */ "", "", "", "", "", "
293 /* W */ "", "", "", "", "", "
294 /* X */ "", "", "", "", "", "
295 /* Y */ "FM_SLPS3_N", "FM_SLP
296 "", "", "", "",
297 /* Z */ "FM_CPU_MSMI_CATERR_L
298 "", "", "", "",
299 /* AA */ "FM_CPU1_THERMTRIP_LA
300 "FM_BIOS_POST_COMPLT_N
301 "", "IRQ_SML0_ALERT_MU
302 "IRQ_SMI_ACTIVE_N", "I
303 /* AB */ "FM_PCH_BMC_THERMTRIP
304 "ME_OVERRIDE", "IRQ_BM
305 "", "", "", "",
306 /* AC */ "", "", "", "", "", "
307 };
308
309 &adc {
310 status = "okay";
311 pinctrl-names = "default";
312 pinctrl-0 = <&pinctrl_adc0_default /*
313 &pinctrl_adc1_default /*
314 &pinctrl_adc2_default /*
315 &pinctrl_adc3_default /*
316 &pinctrl_adc4_default /*
317 &pinctrl_adc5_default /*
318 &pinctrl_adc6_default /*
319 &pinctrl_adc7_default /*
320 &pinctrl_adc8_default /*
321 &pinctrl_adc9_default /*
322 &pinctrl_adc10_default /*
323 &pinctrl_adc11_default /*
324 &pinctrl_adc12_default /*
325 &pinctrl_adc13_default /*
326 &pinctrl_adc14_default /*
327 &pinctrl_adc15_default>; /*
328 };
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