1 // SPDX-License-Identifier: GPL-2.0-or-later O
2 /*
3 * Device Tree Bindings for Cisco Meraki MX65
4 *
5 * Copyright (C) 2020-2021 Matthew Hagan <mnhag
6 */
7
8 #include "bcm958625-meraki-mx6x-common.dtsi"
9
10 / {
11 keys {
12 compatible = "gpio-keys-polled
13 autorepeat;
14 poll-interval = <20>;
15
16 button-reset {
17 label = "reset";
18 linux,code = <KEY_REST
19 gpios = <&gpioa 8 GPIO
20 };
21 };
22
23 leds {
24 compatible = "gpio-leds";
25
26 led-0 {
27 /* green:wan1-left */
28 function = LED_FUNCTIO
29 function-enumerator =
30 color = <LED_COLOR_ID_
31 gpios = <&gpioa 25 GPI
32 };
33
34 led-1 {
35 /* green:wan1-right */
36 function = LED_FUNCTIO
37 function-enumerator =
38 color = <LED_COLOR_ID_
39 gpios = <&gpioa 24 GPI
40 };
41
42 led-2 {
43 /* green:wan2-left */
44 function = LED_FUNCTIO
45 function-enumerator =
46 color = <LED_COLOR_ID_
47 gpios = <&gpioa 27 GPI
48 };
49
50 led-3 {
51 /* green:wan2-right */
52 function = LED_FUNCTIO
53 function-enumerator =
54 color = <LED_COLOR_ID_
55 gpios = <&gpioa 26 GPI
56 };
57
58 led-4 {
59 /* amber:power */
60 function = LED_FUNCTIO
61 color = <LED_COLOR_ID_
62 gpios = <&gpioa 3 GPIO
63 };
64
65 led-5 {
66 /* white:status */
67 function = LED_FUNCTIO
68 color = <LED_COLOR_ID_
69 gpios = <&gpioa 31 GPI
70 };
71 };
72 };
73
74 &axi {
75 mdio-mux@3f1c0 {
76 compatible = "mdio-mux-mmioreg
77 reg = <0x3f1c0 0x4>;
78 mux-mask = <0x2000>;
79 mdio-parent-bus = <&mdio_ext>;
80 #address-cells = <1>;
81 #size-cells = <0>;
82
83 mdio@0 {
84 reg = <0x0>;
85 #address-cells = <1>;
86 #size-cells = <0>;
87
88 phy_port6: phy@0 {
89 reg = <0>;
90 };
91
92 phy_port7: phy@1 {
93 reg = <1>;
94 };
95
96 phy_port8: phy@2 {
97 reg = <2>;
98 };
99
100 phy_port9: phy@3 {
101 reg = <3>;
102 };
103
104 phy_port10: phy@4 {
105 reg = <4>;
106 };
107
108 switch@10 {
109 compatible = "
110 reg = <0x10>;
111 dsa,member = <
112
113 ports {
114 #addre
115 #size-
116 port@0
117
118
119
120
121
122
123
124
125
126 };
127
128 port@1
129
130
131
132 };
133
134 port@2
135
136
137
138 };
139
140 port@3
141
142
143
144 };
145
146 port@4
147
148
149
150 };
151
152 port@5
153
154
155
156 };
157 };
158 };
159 };
160
161 mdio-mii@2000 {
162 reg = <0x2000>;
163 #address-cells = <1>;
164 #size-cells = <0>;
165
166 phy_port1: phy@0 {
167 reg = <0>;
168 };
169
170 phy_port2: phy@1 {
171 reg = <1>;
172 };
173
174 phy_port3: phy@2 {
175 reg = <2>;
176 };
177
178 phy_port4: phy@3 {
179 reg = <3>;
180 };
181
182 phy_port5: phy@4 {
183 reg = <4>;
184 };
185
186 switch@10 {
187 compatible = "
188 reg = <0x10>;
189 dsa,member = <
190
191 ports {
192 #addre
193 #size-
194 port@0
195
196
197
198
199
200
201
202
203
204 };
205
206 port@1
207
208
209
210 };
211
212 port@2
213
214
215
216 };
217
218 port@3
219
220
221
222 };
223
224 port@4
225
226
227
228 };
229
230 port@5
231
232
233
234 };
235 };
236 };
237 };
238 };
239 };
240
241 &srab {
242 compatible = "brcm,bcm58625-srab", "br
243 status = "okay";
244 dsa,member = <0 0>;
245
246 ports {
247 port@0 {
248 label = "wan1";
249 reg = <0>;
250 };
251
252 port@1 {
253 label = "wan2";
254 reg = <1>;
255 };
256
257 sgmii0: port@4 {
258 label = "sw0";
259 reg = <4>;
260 fixed-link {
261 speed = <1000>
262 full-duplex;
263 };
264 };
265
266 sgmii1: port@5 {
267 label = "sw1";
268 reg = <5>;
269 fixed-link {
270 speed = <1000>
271 full-duplex;
272 };
273 };
274
275 port@8 {
276 ethernet = <&amac2>;
277 reg = <8>;
278 fixed-link {
279 speed = <1000>
280 full-duplex;
281 };
282 };
283 };
284 };
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