1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * at91-kizbox2_common.dtsi - Device Tree Incl
4 * Overkiz Kizbox 2 family SoC
5 *
6 * Copyright (C) 2014-2018 Overkiz SAS
7 *
8 * Authors: Antoine Aubert <a.aubert@overkiz.co
9 * Gaël Portay <g.portay@overkiz.com>
10 * Kévin Raymond <k.raymond@overkiz.c
11 */
12 #include "sama5d31.dtsi"
13
14 / {
15 chosen {
16 bootargs = "ubi.mtd=ubi";
17 stdout-path = &dbgu;
18 };
19
20 memory@20000000 {
21 reg = <0x20000000 0x10000000>;
22 };
23
24 clocks {
25 slow_xtal {
26 clock-frequency = <327
27 };
28
29 main_xtal {
30 clock-frequency = <120
31 };
32 };
33
34 gpio-keys {
35 compatible = "gpio-keys";
36
37 button-prog {
38 label = "PB_PROG";
39 gpios = <&pioE 27 GPIO
40 linux,code = <0x102>;
41 wakeup-source;
42 };
43
44 button-reset {
45 label = "PB_RST";
46 gpios = <&pioE 29 GPIO
47 linux,code = <0x100>;
48 wakeup-source;
49 };
50
51 button-user {
52 label = "PB_USER";
53 gpios = <&pioE 31 GPIO
54 linux,code = <0x101>;
55 wakeup-source;
56 };
57 };
58
59 led-controller {
60 compatible = "pwm-leds";
61
62 led-1 {
63 label = "pwm:blue:user
64 pwms = <&pwm0 2 100000
65 max-brightness = <255>
66 linux,default-trigger
67 };
68
69 led-2 {
70 label = "pwm:green:use
71 pwms = <&pwm0 1 100000
72 max-brightness = <255>
73 linux,default-trigger
74 };
75
76 led-3 {
77 label = "pwm:red:user"
78 pwms = <&pwm0 0 100000
79 max-brightness = <255>
80 linux,default-trigger
81 };
82 };
83 };
84
85 &i2c1 {
86 status = "okay";
87
88 pmic: act8865@5b {
89 compatible = "active-semi,act8
90 reg = <0x5b>;
91 status = "okay";
92
93 regulators {
94 vcc_1v8_reg: DCDC_REG1
95 regulator-name
96 regulator-min-
97 regulator-max-
98 regulator-alwa
99 };
100
101 vcc_1v2_reg: DCDC_REG2
102 regulator-name
103 regulator-min-
104 regulator-max-
105 regulator-alwa
106 };
107
108 vcc_3v3_reg: DCDC_REG3
109 regulator-name
110 regulator-min-
111 regulator-max-
112 regulator-alwa
113 };
114
115 vddfuse_reg: LDO_REG1
116 regulator-name
117 regulator-min-
118 regulator-max-
119 };
120
121 vddana_reg: LDO_REG2 {
122 regulator-name
123 regulator-min-
124 regulator-max-
125 regulator-alwa
126 };
127
128 vled_reg: LDO_REG3 {
129 regulator-name
130 regulator-min-
131 regulator-max-
132 regulator-alwa
133 };
134
135 v3v8_rf_reg: LDO_REG4
136 regulator-name
137 regulator-min-
138 regulator-max-
139 regulator-alwa
140 };
141 };
142 };
143 };
144
145 &usart0 {
146 atmel,use-dma-rx;
147 atmel,use-dma-tx;
148 status = "disabled";
149 };
150
151 &usart1 {
152 atmel,use-dma-rx;
153 atmel,use-dma-tx;
154 status = "disabled";
155 };
156
157 &usart2 {
158 atmel,use-dma-rx;
159 atmel,use-dma-tx;
160 status = "disabled";
161 };
162
163 &pwm0 {
164 pinctrl-names = "default";
165 pinctrl-0 = <&pinctrl_pwm0_pwmh0_1
166 &pinctrl_pwm0_pwmh1_1
167 &pinctrl_pwm0_pwmh2_0>;
168 status = "okay";
169 };
170
171 &adc0 {
172 atmel,adc-vref = <3333>;
173 status = "okay";
174 };
175
176 &macb1 {
177 phy-mode = "rmii";
178 status = "okay";
179 };
180
181 &dbgu {
182 status = "okay";
183 };
184
185 &watchdog {
186 status = "okay";
187 };
188
189 &ebi {
190 pinctrl-0 = <&pinctrl_ebi_nand_addr>;
191 pinctrl-names = "default";
192 status = "okay";
193 };
194
195 &nand_controller {
196 status = "okay";
197
198 nand@3 {
199 reg = <0x3 0x0 0x2>;
200 atmel,rb = <0>;
201 nand-bus-width = <8>;
202 nand-ecc-mode = "hw";
203 nand-ecc-strength = <4>;
204 nand-ecc-step-size = <512>;
205 nand-on-flash-bbt;
206 label = "atmel_nand";
207
208 partitions {
209 compatible = "fixed-pa
210 #address-cells = <1>;
211 #size-cells = <1>;
212
213 bootstrap@0 {
214 label = "boots
215 reg = <0x0 0x2
216 };
217
218 ubi@20000 {
219 label = "ubi";
220 reg = <0x20000
221 };
222 };
223 };
224 };
225
226 &usb1 {
227 status = "okay";
228 };
229
230 &usb2 {
231 status = "okay";
232 };
233
234 /* WMBUS (inverted with IO in the latest schem
235 &pinctrl_usart0 {
236 atmel,pins =
237 <AT91_PIOD 17 AT91_PERIPH_A AT
238 AT91_PIOD 18 AT91_PERIPH_A AT
239 AT91_PIOE 2 AT91_PERIPH_GPIO
240 };
241
242 /* RTS */
243 &pinctrl_usart1 {
244 atmel,pins =
245 <AT91_PIOB 28 AT91_PERIPH_A AT
246 AT91_PIOB 29 AT91_PERIPH_A AT
247 AT91_PIOE 7 AT91_PERIPH_GPIO
248 };
249
250 /* IO (inverted with WMBUS in the latest schem
251 &pinctrl_usart2 {
252 atmel,pins =
253 <AT91_PIOE 25 AT91_PERIPH_B AT
254 AT91_PIOE 26 AT91_PERIPH_B AT
255 AT91_PIOE 8 AT91_PERIPH_GPIO
256 };
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