1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * at91sam9263.dtsi - Device Tree Include file
4 *
5 * Copyright (C) 2012 Jean-Christophe PLAGNIO<
6 */
7
8 #include <dt-bindings/pinctrl/at91.h>
9 #include <dt-bindings/interrupt-controller/irq
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/clock/at91.h>
12 #include <dt-bindings/mfd/at91-usart.h>
13
14 / {
15 #address-cells = <1>;
16 #size-cells = <1>;
17 model = "Atmel AT91SAM9263 family SoC"
18 compatible = "atmel,at91sam9263";
19 interrupt-parent = <&aic>;
20
21 aliases {
22 serial0 = &dbgu;
23 serial1 = &usart0;
24 serial2 = &usart1;
25 serial3 = &usart2;
26 gpio0 = &pioA;
27 gpio1 = &pioB;
28 gpio2 = &pioC;
29 gpio3 = &pioD;
30 gpio4 = &pioE;
31 tcb0 = &tcb0;
32 i2c0 = &i2c0;
33 ssc0 = &ssc0;
34 ssc1 = &ssc1;
35 pwm0 = &pwm0;
36 };
37
38 cpus {
39 #address-cells = <1>;
40 #size-cells = <0>;
41
42 cpu@0 {
43 compatible = "arm,arm9
44 device_type = "cpu";
45 reg = <0>;
46 };
47 };
48
49 memory@20000000 {
50 device_type = "memory";
51 reg = <0x20000000 0x08000000>;
52 };
53
54 clocks {
55 main_xtal: main_xtal {
56 compatible = "fixed-cl
57 #clock-cells = <0>;
58 clock-frequency = <0>;
59 };
60
61 slow_xtal: slow_xtal {
62 compatible = "fixed-cl
63 #clock-cells = <0>;
64 clock-frequency = <0>;
65 };
66 };
67
68 sram0: sram@300000 {
69 compatible = "mmio-sram";
70 reg = <0x00300000 0x14000>;
71 #address-cells = <1>;
72 #size-cells = <1>;
73 ranges = <0 0x00300000 0x14000
74 };
75
76 sram1: sram@500000 {
77 compatible = "mmio-sram";
78 reg = <0x00500000 0x4000>;
79 #address-cells = <1>;
80 #size-cells = <1>;
81 ranges = <0 0x00500000 0x4000>
82 };
83
84 ahb {
85 compatible = "simple-bus";
86 #address-cells = <1>;
87 #size-cells = <1>;
88 ranges;
89
90 apb {
91 compatible = "simple-b
92 #address-cells = <1>;
93 #size-cells = <1>;
94 ranges;
95
96 aic: interrupt-control
97 #interrupt-cel
98 compatible = "
99 interrupt-cont
100 reg = <0xfffff
101 atmel,external
102 };
103
104 pmc: clock-controller@
105 compatible = "
106 reg = <0xfffff
107 interrupts = <
108 #clock-cells =
109 clocks = <&slo
110 clock-names =
111 };
112
113 ramc0: ramc@ffffe200 {
114 compatible = "
115 reg = <0xffffe
116 };
117
118 smc0: smc@ffffe400 {
119 compatible = "
120 reg = <0xffffe
121 };
122
123 ramc1: ramc@ffffe800 {
124 compatible = "
125 reg = <0xffffe
126 };
127
128 smc1: smc@ffffea00 {
129 compatible = "
130 reg = <0xffffe
131 };
132
133 matrix: matrix@ffffec0
134 compatible = "
135 reg = <0xffffe
136 };
137
138 pit: timer@fffffd30 {
139 compatible = "
140 reg = <0xfffff
141 interrupts = <
142 clocks = <&pmc
143 };
144
145 tcb0: timer@fff7c000 {
146 compatible = "
147 #address-cells
148 #size-cells =
149 reg = <0xfff7c
150 interrupts = <
151 clocks = <&pmc
152 clock-names =
153 };
154
155 reset-controller@fffff
156 compatible = "
157 reg = <0xfffff
158 clocks = <&slo
159 };
160
161 poweroff@fffffd10 {
162 compatible = "
163 reg = <0xfffff
164 clocks = <&slo
165 };
166
167 pinctrl@fffff200 {
168 #address-cells
169 #size-cells =
170 compatible = "
171 ranges = <0xff
172
173 atmel,mux-mask
174 /* A
175 0xfffff
176 0x0007f
177 0xfffff
178 0xfffff
179 0xffe00
180 >;
181
182 /* shared pinc
183 dbgu {
184 pinctr
185
186
187
188 };
189 };
190
191 usart0 {
192 pinctr
193
194
195
196 };
197
198 pinctr
199
200
201 };
202
203 pinctr
204
205
206 };
207 };
208
209 usart1 {
210 pinctr
211
212
213
214 };
215
216 pinctr
217
218
219 };
220
221 pinctr
222
223
224 };
225 };
226
227 usart2 {
228 pinctr
229
230
231
232 };
233
234 pinctr
235
236
237 };
238
239 pinctr
240
241
242 };
243 };
244
245 nand {
246 pinctr
247
248
249 };
250
251 pinctr
252
253
254 };
255 };
256
257 macb {
258 pinctr
259
260
261
262
263
264
265
266
267
268
269
270 };
271
272 pinctr
273
274
275
276
277
278
279
280
281
282 };
283 };
284
285 mmc0 {
286 pinctr
287
288
289 };
290
291 pinctr
292
293
294
295 };
296
297 pinctr
298
299
300
301
302 };
303
304 pinctr
305
306
307
308 };
309
310 pinctr
311
312
313
314
315 };
316 };
317
318 mmc1 {
319 pinctr
320
321
322 };
323
324 pinctr
325
326
327
328 };
329
330 pinctr
331
332
333
334
335 };
336
337 pinctr
338
339
340
341 };
342
343 pinctr
344
345
346
347
348 };
349 };
350
351 ssc0 {
352 pinctr
353
354
355
356
357 };
358
359 pinctr
360
361
362
363
364 };
365 };
366
367 ssc1 {
368 pinctr
369
370
371
372
373 };
374
375 pinctr
376
377
378
379
380 };
381 };
382
383 spi0 {
384 pinctr
385
386
387
388
389 };
390 };
391
392 spi1 {
393 pinctr
394
395
396
397
398 };
399 };
400
401 tcb0 {
402 pinctr
403
404 };
405
406 pinctr
407
408 };
409
410 pinctr
411
412 };
413
414 pinctr
415
416 };
417
418 pinctr
419
420 };
421
422 pinctr
423
424 };
425
426 pinctr
427
428 };
429
430 pinctr
431
432 };
433
434 pinctr
435
436 };
437 };
438
439 fb {
440 pinctr
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464 };
465 };
466
467 can {
468 pinctr
469
470
471
472 };
473 };
474
475 ac97 {
476 pinctr
477
478
479
480
481
482 };
483 };
484
485 pioA: gpio@fff
486 compat
487 reg =
488 interr
489 #gpio-
490 gpio-c
491 interr
492 #inter
493 clocks
494 };
495
496 pioB: gpio@fff
497 compat
498 reg =
499 interr
500 #gpio-
501 gpio-c
502 interr
503 #inter
504 clocks
505 };
506
507 pioC: gpio@fff
508 compat
509 reg =
510 interr
511 #gpio-
512 gpio-c
513 interr
514 #inter
515 clocks
516 };
517
518 pioD: gpio@fff
519 compat
520 reg =
521 interr
522 #gpio-
523 gpio-c
524 interr
525 #inter
526 clocks
527 };
528
529 pioE: gpio@fff
530 compat
531 reg =
532 interr
533 #gpio-
534 gpio-c
535 interr
536 #inter
537 clocks
538 };
539 };
540
541 dbgu: serial@ffffee00
542 compatible = "
543 reg = <0xffffe
544 atmel,usart-mo
545 interrupts = <
546 pinctrl-names
547 pinctrl-0 = <&
548 clocks = <&pmc
549 clock-names =
550 status = "disa
551 };
552
553 usart0: serial@fff8c00
554 compatible = "
555 reg = <0xfff8c
556 atmel,usart-mo
557 interrupts = <
558 atmel,use-dma-
559 atmel,use-dma-
560 pinctrl-names
561 pinctrl-0 = <&
562 clocks = <&pmc
563 clock-names =
564 status = "disa
565 };
566
567 usart1: serial@fff9000
568 compatible = "
569 reg = <0xfff90
570 atmel,usart-mo
571 interrupts = <
572 atmel,use-dma-
573 atmel,use-dma-
574 pinctrl-names
575 pinctrl-0 = <&
576 clocks = <&pmc
577 clock-names =
578 status = "disa
579 };
580
581 usart2: serial@fff9400
582 compatible = "
583 reg = <0xfff94
584 atmel,usart-mo
585 interrupts = <
586 atmel,use-dma-
587 atmel,use-dma-
588 pinctrl-names
589 pinctrl-0 = <&
590 clocks = <&pmc
591 clock-names =
592 status = "disa
593 };
594
595 ssc0: ssc@fff98000 {
596 compatible = "
597 reg = <0xfff98
598 interrupts = <
599 pinctrl-names
600 pinctrl-0 = <&
601 clocks = <&pmc
602 clock-names =
603 status = "disa
604 };
605
606 ssc1: ssc@fff9c000 {
607 compatible = "
608 reg = <0xfff9c
609 interrupts = <
610 pinctrl-names
611 pinctrl-0 = <&
612 clocks = <&pmc
613 clock-names =
614 status = "disa
615 };
616
617 ac97: sound@fffa0000 {
618 compatible = "
619 reg = <0xfffa0
620 interrupts = <
621 pinctrl-names
622 pinctrl-0 = <&
623 clocks = <&pmc
624 clock-names =
625 status = "disa
626 };
627
628 macb0: ethernet@fffbc0
629 compatible = "
630 reg = <0xfffbc
631 interrupts = <
632 pinctrl-names
633 pinctrl-0 = <&
634 clocks = <&pmc
635 clock-names =
636 status = "disa
637 };
638
639 usb1: gadget@fff78000
640 compatible = "
641 reg = <0xfff78
642 interrupts = <
643 clocks = <&pmc
644 clock-names =
645 status = "disa
646 };
647
648 i2c0: i2c@fff88000 {
649 compatible = "
650 reg = <0xfff88
651 interrupts = <
652 #address-cells
653 #size-cells =
654 clocks = <&pmc
655 status = "disa
656 };
657
658 mmc0: mmc@fff80000 {
659 compatible = "
660 reg = <0xfff80
661 interrupts = <
662 #address-cells
663 #size-cells =
664 clocks = <&pmc
665 clock-names =
666 status = "disa
667 };
668
669 mmc1: mmc@fff84000 {
670 compatible = "
671 reg = <0xfff84
672 interrupts = <
673 #address-cells
674 #size-cells =
675 clocks = <&pmc
676 clock-names =
677 status = "disa
678 };
679
680 watchdog@fffffd40 {
681 compatible = "
682 reg = <0xfffff
683 interrupts = <
684 clocks = <&slo
685 atmel,watchdog
686 atmel,reset-ty
687 atmel,dbg-halt
688 status = "disa
689 };
690
691 spi0: spi@fffa4000 {
692 #address-cells
693 #size-cells =
694 compatible = "
695 reg = <0xfffa4
696 interrupts = <
697 pinctrl-names
698 pinctrl-0 = <&
699 clocks = <&pmc
700 clock-names =
701 status = "disa
702 };
703
704 spi1: spi@fffa8000 {
705 #address-cells
706 #size-cells =
707 compatible = "
708 reg = <0xfffa8
709 interrupts = <
710 pinctrl-names
711 pinctrl-0 = <&
712 clocks = <&pmc
713 clock-names =
714 status = "disa
715 };
716
717 pwm0: pwm@fffb8000 {
718 compatible = "
719 reg = <0xfffb8
720 interrupts = <
721 #pwm-cells = <
722 clocks = <&pmc
723 clock-names =
724 status = "disa
725 };
726
727 can: can@fffac000 {
728 compatible = "
729 reg = <0xfffac
730 interrupts = <
731 pinctrl-names
732 pinctrl-0 = <&
733 clocks = <&pmc
734 clock-names =
735 };
736
737 rtc@fffffd20 {
738 compatible = "
739 reg = <0xfffff
740 interrupts = <
741 clocks = <&slo
742 status = "disa
743 };
744
745 rtc@fffffd50 {
746 compatible = "
747 reg = <0xfffff
748 interrupts = <
749 clocks = <&slo
750 status = "disa
751 };
752
753 gpbr: syscon@fffffd60
754 compatible = "
755 reg = <0xfffff
756 status = "disa
757 };
758 };
759
760 fb0: fb@700000 {
761 compatible = "atmel,at
762 reg = <0x00700000 0x10
763 interrupts = <26 IRQ_T
764 pinctrl-names = "defau
765 pinctrl-0 = <&pinctrl_
766 clocks = <&pmc PMC_TYP
767 clock-names = "lcdc_cl
768 status = "disabled";
769 };
770
771 usb0: ohci@a00000 {
772 compatible = "atmel,at
773 reg = <0x00a00000 0x10
774 interrupts = <29 IRQ_T
775 clocks = <&pmc PMC_TYP
776 clock-names = "ohci_cl
777 status = "disabled";
778 };
779
780 ebi0: ebi@10000000 {
781 compatible = "atmel,at
782 #address-cells = <2>;
783 #size-cells = <1>;
784 atmel,smc = <&smc0>;
785 atmel,matrix = <&matri
786 reg = <0x10000000 0x80
787 ranges = <0x0 0x0 0x10
788 0x1 0x0 0x20
789 0x2 0x0 0x30
790 0x3 0x0 0x40
791 0x4 0x0 0x50
792 0x5 0x0 0x60
793 clocks = <&pmc PMC_TYP
794 status = "disabled";
795
796 nand_controller0: nand
797 compatible = "
798 #address-cells
799 #size-cells =
800 ranges;
801 status = "disa
802 };
803 };
804
805 ebi1: ebi@70000000 {
806 compatible = "atmel,at
807 #address-cells = <2>;
808 #size-cells = <1>;
809 atmel,smc = <&smc1>;
810 atmel,matrix = <&matri
811 reg = <0x80000000 0x20
812 ranges = <0x0 0x0 0x80
813 0x1 0x0 0x90
814 clocks = <&pmc PMC_TYP
815 status = "disabled";
816
817 nand_controller1: nand
818 compatible = "
819 #address-cells
820 #size-cells =
821 ranges;
822 status = "disa
823 };
824 };
825 };
826
827 i2c-gpio-0 {
828 compatible = "i2c-gpio";
829 gpios = <&pioB 4 GPIO_ACTIVE_H
830 &pioB 5 GPIO_ACTIVE_H
831 >;
832 i2c-gpio,sda-open-drain;
833 i2c-gpio,scl-open-drain;
834 i2c-gpio,delay-us = <2>;
835 #address-cells = <1>;
836 #size-cells = <0>;
837 status = "disabled";
838 };
839 };
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