1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * lan966x.dtsi - Device Tree Include file for
4 *
5 * Copyright (C) 2021 Microchip Technology, In
6 *
7 * Author: Kavyasree Kotagiri <kavyasree.kotagi
8 *
9 */
10
11 #include <dt-bindings/interrupt-controller/irq
12 #include <dt-bindings/interrupt-controller/arm
13 #include <dt-bindings/mfd/atmel-flexcom.h>
14 #include <dt-bindings/dma/at91.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/clock/microchip,lan966x.
17
18 / {
19 model = "Microchip LAN966 family SoC";
20 compatible = "microchip,lan966";
21 interrupt-parent = <&gic>;
22 #address-cells = <1>;
23 #size-cells = <1>;
24
25 cpus {
26 #address-cells = <1>;
27 #size-cells = <0>;
28
29 cpu@0 {
30 device_type = "cpu";
31 compatible = "arm,cort
32 clock-frequency = <600
33 reg = <0x0>;
34 };
35 };
36
37 clocks {
38 sys_clk: sys_clk {
39 compatible = "fixed-cl
40 #clock-cells = <0>;
41 clock-frequency = <165
42 };
43
44 cpu_clk: cpu_clk {
45 compatible = "fixed-cl
46 #clock-cells = <0>;
47 clock-frequency = <600
48 };
49
50 ddr_clk: ddr_clk {
51 compatible = "fixed-cl
52 #clock-cells = <0>;
53 clock-frequency = <300
54 };
55
56 nic_clk: nic_clk {
57 compatible = "fixed-cl
58 #clock-cells = <0>;
59 clock-frequency = <200
60 };
61 };
62
63 clks: clock-controller@e00c00a8 {
64 compatible = "microchip,lan966
65 #clock-cells = <1>;
66 clocks = <&cpu_clk>, <&ddr_clk
67 clock-names = "cpu", "ddr", "s
68 reg = <0xe00c00a8 0x38>, <0xe0
69 };
70
71 timer {
72 compatible = "arm,armv7-timer"
73 interrupt-parent = <&gic>;
74 interrupts = <GIC_PPI 13 (GIC_
75 <GIC_PPI 14 (GIC_
76 <GIC_PPI 11 (GIC_
77 <GIC_PPI 10 (GIC_
78 clock-frequency = <37500000>;
79 };
80
81 soc {
82 compatible = "simple-bus";
83 #address-cells = <1>;
84 #size-cells = <1>;
85 ranges;
86
87 udc: usb@200000 {
88 compatible = "microchi
89 "atmel,sa
90 reg = <0x00200000 0x80
91 <0xe0808000 0x40
92 interrupts = <GIC_SPI
93 clocks = <&clks GCK_GA
94 clock-names = "pclk",
95 status = "disabled";
96 };
97
98 switch: switch@e0000000 {
99 compatible = "microchi
100 reg = <0xe0000000 0x01
101 <0xe2000000 0x08
102 reg-names = "cpu", "gc
103 interrupts = <GIC_SPI
104 <GIC_SPI
105 <GIC_SPI
106 <GIC_SPI
107 <GIC_SPI
108 interrupt-names = "xtr
109 "ptp
110 resets = <&reset 0>;
111 reset-names = "switch"
112 status = "disabled";
113
114 ethernet-ports {
115 #address-cells
116 #size-cells =
117
118 port0: port@0
119 reg =
120 status
121 };
122
123 port1: port@1
124 reg =
125 status
126 };
127
128 port2: port@2
129 reg =
130 status
131 };
132
133 port3: port@3
134 reg =
135 status
136 };
137
138 port4: port@4
139 reg =
140 status
141 };
142
143 port5: port@5
144 reg =
145 status
146 };
147
148 port6: port@6
149 reg =
150 status
151 };
152
153 port7: port@7
154 reg =
155 status
156 };
157 };
158 };
159
160 otp: otp@e0021000 {
161 compatible = "microchi
162 reg = <0xe0021000 0x30
163 };
164
165 flx0: flexcom@e0040000 {
166 compatible = "atmel,sa
167 reg = <0xe0040000 0x10
168 clocks = <&clks GCK_ID
169 #address-cells = <1>;
170 #size-cells = <1>;
171 ranges = <0x0 0xe00400
172 status = "disabled";
173
174 usart0: serial@200 {
175 compatible = "
176 reg = <0x200 0
177 interrupts = <
178 dmas = <&dma0
179 <&dma0
180 dma-names = "t
181 clocks = <&nic
182 clock-names =
183 atmel,fifo-siz
184 status = "disa
185 };
186
187 spi0: spi@400 {
188 compatible = "
189 reg = <0x400 0
190 interrupts = <
191 dmas = <&dma0
192 <&dma0
193 dma-names = "t
194 clocks = <&nic
195 clock-names =
196 atmel,fifo-siz
197 #address-cells
198 #size-cells =
199 status = "disa
200 };
201
202 i2c0: i2c@600 {
203 compatible = "
204 reg = <0x600 0
205 interrupts = <
206 dmas = <&dma0
207 <&dma0
208 dma-names = "t
209 clocks = <&nic
210 #address-cells
211 #size-cells =
212 status = "disa
213 };
214 };
215
216 flx1: flexcom@e0044000 {
217 compatible = "atmel,sa
218 reg = <0xe0044000 0x10
219 clocks = <&clks GCK_ID
220 #address-cells = <1>;
221 #size-cells = <1>;
222 ranges = <0x0 0xe00440
223 status = "disabled";
224
225 usart1: serial@200 {
226 compatible = "
227 reg = <0x200 0
228 interrupts = <
229 dmas = <&dma0
230 <&dma0
231 dma-names = "t
232 clocks = <&nic
233 clock-names =
234 atmel,fifo-siz
235 status = "disa
236 };
237
238 spi1: spi@400 {
239 compatible = "
240 reg = <0x400 0
241 interrupts = <
242 dmas = <&dma0
243 <&dma0
244 dma-names = "t
245 clocks = <&nic
246 clock-names =
247 atmel,fifo-siz
248 #address-cells
249 #size-cells =
250 status = "disa
251 };
252
253 i2c1: i2c@600 {
254 compatible = "
255 reg = <0x600 0
256 interrupts = <
257 dmas = <&dma0
258 <&dma0
259 dma-names = "t
260 clocks = <&nic
261 #address-cells
262 #size-cells =
263 status = "disa
264 };
265 };
266
267 trng: rng@e0048000 {
268 compatible = "atmel,at
269 reg = <0xe0048000 0x10
270 clocks = <&nic_clk>;
271 };
272
273 aes: crypto@e004c000 {
274 compatible = "atmel,at
275 reg = <0xe004c000 0x10
276 interrupts = <GIC_SPI
277 dmas = <&dma0 AT91_XDM
278 <&dma0 AT91_XDM
279 dma-names = "tx", "rx"
280 clocks = <&nic_clk>;
281 clock-names = "aes_clk
282 };
283
284 flx2: flexcom@e0060000 {
285 compatible = "atmel,sa
286 reg = <0xe0060000 0x10
287 clocks = <&clks GCK_ID
288 #address-cells = <1>;
289 #size-cells = <1>;
290 ranges = <0x0 0xe00600
291 status = "disabled";
292
293 usart2: serial@200 {
294 compatible = "
295 reg = <0x200 0
296 interrupts = <
297 dmas = <&dma0
298 <&dma0
299 dma-names = "t
300 clocks = <&nic
301 clock-names =
302 atmel,fifo-siz
303 status = "disa
304 };
305
306 spi2: spi@400 {
307 compatible = "
308 reg = <0x400 0
309 interrupts = <
310 dmas = <&dma0
311 <&dma0
312 dma-names = "t
313 clocks = <&nic
314 clock-names =
315 atmel,fifo-siz
316 #address-cells
317 #size-cells =
318 status = "disa
319 };
320
321 i2c2: i2c@600 {
322 compatible = "
323 reg = <0x600 0
324 interrupts = <
325 dmas = <&dma0
326 <&dma0
327 dma-names = "t
328 clocks = <&nic
329 #address-cells
330 #size-cells =
331 status = "disa
332 };
333 };
334
335 flx3: flexcom@e0064000 {
336 compatible = "atmel,sa
337 reg = <0xe0064000 0x10
338 clocks = <&clks GCK_ID
339 #address-cells = <1>;
340 #size-cells = <1>;
341 ranges = <0x0 0xe00640
342 status = "disabled";
343
344 usart3: serial@200 {
345 compatible = "
346 reg = <0x200 0
347 interrupts = <
348 dmas = <&dma0
349 <&dma0
350 dma-names = "t
351 clocks = <&nic
352 clock-names =
353 atmel,fifo-siz
354 status = "disa
355 };
356
357 spi3: spi@400 {
358 compatible = "
359 reg = <0x400 0
360 interrupts = <
361 dmas = <&dma0
362 <&dma0
363 dma-names = "t
364 clocks = <&nic
365 clock-names =
366 atmel,fifo-siz
367 #address-cells
368 #size-cells =
369 status = "disa
370 };
371
372 i2c3: i2c@600 {
373 compatible = "
374 reg = <0x600 0
375 interrupts = <
376 dmas = <&dma0
377 <&dma0
378 dma-names = "t
379 clocks = <&nic
380 #address-cells
381 #size-cells =
382 status = "disa
383 };
384 };
385
386 dma0: dma-controller@e0068000
387 compatible = "microchi
388 reg = <0xe0068000 0x10
389 interrupts = <GIC_SPI
390 #dma-cells = <1>;
391 clocks = <&nic_clk>;
392 clock-names = "dma_clk
393 };
394
395 sha: crypto@e006c000 {
396 compatible = "atmel,at
397 reg = <0xe006c000 0xec
398 interrupts = <GIC_SPI
399 dmas = <&dma0 AT91_XDM
400 dma-names = "tx";
401 clocks = <&nic_clk>;
402 clock-names = "sha_clk
403 };
404
405 flx4: flexcom@e0070000 {
406 compatible = "atmel,sa
407 reg = <0xe0070000 0x10
408 clocks = <&clks GCK_ID
409 #address-cells = <1>;
410 #size-cells = <1>;
411 ranges = <0x0 0xe00700
412 status = "disabled";
413
414 usart4: serial@200 {
415 compatible = "
416 reg = <0x200 0
417 interrupts = <
418 dmas = <&dma0
419 <&dma0
420 dma-names = "t
421 clocks = <&nic
422 clock-names =
423 atmel,fifo-siz
424 status = "disa
425 };
426
427 spi4: spi@400 {
428 compatible = "
429 reg = <0x400 0
430 interrupts = <
431 dmas = <&dma0
432 <&dma0
433 dma-names = "t
434 clocks = <&nic
435 clock-names =
436 atmel,fifo-siz
437 #address-cells
438 #size-cells =
439 status = "disa
440 };
441
442 i2c4: i2c@600 {
443 compatible = "
444 reg = <0x600 0
445 interrupts = <
446 dmas = <&dma0
447 <&dma0
448 dma-names = "t
449 clocks = <&nic
450 #address-cells
451 #size-cells =
452 status = "disa
453 };
454 };
455
456 timer0: timer@e008c000 {
457 compatible = "snps,dw-
458 reg = <0xe008c000 0x40
459 clocks = <&nic_clk>;
460 clock-names = "timer";
461 interrupts = <GIC_SPI
462 };
463
464 watchdog: watchdog@e0090000 {
465 compatible = "snps,dw-
466 reg = <0xe0090000 0x10
467 interrupts = <GIC_SPI
468 clocks = <&nic_clk>;
469 status = "disabled";
470 };
471
472 cpu_ctrl: syscon@e00c0000 {
473 compatible = "microchi
474 reg = <0xe00c0000 0x35
475 };
476
477 can0: can@e081c000 {
478 compatible = "bosch,m_
479 reg = <0xe081c000 0xfc
480 reg-names = "m_can", "
481 interrupts = <GIC_SPI
482 <GIC_SPI
483 interrupt-names = "int
484 clocks = <&clks GCK_ID
485 clock-names = "hclk",
486 assigned-clocks = <&cl
487 assigned-clock-rates =
488 bosch,mram-cfg = <0x0
489 status = "disabled";
490 };
491
492 can1: can@e0820000 {
493 compatible = "bosch,m_
494 reg = <0xe0820000 0xfc
495 reg-names = "m_can", "
496 interrupts = <GIC_SPI
497 <GIC_SPI
498 interrupt-names = "int
499 clocks = <&clks GCK_ID
500 clock-names = "hclk",
501 assigned-clocks = <&cl
502 assigned-clock-rates =
503 bosch,mram-cfg = <0x40
504 status = "disabled";
505 };
506
507 reset: reset-controller@e20040
508 compatible = "microchi
509 reg = <0xe200400c 0x4>
510 reg-names = "gcb";
511 #reset-cells = <1>;
512 cpu-syscon = <&cpu_ctr
513 };
514
515 gpio: pinctrl@e2004064 {
516 compatible = "microchi
517 reg = <0xe2004064 0xb4
518 <0xe2010024 0x138>
519 resets = <&reset 0>;
520 reset-names = "switch"
521 gpio-controller;
522 #gpio-cells = <2>;
523 gpio-ranges = <&gpio 0
524 interrupt-controller;
525 interrupts = <GIC_SPI
526 #interrupt-cells = <2>
527 };
528
529 mdio0: mdio@e2004118 {
530 compatible = "microchi
531 #address-cells = <1>;
532 #size-cells = <0>;
533 reg = <0xe2004118 0x24
534 clocks = <&sys_clk>;
535 status = "disabled";
536 };
537
538 mdio1: mdio@e200413c {
539 compatible = "microchi
540 #address-cells = <1>;
541 #size-cells = <0>;
542 reg = <0xe200413c 0x24
543 <0xe2010020 0x4>
544 clocks = <&sys_clk>;
545 status = "disabled";
546
547 phy0: ethernet-phy@1 {
548 reg = <1>;
549 interrupts = <
550 status = "disa
551 };
552
553 phy1: ethernet-phy@2 {
554 reg = <2>;
555 interrupts = <
556 status = "disa
557 };
558 };
559
560 sgpio: gpio@e2004190 {
561 compatible = "microchi
562 reg = <0xe2004190 0x11
563 clocks = <&sys_clk>;
564 resets = <&reset 0>;
565 reset-names = "switch"
566 #address-cells = <1>;
567 #size-cells = <0>;
568 status = "disabled";
569
570 sgpio_in: gpio@0 {
571 compatible = "
572 reg = <0>;
573 gpio-controlle
574 #gpio-cells =
575 interrupts = <
576 interrupt-cont
577 #interrupt-cel
578 };
579
580 sgpio_out: gpio@1 {
581 compatible = "
582 reg = <1>;
583 gpio-controlle
584 #gpio-cells =
585 };
586 };
587
588 hwmon: hwmon@e2010180 {
589 compatible = "microchi
590 reg = <0xe2010180 0xc>
591 <0xe20042a8 0xc>
592 reg-names = "pvt", "fa
593 clocks = <&sys_clk>;
594 };
595
596 serdes: serdes@e202c000 {
597 compatible = "microchi
598 reg = <0xe202c000 0x9c
599 <0xe2004010 0x4>
600 #phy-cells = <2>;
601 status = "disabled";
602 };
603
604 gic: interrupt-controller@e8c1
605 compatible = "arm,gic-
606 #interrupt-cells = <3>
607 interrupts = <GIC_PPI
608 interrupt-controller;
609 reg = <0xe8c11000 0x10
610 <0xe8c12000 0x20
611 <0xe8c14000 0x20
612 <0xe8c16000 0x20
613 };
614 };
615 };
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