1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * sama5d3.dtsi - Device Tree Include file for
4 * applies to SAMA5D31, SAMA5D3
5 *
6 * Copyright (C) 2013 Atmel,
7 * 2013 Ludovic Desroches <ludov
8 */
9
10 #include <dt-bindings/dma/at91.h>
11 #include <dt-bindings/pinctrl/at91.h>
12 #include <dt-bindings/interrupt-controller/irq
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/clock/at91.h>
15 #include <dt-bindings/mfd/at91-usart.h>
16
17 / {
18 #address-cells = <1>;
19 #size-cells = <1>;
20 model = "Atmel SAMA5D3 family SoC";
21 compatible = "atmel,sama5d3", "atmel,s
22 interrupt-parent = <&aic>;
23
24 aliases {
25 serial0 = &dbgu;
26 serial1 = &usart0;
27 serial2 = &usart1;
28 serial3 = &usart2;
29 serial4 = &usart3;
30 serial5 = &uart0;
31 gpio0 = &pioA;
32 gpio1 = &pioB;
33 gpio2 = &pioC;
34 gpio3 = &pioD;
35 gpio4 = &pioE;
36 tcb0 = &tcb0;
37 i2c0 = &i2c0;
38 i2c1 = &i2c1;
39 i2c2 = &i2c2;
40 ssc0 = &ssc0;
41 ssc1 = &ssc1;
42 pwm0 = &pwm0;
43 };
44 cpus {
45 #address-cells = <1>;
46 #size-cells = <0>;
47 cpu@0 {
48 device_type = "cpu";
49 compatible = "arm,cort
50 reg = <0x0>;
51 };
52 };
53
54 pmu {
55 compatible = "arm,cortex-a5-pm
56 interrupts = <46 IRQ_TYPE_LEVE
57 };
58
59 memory@20000000 {
60 device_type = "memory";
61 reg = <0x20000000 0x8000000>;
62 };
63
64 clocks {
65 slow_xtal: slow_xtal {
66 compatible = "fixed-cl
67 #clock-cells = <0>;
68 clock-frequency = <0>;
69 };
70
71 main_xtal: main_xtal {
72 compatible = "fixed-cl
73 #clock-cells = <0>;
74 clock-frequency = <0>;
75 };
76
77 adc_op_clk: adc_op_clk {
78 compatible = "fixed-cl
79 #clock-cells = <0>;
80 clock-frequency = <100
81 };
82 };
83
84 sram: sram@300000 {
85 compatible = "mmio-sram";
86 reg = <0x00300000 0x20000>;
87 #address-cells = <1>;
88 #size-cells = <1>;
89 ranges = <0 0x00300000 0x20000
90 };
91
92 ahb {
93 compatible = "simple-bus";
94 #address-cells = <1>;
95 #size-cells = <1>;
96 ranges;
97
98 apb {
99 compatible = "simple-b
100 #address-cells = <1>;
101 #size-cells = <1>;
102 ranges;
103
104 mmc0: mmc@f0000000 {
105 compatible = "
106 reg = <0xf0000
107 interrupts = <
108 dmas = <&dma0
109 dma-names = "r
110 pinctrl-names
111 pinctrl-0 = <&
112 status = "disa
113 #address-cells
114 #size-cells =
115 clocks = <&pmc
116 clock-names =
117 };
118
119 spi0: spi@f0004000 {
120 #address-cells
121 #size-cells =
122 compatible = "
123 reg = <0xf0004
124 interrupts = <
125 dmas = <&dma0
126 <&dma0
127 dma-names = "t
128 pinctrl-names
129 pinctrl-0 = <&
130 clocks = <&pmc
131 clock-names =
132 status = "disa
133 };
134
135 ssc0: ssc@f0008000 {
136 compatible = "
137 reg = <0xf0008
138 interrupts = <
139 dmas = <&dma0
140 <&dma0
141 dma-names = "t
142 pinctrl-names
143 pinctrl-0 = <&
144 clocks = <&pmc
145 clock-names =
146 status = "disa
147 };
148
149 tcb0: timer@f0010000 {
150 compatible = "
151 #address-cells
152 #size-cells =
153 reg = <0xf0010
154 interrupts = <
155 clocks = <&pmc
156 clock-names =
157 };
158
159 i2c0: i2c@f0014000 {
160 compatible = "
161 reg = <0xf0014
162 interrupts = <
163 dmas = <&dma0
164 <&dma0
165 dma-names = "t
166 pinctrl-names
167 pinctrl-0 = <&
168 pinctrl-1 = <&
169 sda-gpios = <&
170 scl-gpios = <&
171 #address-cells
172 #size-cells =
173 clocks = <&pmc
174 status = "disa
175 };
176
177 i2c1: i2c@f0018000 {
178 compatible = "
179 reg = <0xf0018
180 interrupts = <
181 dmas = <&dma0
182 <&dma0
183 dma-names = "t
184 pinctrl-names
185 pinctrl-0 = <&
186 pinctrl-1 = <&
187 sda-gpios = <&
188 scl-gpios = <&
189 #address-cells
190 #size-cells =
191 clocks = <&pmc
192 status = "disa
193 };
194
195 usart0: serial@f001c00
196 compatible = "
197 reg = <0xf001c
198 atmel,usart-mo
199 interrupts = <
200 dmas = <&dma0
201 <&dma0
202 dma-names = "t
203 pinctrl-names
204 pinctrl-0 = <&
205 clocks = <&pmc
206 clock-names =
207 status = "disa
208 };
209
210 usart1: serial@f002000
211 compatible = "
212 reg = <0xf0020
213 atmel,usart-mo
214 interrupts = <
215 dmas = <&dma0
216 <&dma0
217 dma-names = "t
218 pinctrl-names
219 pinctrl-0 = <&
220 clocks = <&pmc
221 clock-names =
222 status = "disa
223 };
224
225 uart0: serial@f0024000
226 compatible = "
227 reg = <0xf0024
228 atmel,usart-mo
229 interrupts = <
230 pinctrl-names
231 pinctrl-0 = <&
232 clocks = <&pmc
233 clock-names =
234 status = "disa
235 };
236
237 pwm0: pwm@f002c000 {
238 compatible = "
239 reg = <0xf002c
240 interrupts = <
241 #pwm-cells = <
242 clocks = <&pmc
243 status = "disa
244 };
245
246 isi: isi@f0034000 {
247 compatible = "
248 reg = <0xf0034
249 interrupts = <
250 pinctrl-names
251 pinctrl-0 = <&
252 clocks = <&pmc
253 clock-names =
254 status = "disa
255 port {
256 #addre
257 #size-
258 };
259 };
260
261 sfr: sfr@f0038000 {
262 compatible = "
263 reg = <0xf0038
264 };
265
266 mmc1: mmc@f8000000 {
267 compatible = "
268 reg = <0xf8000
269 interrupts = <
270 dmas = <&dma1
271 dma-names = "r
272 pinctrl-names
273 pinctrl-0 = <&
274 status = "disa
275 #address-cells
276 #size-cells =
277 clocks = <&pmc
278 clock-names =
279 };
280
281 spi1: spi@f8008000 {
282 #address-cells
283 #size-cells =
284 compatible = "
285 reg = <0xf8008
286 interrupts = <
287 dmas = <&dma1
288 <&dma1
289 dma-names = "t
290 pinctrl-names
291 pinctrl-0 = <&
292 clocks = <&pmc
293 clock-names =
294 status = "disa
295 };
296
297 ssc1: ssc@f800c000 {
298 compatible = "
299 reg = <0xf800c
300 interrupts = <
301 dmas = <&dma1
302 <&dma1
303 dma-names = "t
304 pinctrl-names
305 pinctrl-0 = <&
306 clocks = <&pmc
307 clock-names =
308 status = "disa
309 };
310
311 adc0: adc@f8018000 {
312 compatible = "
313 reg = <0xf8018
314 interrupts = <
315 pinctrl-names
316 pinctrl-0 = <
317 &pinct
318 &pinct
319 &pinct
320 &pinct
321 &pinct
322 &pinct
323 &pinct
324 &pinct
325 &pinct
326 &pinct
327 &pinct
328 &pinct
329 &pinct
330 >;
331 clocks = <&pmc
332 <&adc
333 clock-names =
334 atmel,adc-chan
335 atmel,adc-star
336 atmel,adc-use-
337 atmel,adc-vref
338 atmel,adc-samp
339 status = "disa
340 };
341
342 i2c2: i2c@f801c000 {
343 compatible = "
344 reg = <0xf801c
345 interrupts = <
346 dmas = <&dma1
347 <&dma1
348 dma-names = "t
349 pinctrl-names
350 pinctrl-0 = <&
351 pinctrl-1 = <&
352 sda-gpios = <&
353 scl-gpios = <&
354 #address-cells
355 #size-cells =
356 clocks = <&pmc
357 status = "disa
358 };
359
360 usart2: serial@f802000
361 compatible = "
362 reg = <0xf8020
363 atmel,usart-mo
364 interrupts = <
365 dmas = <&dma1
366 <&dma1
367 dma-names = "t
368 pinctrl-names
369 pinctrl-0 = <&
370 clocks = <&pmc
371 clock-names =
372 status = "disa
373 };
374
375 usart3: serial@f802400
376 compatible = "
377 reg = <0xf8024
378 atmel,usart-mo
379 interrupts = <
380 dmas = <&dma1
381 <&dma1
382 dma-names = "t
383 pinctrl-names
384 pinctrl-0 = <&
385 clocks = <&pmc
386 clock-names =
387 status = "disa
388 };
389
390 sha: crypto@f8034000 {
391 compatible = "
392 reg = <0xf8034
393 interrupts = <
394 dmas = <&dma1
395 dma-names = "t
396 clocks = <&pmc
397 clock-names =
398 };
399
400 aes: crypto@f8038000 {
401 compatible = "
402 reg = <0xf8038
403 interrupts = <
404 dmas = <&dma1
405 <&dma1
406 dma-names = "t
407 clocks = <&pmc
408 clock-names =
409 };
410
411 tdes: crypto@f803c000
412 compatible = "
413 reg = <0xf803c
414 interrupts = <
415 dmas = <&dma1
416 <&dma1
417 dma-names = "t
418 clocks = <&pmc
419 clock-names =
420 };
421
422 trng@f8040000 {
423 compatible = "
424 reg = <0xf8040
425 interrupts = <
426 clocks = <&pmc
427 };
428
429 hsmc: hsmc@ffffc000 {
430 compatible = "
431 reg = <0xffffc
432 interrupts = <
433 clocks = <&pmc
434 #address-cells
435 #size-cells =
436 ranges;
437
438 pmecc: ecc-eng
439 compat
440 reg =
441
442 };
443 };
444
445 dma0: dma-controller@f
446 compatible = "
447 reg = <0xffffe
448 interrupts = <
449 #dma-cells = <
450 clocks = <&pmc
451 clock-names =
452 };
453
454 dma1: dma-controller@f
455 compatible = "
456 reg = <0xffffe
457 interrupts = <
458 #dma-cells = <
459 clocks = <&pmc
460 clock-names =
461 };
462
463 ramc0: ramc@ffffea00 {
464 compatible = "
465 reg = <0xffffe
466 clocks = <&pmc
467 clock-names =
468 };
469
470 dbgu: serial@ffffee00
471 compatible = "
472 reg = <0xffffe
473 atmel,usart-mo
474 interrupts = <
475 dmas = <&dma1
476 <&dma1
477 dma-names = "t
478 pinctrl-names
479 pinctrl-0 = <&
480 clocks = <&pmc
481 clock-names =
482 status = "disa
483 };
484
485 aic: interrupt-control
486 #interrupt-cel
487 compatible = "
488 interrupt-cont
489 reg = <0xfffff
490 atmel,external
491 };
492
493 pinctrl: pinctrl@fffff
494 #address-cells
495 #size-cells =
496 compatible = "
497 ranges = <0xff
498 atmel,mux-mask
499 /* A
500 0xffff
501 0xffff
502 0xffff
503 0xffff
504 0xffff
505 >;
506
507 /* shared pinc
508 adc0 {
509 pinctr
510
511
512 };
513 pinctr
514
515
516 };
517 pinctr
518
519
520 };
521 pinctr
522
523
524 };
525 pinctr
526
527
528 };
529 pinctr
530
531
532 };
533 pinctr
534
535
536 };
537 pinctr
538
539
540 };
541 pinctr
542
543
544 };
545 pinctr
546
547
548 };
549 pinctr
550
551
552 };
553 pinctr
554
555
556 };
557 pinctr
558
559
560 };
561 };
562
563 dbgu {
564 pinctr
565
566
567
568 };
569 };
570
571 ebi {
572 pinctr
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597 };
598
599 pinctr
600
601
602
603 };
604
605 pinctr
606
607
608 };
609
610 pinctr
611
612
613 };
614
615 pinctr
616
617
618 };
619
620 pinctr
621
622
623 };
624
625 pinctr
626
627
628 };
629 };
630
631 i2c0 {
632 pinctr
633
634
635
636 };
637
638 pinctr
639
640
641
642 };
643 };
644
645 i2c1 {
646 pinctr
647
648
649
650 };
651
652 pinctr
653
654
655
656 };
657 };
658
659 i2c2 {
660 pinctr
661
662
663
664 };
665
666 pinctr
667
668
669
670 };
671 };
672
673 isi {
674 pinctr
675
676
677
678
679
680
681
682
683
684
685
686
687 };
688
689 pinctr
690
691
692
693 };
694
695 pinctr
696
697
698
699 };
700 };
701
702 mmc0 {
703 pinctr
704
705
706
707
708 };
709 pinctr
710
711
712
713
714 };
715 pinctr
716
717
718
719
720
721 };
722 };
723
724 mmc1 {
725 pinctr
726
727
728
729
730 };
731 pinctr
732
733
734
735
736 };
737 };
738
739 nand0 {
740 pinctr
741
742
743
744 };
745 };
746
747 pwm0 {
748 pinctr
749
750
751 };
752 pinctr
753
754
755 };
756 pinctr
757
758
759 };
760 pinctr
761
762
763 };
764
765 pinctr
766
767
768 };
769 pinctr
770
771
772 };
773 pinctr
774
775
776 };
777 pinctr
778
779
780 };
781 pinctr
782
783
784 };
785 pinctr
786
787
788 };
789
790 pinctr
791
792
793 };
794 pinctr
795
796
797 };
798 pinctr
799
800
801 };
802 pinctr
803
804
805 };
806
807 pinctr
808
809
810 };
811 pinctr
812
813
814 };
815 pinctr
816
817
818 };
819 pinctr
820
821
822 };
823 };
824
825 spi0 {
826 pinctr
827
828
829
830
831 };
832 };
833
834 spi1 {
835 pinctr
836
837
838
839
840 };
841 };
842
843 ssc0 {
844 pinctr
845
846
847
848
849 };
850
851 pinctr
852
853
854
855
856 };
857 };
858
859 ssc1 {
860 pinctr
861
862
863
864
865 };
866
867 pinctr
868
869
870
871
872 };
873 };
874
875 uart0 {
876 pinctr
877
878
879
880 };
881 };
882
883 uart1 {
884 pinctr
885
886
887
888 };
889 };
890
891 usart0 {
892 pinctr
893
894
895
896 };
897
898 pinctr
899
900
901
902 };
903 };
904
905 usart1 {
906 pinctr
907
908
909
910 };
911
912 pinctr
913
914
915
916 };
917 };
918
919 usart2 {
920 pinctr
921
922
923
924 };
925
926 pinctr
927
928
929
930 };
931 };
932
933 usart3 {
934 pinctr
935
936
937
938 };
939
940 pinctr
941
942
943
944 };
945 };
946
947
948 pioA: gpio@fff
949 compat
950 reg =
951 interr
952 #gpio-
953 gpio-c
954 interr
955 #inter
956 clocks
957 };
958
959 pioB: gpio@fff
960 compat
961 reg =
962 interr
963 #gpio-
964 gpio-c
965 interr
966 #inter
967 clocks
968 };
969
970 pioC: gpio@fff
971 compat
972 reg =
973 interr
974 #gpio-
975 gpio-c
976 interr
977 #inter
978 clocks
979 };
980
981 pioD: gpio@fff
982 compat
983 reg =
984 interr
985 #gpio-
986 gpio-c
987 interr
988 #inter
989 clocks
990 };
991
992 pioE: gpio@fff
993 compat
994 reg =
995 interr
996 #gpio-
997 gpio-c
998 interr
999 #inter
1000 clock
1001 };
1002 };
1003
1004 pmc: clock-controller
1005 compatible =
1006 reg = <0xffff
1007 interrupts =
1008 #clock-cells
1009 clocks = <&cl
1010 clock-names =
1011 };
1012
1013 reset_controller: res
1014 compatible =
1015 reg = <0xffff
1016 clocks = <&cl
1017 };
1018
1019 shutdown_controller:
1020 compatible =
1021 reg = <0xffff
1022 clocks = <&cl
1023 };
1024
1025 pit: timer@fffffe30 {
1026 compatible =
1027 reg = <0xffff
1028 interrupts =
1029 clocks = <&pm
1030 };
1031
1032 watchdog: watchdog@ff
1033 compatible =
1034 reg = <0xffff
1035 interrupts =
1036 clocks = <&cl
1037 atmel,watchdo
1038 atmel,reset-t
1039 atmel,dbg-hal
1040 status = "dis
1041 };
1042
1043 clk32k: clock-control
1044 compatible =
1045 reg = <0xffff
1046 clocks = <&sl
1047 #clock-cells
1048 };
1049
1050 rtc@fffffeb0 {
1051 compatible =
1052 reg = <0xffff
1053 interrupts =
1054 clocks = <&cl
1055 };
1056 };
1057
1058 nfc_sram: sram@200000 {
1059 compatible = "mmio-sr
1060 no-memory-wc;
1061 reg = <0x200000 0x240
1062 #address-cells = <1>;
1063 #size-cells = <1>;
1064 ranges = <0 0x200000
1065 };
1066
1067 usb0: gadget@500000 {
1068 compatible = "atmel,s
1069 reg = <0x00500000 0x1
1070 0xf8030000 0x4
1071 interrupts = <33 IRQ_
1072 clocks = <&pmc PMC_TY
1073 clock-names = "pclk",
1074 status = "disabled";
1075 };
1076
1077 usb1: ohci@600000 {
1078 compatible = "atmel,a
1079 reg = <0x00600000 0x1
1080 interrupts = <32 IRQ_
1081 clocks = <&pmc PMC_TY
1082 clock-names = "ohci_c
1083 status = "disabled";
1084 };
1085
1086 usb2: ehci@700000 {
1087 compatible = "atmel,a
1088 reg = <0x00700000 0x1
1089 interrupts = <32 IRQ_
1090 clocks = <&pmc PMC_TY
1091 clock-names = "usb_cl
1092 status = "disabled";
1093 };
1094
1095 ebi: ebi@10000000 {
1096 compatible = "atmel,s
1097 #address-cells = <2>;
1098 #size-cells = <1>;
1099 atmel,smc = <&hsmc>;
1100 reg = <0x10000000 0x1
1101 0x40000000 0x3
1102 ranges = <0x0 0x0 0x1
1103 0x1 0x0 0x4
1104 0x2 0x0 0x5
1105 0x3 0x0 0x6
1106 clocks = <&pmc PMC_TY
1107 status = "disabled";
1108
1109 nand_controller: nand
1110 compatible =
1111 atmel,nfc-sra
1112 atmel,nfc-io
1113 ecc-engine =
1114 #address-cell
1115 #size-cells =
1116 ranges;
1117 status = "dis
1118 };
1119 };
1120
1121 nfc_io: nfc-io@70000000 {
1122 compatible = "atmel,s
1123 reg = <0x70000000 0x8
1124 };
1125 };
1126 };
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