1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3 /dts-v1/;
4 #include "rk3288-evb.dtsi"
5
6 / {
7 model = "Rockchip RK3288 EVB ACT8846";
8 compatible = "rockchip,rk3288-evb-act8
9
10 vcc_lcd: vcc-lcd {
11 compatible = "regulator-fixed"
12 enable-active-high;
13 gpio = <&gpio7 RK_PA3 GPIO_ACT
14 pinctrl-names = "default";
15 pinctrl-0 = <&lcd_en>;
16 regulator-name = "vcc_lcd";
17 vin-supply = <&vcc_io>;
18 };
19
20 vcc_wl: vcc-wl {
21 compatible = "regulator-fixed"
22 enable-active-high;
23 gpio = <&gpio7 RK_PB1 GPIO_ACT
24 pinctrl-names = "default";
25 pinctrl-0 = <&wifi_pwr>;
26 regulator-name = "vcc_wl";
27 vin-supply = <&vcc_18>;
28 };
29 };
30
31 &i2c0 {
32 clock-frequency = <400000>;
33
34 vdd_cpu: syr827@40 {
35 compatible = "silergy,syr827";
36 fcs,suspend-voltage-selector =
37 reg = <0x40>;
38 regulator-name = "vdd_cpu";
39 regulator-min-microvolt = <850
40 regulator-max-microvolt = <135
41 regulator-always-on;
42 regulator-boot-on;
43 vin-supply = <&vcc_sys>;
44 };
45
46 vdd_gpu: syr828@41 {
47 compatible = "silergy,syr828";
48 fcs,suspend-voltage-selector =
49 reg = <0x41>;
50 regulator-name = "vdd_gpu";
51 regulator-min-microvolt = <850
52 regulator-max-microvolt = <135
53 regulator-always-on;
54 vin-supply = <&vcc_sys>;
55 };
56
57 rtc@51 {
58 compatible = "haoyu,hym8563";
59 reg = <0x51>;
60
61 interrupt-parent = <&gpio0>;
62 interrupts = <RK_PA4 IRQ_TYPE_
63
64 pinctrl-names = "default";
65 pinctrl-0 = <&pmic_int>;
66
67 #clock-cells = <0>;
68 clock-output-names = "xin32k";
69 };
70
71 act8846: act8846@5a {
72 compatible = "active-semi,act8
73 reg = <0x5a>;
74 status = "okay";
75
76 vp1-supply = <&vcc_sys>;
77 vp2-supply = <&vcc_sys>;
78 vp3-supply = <&vcc_sys>;
79 vp4-supply = <&vcc_sys>;
80 inl1-supply = <&vcc_io>;
81 inl2-supply = <&vcc_sys>;
82 inl3-supply = <&vcc_20>;
83
84 regulators {
85 vcc_ddr: REG1 {
86 regulator-name
87 regulator-min-
88 regulator-max-
89 regulator-alwa
90 };
91
92 vcc_io: REG2 {
93 regulator-name
94 regulator-min-
95 regulator-max-
96 regulator-alwa
97 };
98
99 vdd_log: REG3 {
100 regulator-name
101 regulator-min-
102 regulator-max-
103 regulator-alwa
104 };
105
106 vcc_20: REG4 {
107 regulator-name
108 regulator-min-
109 regulator-max-
110 regulator-alwa
111 };
112
113 vccio_sd: REG5 {
114 regulator-name
115 regulator-min-
116 regulator-max-
117 regulator-alwa
118 };
119
120 vdd10_lcd: REG6 {
121 regulator-name
122 regulator-min-
123 regulator-max-
124 regulator-alwa
125 };
126
127 vcca_codec: REG7 {
128 regulator-name
129 regulator-min-
130 regulator-max-
131 regulator-alwa
132 };
133
134 vcc_tp: REG8 {
135 regulator-name
136 regulator-min-
137 regulator-max-
138 regulator-alwa
139 };
140
141 vccio_pmu: REG9 {
142 regulator-name
143 regulator-min-
144 regulator-max-
145 regulator-alwa
146 };
147
148 vdd_10: REG10 {
149 regulator-name
150 regulator-min-
151 regulator-max-
152 regulator-alwa
153 };
154
155 vcc_18: REG11 {
156 regulator-name
157 regulator-min-
158 regulator-max-
159 regulator-alwa
160 };
161
162 vcc18_lcd: REG12 {
163 regulator-name
164 regulator-min-
165 regulator-max-
166 regulator-alwa
167 };
168 };
169 };
170 };
171
172 &panel {
173 power-supply = <&vcc_lcd>;
174 };
175
176 &pinctrl {
177 lcd {
178 lcd_en: lcd-en {
179 rockchip,pins = <7 RK_
180 };
181 };
182
183 wifi {
184 wifi_pwr: wifi-pwr {
185 rockchip,pins = <7 RK_
186 };
187 };
188 };
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