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Linux/arch/arm/boot/dts/rockchip/rv1108-elgin-r1.dts

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Diff markup

Differences between /arch/arm/boot/dts/rockchip/rv1108-elgin-r1.dts (Version linux-6.12-rc7) and /arch/i386/boot/dts/rockchip/rv1108-elgin-r1.dts (Version linux-5.0.21)


  1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)     
  2                                                   
  3 /*                                                
  4  * Copyright (C) 2018 O.S. Systems Software LT    
  5  */                                               
  6                                                   
  7 /dts-v1/;                                         
  8                                                   
  9 #include "rv1108.dtsi"                            
 10                                                   
 11 / {                                               
 12         model = "Elgin RV1108 R1 board";          
 13         compatible = "elgin,rv1108-r1", "rockc    
 14                                                   
 15         aliases {                                 
 16                 mmc0 = &emmc;                     
 17         };                                        
 18                                                   
 19         memory@60000000 {                         
 20                 device_type = "memory";           
 21                 reg = <0x60000000 0x08000000>;    
 22         };                                        
 23                                                   
 24         chosen {                                  
 25                 stdout-path = "serial2:1500000    
 26         };                                        
 27                                                   
 28         vcc_sys: vsys-regulator {                 
 29                 compatible = "regulator-fixed"    
 30                 regulator-name = "vsys";          
 31                 regulator-min-microvolt = <500    
 32                 regulator-max-microvolt = <500    
 33                 regulator-boot-on;                
 34         };                                        
 35 };                                                
 36                                                   
 37 &cpu0 {                                           
 38         cpu-supply = <&vdd_core>;                 
 39 };                                                
 40                                                   
 41 &emmc {                                           
 42         bus-width = <8>;                          
 43         cap-mmc-highspeed;                        
 44         no-sd;                                    
 45         no-sdio;                                  
 46         non-removable;                            
 47         mmc-ddr-1_8v;                             
 48         mmc-hs200-1_8v;                           
 49         pinctrl-names = "default";                
 50         pinctrl-0 = <&emmc_clk &emmc_cmd &emmc    
 51         status = "okay";                          
 52 };                                                
 53                                                   
 54 &gmac {                                           
 55         clock_in_out = "output";                  
 56         pinctrl-names = "default";                
 57         pinctrl-0 = <&rmii_pins>;                 
 58         snps,reset-gpio = <&gpio1 RK_PC1 GPIO_    
 59         snps,reset-active-low;                    
 60         status = "okay";                          
 61 };                                                
 62                                                   
 63 &i2c0 {                                           
 64         clock-frequency = <400000>;               
 65         i2c-scl-rising-time-ns = <275>;           
 66         i2c-scl-falling-time-ns = <16>;           
 67         status = "okay";                          
 68                                                   
 69         rk805: pmic@18 {                          
 70                 compatible = "rockchip,rk805";    
 71                 reg = <0x18>;                     
 72                 interrupt-parent = <&gpio0>;      
 73                 interrupts = <RK_PB4 IRQ_TYPE_    
 74                 rockchip,system-power-controll    
 75                 #clock-cells = <0>;               
 76                                                   
 77                 vcc1-supply = <&vcc_sys>;         
 78                 vcc2-supply = <&vcc_sys>;         
 79                 vcc3-supply = <&vcc_sys>;         
 80                 vcc4-supply = <&vcc_sys>;         
 81                 vcc5-supply = <&vdd_buck2>;       
 82                 vcc6-supply = <&vdd_buck2>;       
 83                                                   
 84                 regulators {                      
 85                         vdd_core: DCDC_REG1 {     
 86                                 regulator-name    
 87                                 regulator-min-    
 88                                 regulator-max-    
 89                                 regulator-alwa    
 90                                 regulator-boot    
 91                                 regulator-stat    
 92                                         regula    
 93                                         regula    
 94                                 };                
 95                         };                        
 96                                                   
 97                         vdd_buck2: DCDC_REG2 {    
 98                                 regulator-name    
 99                                 regulator-min-    
100                                 regulator-max-    
101                                 regulator-alwa    
102                                 regulator-boot    
103                                 regulator-stat    
104                                         regula    
105                                 };                
106                         };                        
107                                                   
108                         vcc_ddr: DCDC_REG3 {      
109                                 regulator-name    
110                                 regulator-alwa    
111                                 regulator-boot    
112                                 regulator-stat    
113                                         regula    
114                                 };                
115                         };                        
116                                                   
117                         vcc_io: DCDC_REG4 {       
118                                 regulator-name    
119                                 regulator-min-    
120                                 regulator-max-    
121                                 regulator-alwa    
122                                 regulator-boot    
123                                 regulator-stat    
124                                         regula    
125                                         regula    
126                                 };                
127                         };                        
128                                                   
129                         vdd_10: LDO_REG1 {        
130                                 regulator-name    
131                                 regulator-min-    
132                                 regulator-max-    
133                                 regulator-alwa    
134                                 regulator-boot    
135                                 regulator-stat    
136                                         regula    
137                                 };                
138                         };                        
139                                                   
140                         vcc_18: LDO_REG2 {        
141                                 regulator-name    
142                                 regulator-min-    
143                                 regulator-max-    
144                                 regulator-alwa    
145                                 regulator-boot    
146                                 regulator-stat    
147                                         regula    
148                                 };                
149                         };                        
150                                                   
151                         vdd10_pmu: LDO_REG3 {     
152                                 regulator-name    
153                                 regulator-min-    
154                                 regulator-max-    
155                                 regulator-alwa    
156                                 regulator-boot    
157                                 regulator-stat    
158                                         regula    
159                                         regula    
160                                 };                
161                         };                        
162                 };                                
163         };                                        
164 };                                                
165                                                   
166 &spi {                                            
167         pinctrl-names = "default";                
168         pinctrl-0 = <&spim1_clk &spim1_cs0 &sp    
169         status = "okay";                          
170                                                   
171         display: display@0 {                      
172                 compatible = "elgin,jg10309-01    
173                 reg = <0>;                        
174                 spi-max-frequency = <24000000>    
175                 spi-cpha;                         
176                 spi-cpol;                         
177         };                                        
178 };                                                
179                                                   
180 &u2phy {                                          
181         status = "okay";                          
182                                                   
183         u2phy_host: host-port {                   
184                 status = "okay";                  
185         };                                        
186                                                   
187         u2phy_otg: otg-port {                     
188                 status = "okay";                  
189         };                                        
190 };                                                
191                                                   
192 &uart0 {                                          
193         pinctrl-names = "default";                
194         pinctrl-0 = <&uart0_xfer>;                
195         status = "okay";                          
196 };                                                
197                                                   
198 &uart2 {                                          
199         status = "okay";                          
200 };                                                
201                                                   
202 &usb_host_ehci {                                  
203         status = "okay";                          
204 };                                                
205                                                   
206 &usb_host_ohci {                                  
207         status = "okay";                          
208 };                                                
209                                                   
210 &usb_otg {                                        
211         status = "okay";                          
212 };                                                
                                                      

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