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Linux/arch/arm/boot/dts/samsung/exynos3250-artik5.dtsi

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Diff markup

Differences between /arch/arm/boot/dts/samsung/exynos3250-artik5.dtsi (Version linux-6.12-rc7) and /arch/i386/boot/dts/samsung/exynos3250-artik5.dtsi (Version linux-6.11.7)


  1 // SPDX-License-Identifier: GPL-2.0               
  2 /*                                                
  3  * Samsung's Exynos3250 based ARTIK5 module de    
  4  *                                                
  5  * Copyright (c) 2016 Samsung Electronics Co.,    
  6  *              http://www.samsung.com            
  7  *                                                
  8  * Device tree source file for Samsung's ARTIK    
  9  * Samsung Exynos3250 SoC.                        
 10  */                                               
 11                                                   
 12 #include "exynos3250.dtsi"                        
 13 #include <dt-bindings/clock/samsung,s2mps11.h>    
 14 #include <dt-bindings/gpio/gpio.h>                
 15 #include <dt-bindings/interrupt-controller/irq    
 16                                                   
 17 / {                                               
 18         compatible = "samsung,artik5", "samsun    
 19                                                   
 20         aliases {                                 
 21                 mmc0 = &mshc_0;                   
 22                 mmc1 = &mshc_1;                   
 23         };                                        
 24                                                   
 25         chosen {                                  
 26                 stdout-path = &serial_2;          
 27         };                                        
 28                                                   
 29         memory@40000000 {                         
 30                 device_type = "memory";           
 31                 reg = <0x40000000 0x1f800000>;    
 32         };                                        
 33                                                   
 34         firmware@205f000 {                        
 35                 compatible = "samsung,secure-f    
 36                 reg = <0x0205f000 0x1000>;        
 37         };                                        
 38                                                   
 39         thermal-zones {                           
 40                 cpu_thermal: cpu-thermal {        
 41                         cooling-maps {            
 42                                 map0 {            
 43                                         /* Cor    
 44                                         coolin    
 45                                                   
 46                                 };                
 47                                 map1 {            
 48                                         /* Cor    
 49                                         coolin    
 50                                                   
 51                                 };                
 52                         };                        
 53                 };                                
 54         };                                        
 55 };                                                
 56                                                   
 57 &adc {                                            
 58         vdd-supply = <&ldo7_reg>;                 
 59         assigned-clocks = <&cmu CLK_SCLK_TSADC    
 60         assigned-clock-rates = <6000000>;         
 61 };                                                
 62                                                   
 63 &cmu {                                            
 64         clocks = <&xusbxti>;                      
 65 };                                                
 66                                                   
 67 &cpu0 {                                           
 68         cpu0-supply = <&buck2_reg>;               
 69 };                                                
 70                                                   
 71 &gpu {                                            
 72         mali-supply = <&buck3_reg>;               
 73         status = "okay";                          
 74 };                                                
 75                                                   
 76 &i2c_0 {                                          
 77         #address-cells = <1>;                     
 78         #size-cells = <0>;                        
 79         samsung,i2c-sda-delay = <100>;            
 80         samsung,i2c-slave-addr = <0x10>;          
 81         samsung,i2c-max-bus-freq = <100000>;      
 82         status = "okay";                          
 83                                                   
 84         pmic@66 {                                 
 85                 compatible = "samsung,s2mps14-    
 86                 interrupt-parent = <&gpx3>;       
 87                 interrupts = <5 IRQ_TYPE_LEVEL    
 88                 pinctrl-names = "default";        
 89                 pinctrl-0 = <&s2mps14_irq>;       
 90                 reg = <0x66>;                     
 91                                                   
 92                 s2mps14_osc: clocks {             
 93                         compatible = "samsung,    
 94                         #clock-cells = <1>;       
 95                         clock-output-names = "    
 96                                 "s2mps14_bt";     
 97                 };                                
 98                                                   
 99                 regulators {                      
100                         ldo1_reg: LDO1 {          
101                                 /* VDD_ALIVE15    
102                                 regulator-name    
103                                 regulator-min-    
104                                 regulator-max-    
105                                 regulator-alwa    
106                         };                        
107                                                   
108                         ldo2_reg: LDO2 {          
109                                 /* VDDQM176 ~     
110                                 regulator-name    
111                                 regulator-min-    
112                                 regulator-max-    
113                                 regulator-alwa    
114                         };                        
115                                                   
116                         ldo3_reg: LDO3 {          
117                                 /*                
118                                  * VDD1_E106 ~    
119                                  * DVDD_RTC_AP    
120                                  */               
121                                 regulator-name    
122                                 regulator-min-    
123                                 regulator-max-    
124                                 regulator-alwa    
125                         };                        
126                                                   
127                         ldo4_reg: LDO4 {          
128                                 /*  AVDD_PLL11    
129                                 regulator-name    
130                                 regulator-min-    
131                                 regulator-max-    
132                                 regulator-alwa    
133                         };                        
134                                                   
135                         ldo5_reg: LDO5 {          
136                                 /* VDDI_PLL_IS    
137                                 regulator-name    
138                                 regulator-min-    
139                                 regulator-max-    
140                                 regulator-alwa    
141                         };                        
142                                                   
143                         ldo6_reg: LDO6 {          
144                                 /* VDD_USB, VD    
145                                 regulator-name    
146                                 regulator-min-    
147                                 regulator-max-    
148                                 regulator-alwa    
149                         };                        
150                                                   
151                         ldo7_reg: LDO7 {          
152                                 /*                
153                                  * VDD18P, AVD    
154                                  * AVDD_ADC, A    
155                                  */               
156                                 regulator-name    
157                                 regulator-min-    
158                                 regulator-max-    
159                                 regulator-alwa    
160                         };                        
161                                                   
162                         ldo8_reg: LDO8 {          
163                                 /* AVDD33_UOTG    
164                                 regulator-name    
165                                 regulator-min-    
166                                 regulator-max-    
167                                 regulator-alwa    
168                         };                        
169                                                   
170                         ldo9_reg: LDO9 {          
171                                 /* VDDQ_E86 ~     
172                                 regulator-name    
173                                 regulator-min-    
174                                 regulator-max-    
175                                 regulator-alwa    
176                         };                        
177                                                   
178                         ldo10_reg: LDO10 {        
179                                 regulator-name    
180                                 regulator-min-    
181                                 regulator-max-    
182                         };                        
183                                                   
184                         ldo11_reg: LDO11 {        
185                                 /* VDD74 ~ VDD    
186                                 regulator-name    
187                                 regulator-min-    
188                                 regulator-max-    
189                                 samsung,ext-co    
190                         };                        
191                                                   
192                         ldo12_reg: LDO12 {        
193                                 /* VDD72 ~ VDD    
194                                 regulator-name    
195                                 regulator-min-    
196                                 regulator-max-    
197                                 samsung,ext-co    
198                         };                        
199                                                   
200                         ldo13_reg: LDO13 {        
201                                 regulator-name    
202                                 regulator-min-    
203                                 regulator-max-    
204                         };                        
205                                                   
206                         ldo14_reg: LDO14 {        
207                                 regulator-name    
208                                 regulator-min-    
209                                 regulator-max-    
210                         };                        
211                                                   
212                         ldo15_reg: LDO15 {        
213                                 regulator-name    
214                                 regulator-min-    
215                                 regulator-max-    
216                         };                        
217                                                   
218                         ldo16_reg: LDO16 {        
219                                 regulator-name    
220                                 regulator-min-    
221                                 regulator-max-    
222                         };                        
223                                                   
224                         ldo17_reg: LDO17 {        
225                                 regulator-name    
226                                 regulator-min-    
227                                 regulator-max-    
228                         };                        
229                                                   
230                         ldo18_reg: LDO18 {        
231                                 /* DVDD_MMC2_A    
232                                 regulator-name    
233                                 regulator-min-    
234                                 regulator-max-    
235                         };                        
236                                                   
237                         ldo19_reg: LDO19 {        
238                                 regulator-name    
239                                 regulator-min-    
240                                 regulator-max-    
241                         };                        
242                                                   
243                         ldo20_reg: LDO20 {        
244                                 regulator-name    
245                                 regulator-min-    
246                                 regulator-max-    
247                         };                        
248                                                   
249                         ldo21_reg: LDO21 {        
250                                 regulator-name    
251                                 regulator-min-    
252                                 regulator-max-    
253                         };                        
254                                                   
255                         ldo22_reg: LDO22 {        
256                                 regulator-name    
257                                 regulator-min-    
258                                 regulator-max-    
259                         };                        
260                                                   
261                         ldo23_reg: LDO23 {        
262                                 /* Xi2c3_SDA/S    
263                                 regulator-name    
264                                 regulator-min-    
265                                 regulator-max-    
266                                 regulator-alwa    
267                         };                        
268                                                   
269                         ldo24_reg: LDO24 {        
270                                 regulator-name    
271                                 regulator-min-    
272                                 regulator-max-    
273                         };                        
274                                                   
275                         ldo25_reg: LDO25 {        
276                                 regulator-name    
277                                 regulator-min-    
278                                 regulator-max-    
279                         };                        
280                                                   
281                         buck1_reg: BUCK1 {        
282                                 /* VDD_MIF */     
283                                 regulator-name    
284                                 regulator-min-    
285                                 regulator-max-    
286                                 regulator-alwa    
287                         };                        
288                                                   
289                         buck2_reg: BUCK2 {        
290                                 /* VDD_CPU */     
291                                 regulator-name    
292                                 regulator-min-    
293                                 regulator-max-    
294                                 regulator-alwa    
295                         };                        
296                                                   
297                         buck3_reg: BUCK3 {        
298                                 /* VDD_G3D */     
299                                 regulator-name    
300                                 regulator-min-    
301                                 regulator-max-    
302                                 regulator-alwa    
303                         };                        
304                                                   
305                         buck4_reg: BUCK4 {        
306                                 regulator-name    
307                                 regulator-min-    
308                                 regulator-max-    
309                                 regulator-alwa    
310                         };                        
311                                                   
312                         buck5_reg: BUCK5 {        
313                                 regulator-name    
314                                 regulator-min-    
315                                 regulator-max-    
316                                 regulator-alwa    
317                         };                        
318                 };                                
319         };                                        
320 };                                                
321                                                   
322 &mshc_0 {                                         
323         non-removable;                            
324         cap-mmc-highspeed;                        
325         card-detect-delay = <200>;                
326         vmmc-supply = <&ldo12_reg>;               
327         clock-frequency = <100000000>;            
328         max-frequency = <100000000>;              
329         mmc-ddr-1_8v;                             
330         samsung,dw-mshc-ciu-div = <1>;            
331         samsung,dw-mshc-sdr-timing = <0 1>;       
332         samsung,dw-mshc-ddr-timing = <1 2>;       
333         pinctrl-names = "default";                
334         pinctrl-0 = <&sd0_cmd &sd0_bus1 &sd0_b    
335         bus-width = <8>;                          
336         status = "okay";                          
337 };                                                
338                                                   
339 &mshc_1 {                                         
340         cap-sd-highspeed;                         
341         cap-sdio-irq;                             
342         disable-wp;                               
343         non-removable;                            
344         keep-power-in-suspend;                    
345         fifo-depth = <0x40>;                      
346         vqmmc-supply = <&ldo11_reg>;              
347         /*                                        
348          * Voltage negotiation is broken for t    
349          * can't actually set the voltage here    
350          * vmmc-supply = <&ldo23_reg>;            
351          */                                       
352         card-detect-delay = <500>;                
353         clock-frequency = <100000000>;            
354         max-frequency = <100000000>;              
355         samsung,dw-mshc-ciu-div = <3>;            
356         samsung,dw-mshc-sdr-timing = <0 1>;       
357         samsung,dw-mshc-ddr-timing = <1 2>;       
358         pinctrl-names = "default";                
359         pinctrl-0 = <&sd1_cmd &sd1_clk &sd1_bu    
360         bus-width = <4>;                          
361         status = "okay";                          
362 };                                                
363                                                   
364 &pinctrl_1 {                                      
365         bten: bten-pins {                         
366                 samsung,pins = "gpx1-7";          
367                 samsung,pin-function = <EXYNOS    
368                 samsung,pin-pud = <EXYNOS_PIN_    
369                 samsung,pin-con-pdn = <EXYNOS_    
370                 samsung,pin-pud-pdn = <EXYNOS_    
371         };                                        
372                                                   
373         wlanen: wlanen-pins {                     
374                 samsung,pins = "gpx2-3";          
375                 samsung,pin-function = <EXYNOS    
376                 samsung,pin-pud = <EXYNOS_PIN_    
377                 samsung,pin-drv = <EXYNOS4_PIN    
378                 samsung,pin-val = <1>;            
379         };                                        
380                                                   
381         s2mps14_irq: s2mps14-irq-pins {           
382                 samsung,pins = "gpx3-5";          
383                 samsung,pin-pud = <EXYNOS_PIN_    
384         };                                        
385                                                   
386         bthostwake: bthostwake-pins {             
387                 samsung,pins = "gpx3-6";          
388                 samsung,pin-function = <EXYNOS    
389                 samsung,pin-pud = <EXYNOS_PIN_    
390                 samsung,pin-con-pdn = <EXYNOS_    
391                 samsung,pin-pud-pdn = <EXYNOS_    
392         };                                        
393                                                   
394         btwake: btwake-pins {                     
395                 samsung,pins = "gpx3-7";          
396                 samsung,pin-function = <EXYNOS    
397                 samsung,pin-pud = <EXYNOS_PIN_    
398                 samsung,pin-con-pdn = <EXYNOS_    
399                 samsung,pin-pud-pdn = <EXYNOS_    
400         };                                        
401 };                                                
402                                                   
403 &rtc {                                            
404         clocks = <&cmu CLK_RTC>, <&s2mps14_osc    
405         clock-names = "rtc", "rtc_src";           
406         status = "okay";                          
407 };                                                
408                                                   
409 &serial_0 {                                       
410         assigned-clocks = <&cmu CLK_SCLK_UART0    
411         assigned-clock-rates = <100000000>;       
412         status = "okay";                          
413                                                   
414         bluetooth {                               
415                 compatible = "brcm,bcm4330-bt"    
416                 pinctrl-names = "default";        
417                 pinctrl-0 = <&bten &btwake &bt    
418                 max-speed = <3000000>;            
419                 shutdown-gpios = <&gpx1 7 GPIO    
420                 device-wakeup-gpios = <&gpx3 7    
421                 host-wakeup-gpios = <&gpx3 6 G    
422                 clocks = <&s2mps14_osc S2MPS11    
423         };                                        
424 };                                                
425                                                   
426 &tmu {                                            
427         status = "okay";                          
428 };                                                
429                                                   
430 &xusbxti {                                        
431         clock-frequency = <24000000>;             
432 };                                                
                                                      

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