1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Samsung's Exynos4210 based Origen board dev
4 *
5 * Copyright (c) 2010-2011 Samsung Electronics
6 * http://www.samsung.com
7 * Copyright (c) 2010-2011 Linaro Ltd.
8 * www.linaro.org
9 *
10 * Device tree source file for Insignal's Orig
11 * Samsung's Exynos4210 SoC.
12 */
13
14 /dts-v1/;
15 #include "exynos4210.dtsi"
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/input/input.h>
18 #include <dt-bindings/leds/common.h>
19 #include "exynos-mfc-reserved-memory.dtsi"
20
21 / {
22 model = "Insignal Origen evaluation bo
23 compatible = "insignal,origen", "samsu
24
25 memory@40000000 {
26 device_type = "memory";
27 reg = <0x40000000 0x10000000
28 0x50000000 0x10000000
29 0x60000000 0x10000000
30 0x70000000 0x10000000>;
31 };
32
33 aliases {
34 mmc0 = &sdhci_0;
35 mmc1 = &sdhci_2;
36 };
37
38 chosen {
39 bootargs = "root=/dev/ram0 rw
40 stdout-path = "serial2:115200n
41 };
42
43 mmc_reg: voltage-regulator {
44 compatible = "regulator-fixed"
45 regulator-name = "VMEM_VDD_2.8
46 regulator-min-microvolt = <280
47 regulator-max-microvolt = <280
48 gpio = <&gpx1 1 GPIO_ACTIVE_HI
49 enable-active-high;
50 };
51
52 gpio-keys {
53 compatible = "gpio-keys";
54
55 key-up {
56 label = "Up";
57 gpios = <&gpx2 0 GPIO_
58 linux,code = <KEY_UP>;
59 wakeup-source;
60 };
61
62 key-down {
63 label = "Down";
64 gpios = <&gpx2 1 GPIO_
65 linux,code = <KEY_DOWN
66 wakeup-source;
67 };
68
69 key-back {
70 label = "Back";
71 gpios = <&gpx1 7 GPIO_
72 linux,code = <KEY_BACK
73 wakeup-source;
74 };
75
76 key-home {
77 label = "Home";
78 gpios = <&gpx1 6 GPIO_
79 linux,code = <KEY_HOME
80 wakeup-source;
81 };
82
83 key-menu {
84 label = "Menu";
85 gpios = <&gpx1 5 GPIO_
86 linux,code = <KEY_MENU
87 wakeup-source;
88 };
89 };
90
91 leds {
92 compatible = "gpio-leds";
93 led-status {
94 gpios = <&gpx1 3 GPIO_
95 function = LED_FUNCTIO
96 linux,default-trigger
97 };
98 };
99
100 fixed-rate-clocks {
101 xxti {
102 compatible = "samsung,
103 clock-frequency = <0>;
104 };
105
106 xusbxti {
107 compatible = "samsung,
108 clock-frequency = <240
109 };
110
111 pmic_ap_clk: pmic-ap-clk {
112 /* Workaround for miss
113 compatible = "fixed-cl
114 #clock-cells = <0>;
115 clock-frequency = <327
116 };
117 };
118
119 display-timings {
120 native-mode = <&timing0>;
121 timing0: timing {
122 clock-frequency = <475
123 hactive = <1024>;
124 vactive = <600>;
125 hfront-porch = <64>;
126 hback-porch = <16>;
127 hsync-len = <48>;
128 vback-porch = <64>;
129 vfront-porch = <16>;
130 vsync-len = <3>;
131 };
132 };
133 };
134
135 &cpu0 {
136 cpu0-supply = <&buck1_reg>;
137 };
138
139 &cpu_thermal {
140 cooling-maps {
141 map0 {
142 /* Corresponds to 800M
143 cooling-device = <&cpu
144 };
145 map1 {
146 /* Corresponds to 200M
147 cooling-device = <&cpu
148 };
149 };
150 };
151
152 &exynos_usbphy {
153 status = "okay";
154 };
155
156 &fimd {
157 pinctrl-0 = <&lcd_en &lcd_clk &lcd_dat
158 pinctrl-names = "default";
159 status = "okay";
160 };
161
162 &gpu {
163 mali-supply = <&buck3_reg>;
164 status = "okay";
165 };
166
167 &hsotg {
168 vusb_d-supply = <&ldo3_reg>;
169 vusb_a-supply = <&ldo8_reg>;
170 dr_mode = "peripheral";
171 status = "okay";
172 };
173
174 &i2c_0 {
175 status = "okay";
176 samsung,i2c-sda-delay = <100>;
177 samsung,i2c-max-bus-freq = <20000>;
178 pinctrl-0 = <&i2c0_bus>;
179 pinctrl-names = "default";
180
181 pmic@66 {
182 compatible = "maxim,max8997-pm
183 reg = <0x66>;
184 interrupt-parent = <&gpx0>;
185 interrupts = <4 IRQ_TYPE_NONE>
186 pinctrl-names = "default";
187 pinctrl-0 = <&max8997_irq>;
188
189 max8997,pmic-buck1-dvs-voltage
190 max8997,pmic-buck2-dvs-voltage
191 max8997,pmic-buck5-dvs-voltage
192
193 regulators {
194 ldo1_reg: LDO1 {
195 regulator-name
196 regulator-min-
197 regulator-max-
198 };
199
200 ldo2_reg: LDO2 {
201 regulator-name
202 regulator-min-
203 regulator-max-
204 regulator-alwa
205 };
206
207 ldo3_reg: LDO3 {
208 regulator-name
209 regulator-min-
210 regulator-max-
211 };
212
213 ldo4_reg: LDO4 {
214 regulator-name
215 regulator-min-
216 regulator-max-
217 regulator-alwa
218 };
219
220 ldo6_reg: LDO6 {
221 regulator-name
222 regulator-min-
223 regulator-max-
224 regulator-alwa
225 };
226
227 ldo7_reg: LDO7 {
228 regulator-name
229 regulator-min-
230 regulator-max-
231 };
232
233 ldo8_reg: LDO8 {
234 regulator-name
235 regulator-min-
236 regulator-max-
237 };
238
239 ldo9_reg: LDO9 {
240 regulator-name
241 regulator-min-
242 regulator-max-
243 regulator-alwa
244 };
245
246 ldo10_reg: LDO10 {
247 regulator-name
248 regulator-min-
249 regulator-max-
250 regulator-alwa
251 };
252
253 ldo11_reg: LDO11 {
254 regulator-name
255 regulator-min-
256 regulator-max-
257 };
258
259 ldo14_reg: LDO14 {
260 regulator-name
261 regulator-min-
262 regulator-max-
263 regulator-alwa
264 };
265
266 ldo17_reg: LDO17 {
267 regulator-name
268 regulator-min-
269 regulator-max-
270 regulator-alwa
271 };
272
273 ldo21_reg: LDO21 {
274 regulator-name
275 regulator-min-
276 regulator-max-
277 regulator-alwa
278 };
279
280 buck1_reg: BUCK1 {
281 regulator-name
282 regulator-min-
283 regulator-max-
284 regulator-alwa
285 regulator-boot
286 };
287
288 buck2_reg: BUCK2 {
289 regulator-name
290 regulator-min-
291 regulator-max-
292 regulator-alwa
293 regulator-boot
294 };
295
296 buck3_reg: BUCK3 {
297 regulator-name
298 regulator-min-
299 regulator-max-
300 };
301
302 buck5_reg: BUCK5 {
303 regulator-name
304 regulator-min-
305 regulator-max-
306 regulator-alwa
307 };
308
309 buck7_reg: BUCK7 {
310 regulator-name
311 regulator-min-
312 regulator-max-
313 regulator-boot
314 regulator-alwa
315 };
316
317 EN32KHZ_AP {
318 regulator-name
319 regulator-alwa
320 };
321 };
322 };
323 };
324
325 &pinctrl_1 {
326 max8997_irq: max8997-irq-pins {
327 samsung,pins = "gpx0-3", "gpx0
328 samsung,pin-pud = <EXYNOS_PIN_
329 };
330 };
331
332 &sdhci_0 {
333 bus-width = <4>;
334 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bu
335 pinctrl-names = "default";
336 vmmc-supply = <&mmc_reg>;
337 status = "okay";
338 };
339
340 &sdhci_2 {
341 bus-width = <4>;
342 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bu
343 pinctrl-names = "default";
344 vmmc-supply = <&mmc_reg>;
345 status = "okay";
346 };
347
348 &serial_0 {
349 status = "okay";
350 };
351
352 &serial_1 {
353 status = "okay";
354 };
355
356 &serial_2 {
357 status = "okay";
358 };
359
360 &serial_3 {
361 status = "okay";
362 };
363
364 &rtc {
365 status = "okay";
366 clocks = <&clock CLK_RTC>, <&pmic_ap_c
367 clock-names = "rtc", "rtc_src";
368 };
369
370 &tmu {
371 status = "okay";
372 };
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