1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Samsung's S3C64xx SoC series common device
4 *
5 * Copyright (c) 2013 Tomasz Figa <tomasz.figa@
6 *
7 * Samsung's S3C64xx SoC series device nodes a
8 * Particular SoCs from S3C64xx series can inc
9 * values for SoCs specific bindings.
10 *
11 * Note: This file does not include device nod
12 * S3C64xx SoCs. As device tree coverage for S
13 * nodes can be added to this file.
14 */
15
16 #include <dt-bindings/clock/samsung,s3c64xx-cl
17
18 / {
19 #address-cells = <1>;
20 #size-cells = <1>;
21
22 aliases {
23 i2c0 = &i2c0;
24 pinctrl0 = &pinctrl0;
25 serial0 = &uart0;
26 serial1 = &uart1;
27 serial2 = &uart2;
28 serial3 = &uart3;
29 };
30
31 cpus {
32 #address-cells = <1>;
33 #size-cells = <0>;
34
35 cpu@0 {
36 device_type = "cpu";
37 compatible = "arm,arm1
38 reg = <0x0>;
39 };
40 };
41
42 soc: soc {
43 compatible = "simple-bus";
44 #address-cells = <1>;
45 #size-cells = <1>;
46 ranges;
47
48 vic0: interrupt-controller@712
49 compatible = "arm,pl19
50 interrupt-controller;
51 reg = <0x71200000 0x10
52 #interrupt-cells = <1>
53 };
54
55 vic1: interrupt-controller@713
56 compatible = "arm,pl19
57 interrupt-controller;
58 reg = <0x71300000 0x10
59 #interrupt-cells = <1>
60 };
61
62 sdhci0: mmc@7c200000 {
63 compatible = "samsung,
64 reg = <0x7c200000 0x10
65 interrupt-parent = <&v
66 interrupts = <24>;
67 clock-names = "hsmmc",
68 clocks = <&clocks HCLK
69 <&cloc
70 status = "disabled";
71 };
72
73 sdhci1: mmc@7c300000 {
74 compatible = "samsung,
75 reg = <0x7c300000 0x10
76 interrupt-parent = <&v
77 interrupts = <25>;
78 clock-names = "hsmmc",
79 clocks = <&clocks HCLK
80 <&cloc
81 status = "disabled";
82 };
83
84 sdhci2: mmc@7c400000 {
85 compatible = "samsung,
86 reg = <0x7c400000 0x10
87 interrupt-parent = <&v
88 interrupts = <17>;
89 clock-names = "hsmmc",
90 clocks = <&clocks HCLK
91 <&cloc
92 status = "disabled";
93 };
94
95 watchdog: watchdog@7e004000 {
96 compatible = "samsung,
97 reg = <0x7e004000 0x10
98 interrupt-parent = <&v
99 interrupts = <26>;
100 clock-names = "watchdo
101 clocks = <&clocks PCLK
102 };
103
104 i2c0: i2c@7f004000 {
105 compatible = "samsung,
106 reg = <0x7f004000 0x10
107 interrupt-parent = <&v
108 interrupts = <18>;
109 clock-names = "i2c";
110 clocks = <&clocks PCLK
111 status = "disabled";
112 #address-cells = <1>;
113 #size-cells = <0>;
114 };
115
116 uart0: serial@7f005000 {
117 compatible = "samsung,
118 reg = <0x7f005000 0x10
119 interrupt-parent = <&v
120 interrupts = <5>;
121 clock-names = "uart",
122 "clk_u
123 clocks = <&clocks PCLK
124 <&cloc
125 status = "disabled";
126 };
127
128 uart1: serial@7f005400 {
129 compatible = "samsung,
130 reg = <0x7f005400 0x10
131 interrupt-parent = <&v
132 interrupts = <6>;
133 clock-names = "uart",
134 "clk_u
135 clocks = <&clocks PCLK
136 <&cloc
137 status = "disabled";
138 };
139
140 uart2: serial@7f005800 {
141 compatible = "samsung,
142 reg = <0x7f005800 0x10
143 interrupt-parent = <&v
144 interrupts = <7>;
145 clock-names = "uart",
146 "clk_u
147 clocks = <&clocks PCLK
148 <&cloc
149 status = "disabled";
150 };
151
152 uart3: serial@7f005c00 {
153 compatible = "samsung,
154 reg = <0x7f005c00 0x10
155 interrupt-parent = <&v
156 interrupts = <8>;
157 clock-names = "uart",
158 "clk_u
159 clocks = <&clocks PCLK
160 <&cloc
161 status = "disabled";
162 };
163
164 pwm: pwm@7f006000 {
165 compatible = "samsung,
166 reg = <0x7f006000 0x10
167 interrupt-parent = <&v
168 interrupts = <23>, <24
169 clock-names = "timers"
170 clocks = <&clocks PCLK
171 samsung,pwm-outputs =
172 #pwm-cells = <3>;
173 };
174
175 pinctrl0: pinctrl@7f008000 {
176 compatible = "samsung,
177 reg = <0x7f008000 0x10
178 interrupt-parent = <&v
179 interrupts = <21>;
180
181 wakeup-interrupt-contr
182 compatible = "
183 interrupts-ext
184
185
186
187 };
188 };
189 };
190 };
191
192 #include "s3c64xx-pinctrl.dtsi"
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