1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * DTS file for all SPEAr1310 SoCs
4 *
5 * Copyright 2012 Viresh Kumar <vireshk@kernel.
6 */
7
8 /include/ "spear13xx.dtsi"
9
10 / {
11 compatible = "st,spear1310";
12
13 ahb {
14 spics: spics@e0700000 {
15 compatible = "st,spear
16 reg = <0xe0700000 0x10
17 st-spics,peripcfg-reg
18 st-spics,sw-enable-bit
19 st-spics,cs-value-bit
20 st-spics,cs-enable-mas
21 st-spics,cs-enable-shi
22 gpio-controller;
23 #gpio-cells = <2>;
24 };
25
26 miphy0: miphy@eb800000 {
27 compatible = "st,spear
28 reg = <0xeb800000 0x40
29 misc = <&misc>;
30 phy-id = <0>;
31 #phy-cells = <1>;
32 status = "disabled";
33 };
34
35 miphy1: miphy@eb804000 {
36 compatible = "st,spear
37 reg = <0xeb804000 0x40
38 misc = <&misc>;
39 phy-id = <1>;
40 #phy-cells = <1>;
41 status = "disabled";
42 };
43
44 miphy2: miphy@eb808000 {
45 compatible = "st,spear
46 reg = <0xeb808000 0x40
47 misc = <&misc>;
48 phy-id = <2>;
49 #phy-cells = <1>;
50 status = "disabled";
51 };
52
53 ahci0: ahci@b1000000 {
54 compatible = "snps,spe
55 reg = <0xb1000000 0x10
56 interrupts = <0 68 0x4
57 phys = <&miphy0 0>;
58 phy-names = "sata-phy"
59 status = "disabled";
60 };
61
62 ahci1: ahci@b1800000 {
63 compatible = "snps,spe
64 reg = <0xb1800000 0x10
65 interrupts = <0 69 0x4
66 phys = <&miphy1 0>;
67 phy-names = "sata-phy"
68 status = "disabled";
69 };
70
71 ahci2: ahci@b4000000 {
72 compatible = "snps,spe
73 reg = <0xb4000000 0x10
74 interrupts = <0 70 0x4
75 phys = <&miphy2 0>;
76 phy-names = "sata-phy"
77 status = "disabled";
78 };
79
80 pcie0: pcie@b1000000 {
81 compatible = "st,spear
82 reg = <0xb1000000 0x40
83 reg-names = "dbi", "co
84 interrupts = <0 68 0x4
85 num-lanes = <1>;
86 phys = <&miphy0 1>;
87 phy-names = "pcie-phy"
88 #address-cells = <3>;
89 #size-cells = <2>;
90 device_type = "pci";
91 ranges = <0x81000000 0
92 0x82000000 0 0
93 bus-range = <0x00 0xff
94 status = "disabled";
95 };
96
97 pcie1: pcie@b1800000 {
98 compatible = "st,spear
99 reg = <0xb1800000 0x40
100 reg-names = "dbi", "co
101 interrupts = <0 69 0x4
102 num-lanes = <1>;
103 phys = <&miphy1 1>;
104 phy-names = "pcie-phy"
105 #address-cells = <3>;
106 #size-cells = <2>;
107 device_type = "pci";
108 ranges = <0x81000000 0
109 0x82000000 0 0
110 bus-range = <0x00 0xff
111 status = "disabled";
112 };
113
114 pcie2: pcie@b4000000 {
115 compatible = "st,spear
116 reg = <0xb4000000 0x40
117 reg-names = "dbi", "co
118 interrupts = <0 70 0x4
119 num-lanes = <1>;
120 phys = <&miphy2 1>;
121 phy-names = "pcie-phy"
122 #address-cells = <3>;
123 #size-cells = <2>;
124 device_type = "pci";
125 ranges = <0x81000000 0
126 0x82000000 0 0
127 bus-range = <0x00 0xff
128 status = "disabled";
129 };
130
131 gmac1: eth@5c400000 {
132 compatible = "st,spear
133 reg = <0x5c400000 0x80
134 interrupts = <0 95 0x4
135 interrupt-names = "mac
136 phy-mode = "mii";
137 status = "disabled";
138 };
139
140 gmac2: eth@5c500000 {
141 compatible = "st,spear
142 reg = <0x5c500000 0x80
143 interrupts = <0 96 0x4
144 interrupt-names = "mac
145 phy-mode = "mii";
146 status = "disabled";
147 };
148
149 gmac3: eth@5c600000 {
150 compatible = "st,spear
151 reg = <0x5c600000 0x80
152 interrupts = <0 97 0x4
153 interrupt-names = "mac
154 phy-mode = "rmii";
155 status = "disabled";
156 };
157
158 gmac4: eth@5c700000 {
159 compatible = "st,spear
160 reg = <0x5c700000 0x80
161 interrupts = <0 98 0x4
162 interrupt-names = "mac
163 phy-mode = "rgmii";
164 status = "disabled";
165 };
166
167 pinmux: pinmux@e0700000 {
168 compatible = "st,spear
169 reg = <0xe0700000 0x10
170 #gpio-range-cells = <3
171 };
172
173 apb {
174 i2c1: i2c@5cd00000 {
175 #address-cells
176 #size-cells =
177 compatible = "
178 reg = <0x5cd00
179 interrupts = <
180 status = "disa
181 };
182
183 i2c2: i2c@5ce00000 {
184 #address-cells
185 #size-cells =
186 compatible = "
187 reg = <0x5ce00
188 interrupts = <
189 status = "disa
190 };
191
192 i2c3: i2c@5cf00000 {
193 #address-cells
194 #size-cells =
195 compatible = "
196 reg = <0x5cf00
197 interrupts = <
198 status = "disa
199 };
200
201 i2c4: i2c@5d000000 {
202 #address-cells
203 #size-cells =
204 compatible = "
205 reg = <0x5d000
206 interrupts = <
207 status = "disa
208 };
209
210 i2c5: i2c@5d100000 {
211 #address-cells
212 #size-cells =
213 compatible = "
214 reg = <0x5d100
215 interrupts = <
216 status = "disa
217 };
218
219 i2c6: i2c@5d200000 {
220 #address-cells
221 #size-cells =
222 compatible = "
223 reg = <0x5d200
224 interrupts = <
225 status = "disa
226 };
227
228 i2c7: i2c@5d300000 {
229 #address-cells
230 #size-cells =
231 compatible = "
232 reg = <0x5d300
233 interrupts = <
234 status = "disa
235 };
236
237 spi1: spi@5d400000 {
238 compatible = "
239 reg = <0x5d400
240 interrupts = <
241 #address-cells
242 #size-cells =
243 status = "disa
244 };
245
246 serial@5c800000 {
247 compatible = "
248 reg = <0x5c800
249 interrupts = <
250 status = "disa
251 };
252
253 serial@5c900000 {
254 compatible = "
255 reg = <0x5c900
256 interrupts = <
257 status = "disa
258 };
259
260 serial@5ca00000 {
261 compatible = "
262 reg = <0x5ca00
263 interrupts = <
264 status = "disa
265 };
266
267 serial@5cb00000 {
268 compatible = "
269 reg = <0x5cb00
270 interrupts = <
271 status = "disa
272 };
273
274 serial@5cc00000 {
275 compatible = "
276 reg = <0x5cc00
277 interrupts = <
278 status = "disa
279 };
280
281 thermal@e07008c4 {
282 st,thermal-fla
283 };
284
285 gpiopinctrl: gpio@d840
286 compatible = "
287 reg = <0xd8400
288 interrupts = <
289 #interrupt-cel
290 interrupt-cont
291 gpio-controlle
292 #gpio-cells =
293 gpio-ranges =
294 status = "disa
295
296 st-plgpio,ngpi
297 st-plgpio,enb-
298 st-plgpio,wdat
299 st-plgpio,dir-
300 st-plgpio,ie-r
301 st-plgpio,rdat
302 st-plgpio,mis-
303 st-plgpio,eit-
304 };
305 };
306 };
307 };
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.