1 /*
2 * Copyright 2017 - Alexandre Torgue <alexandre
3 *
4 * This file is dual-licensed: you can use it
5 * of the GPL or the X11 license, at your opti
6 * licensing only applies to this file, and no
7 * whole.
8 *
9 * a) This file is free software; you can red
10 * modify it under the terms of the GNU Ge
11 * published by the Free Software Foundati
12 * License, or (at your option) any later
13 *
14 * This file is distributed in the hope th
15 * but WITHOUT ANY WARRANTY; without even
16 * MERCHANTABILITY or FITNESS FOR A PARTIC
17 * GNU General Public License for more det
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of c
22 * obtaining a copy of this software and a
23 * files (the "Software"), to deal in the
24 * restriction, including without limitati
25 * copy, modify, merge, publish, distribut
26 * sell copies of the Software, and to per
27 * Software is furnished to do so, subject
28 * conditions:
29 *
30 * The above copyright notice and this per
31 * included in all copies or substantial p
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHO
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT L
35 * OF MERCHANTABILITY, FITNESS FOR A PARTI
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGE
38 * WHETHER IN AN ACTION OF CONTRACT, TORT
39 * FROM, OUT OF OR IN CONNECTION WITH THE
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
44 #include <dt-bindings/mfd/stm32f4-rcc.h>
45
46 / {
47 soc {
48 pinctrl: pinctrl@40020000 {
49 #address-cells = <1>;
50 #size-cells = <1>;
51 ranges = <0 0x40020000
52 interrupt-parent = <&e
53 st,syscfg = <&syscfg 0
54
55 gpioa: gpio@40020000 {
56 gpio-controlle
57 #gpio-cells =
58 interrupt-cont
59 #interrupt-cel
60 reg = <0x0 0x4
61 clocks = <&rcc
62 st,bank-name =
63 };
64
65 gpiob: gpio@40020400 {
66 gpio-controlle
67 #gpio-cells =
68 interrupt-cont
69 #interrupt-cel
70 reg = <0x400 0
71 clocks = <&rcc
72 st,bank-name =
73 };
74
75 gpioc: gpio@40020800 {
76 gpio-controlle
77 #gpio-cells =
78 interrupt-cont
79 #interrupt-cel
80 reg = <0x800 0
81 clocks = <&rcc
82 st,bank-name =
83 };
84
85 gpiod: gpio@40020c00 {
86 gpio-controlle
87 #gpio-cells =
88 interrupt-cont
89 #interrupt-cel
90 reg = <0xc00 0
91 clocks = <&rcc
92 st,bank-name =
93 };
94
95 gpioe: gpio@40021000 {
96 gpio-controlle
97 #gpio-cells =
98 interrupt-cont
99 #interrupt-cel
100 reg = <0x1000
101 clocks = <&rcc
102 st,bank-name =
103 };
104
105 gpiof: gpio@40021400 {
106 gpio-controlle
107 #gpio-cells =
108 interrupt-cont
109 #interrupt-cel
110 reg = <0x1400
111 clocks = <&rcc
112 st,bank-name =
113 };
114
115 gpiog: gpio@40021800 {
116 gpio-controlle
117 #gpio-cells =
118 interrupt-cont
119 #interrupt-cel
120 reg = <0x1800
121 clocks = <&rcc
122 st,bank-name =
123 };
124
125 gpioh: gpio@40021c00 {
126 gpio-controlle
127 #gpio-cells =
128 interrupt-cont
129 #interrupt-cel
130 reg = <0x1c00
131 clocks = <&rcc
132 st,bank-name =
133 };
134
135 gpioi: gpio@40022000 {
136 gpio-controlle
137 #gpio-cells =
138 interrupt-cont
139 #interrupt-cel
140 reg = <0x2000
141 clocks = <&rcc
142 st,bank-name =
143 };
144
145 gpioj: gpio@40022400 {
146 gpio-controlle
147 #gpio-cells =
148 interrupt-cont
149 #interrupt-cel
150 reg = <0x2400
151 clocks = <&rcc
152 st,bank-name =
153 };
154
155 gpiok: gpio@40022800 {
156 gpio-controlle
157 #gpio-cells =
158 interrupt-cont
159 #interrupt-cel
160 reg = <0x2800
161 clocks = <&rcc
162 st,bank-name =
163 };
164
165 usart1_pins_a: usart1-
166 pins1 {
167 pinmux
168 bias-d
169 drive-
170 slew-r
171 };
172 pins2 {
173 pinmux
174 bias-d
175 };
176 };
177
178 usart3_pins_a: usart3-
179 pins1 {
180 pinmux
181 bias-d
182 drive-
183 slew-r
184 };
185 pins2 {
186 pinmux
187 bias-d
188 };
189 };
190
191 usbotg_fs_pins_a: usbo
192 pins {
193 pinmux
194
195
196 bias-d
197 drive-
198 slew-r
199 };
200 };
201
202 usbotg_fs_pins_b: usbo
203 pins {
204 pinmux
205
206
207 bias-d
208 drive-
209 slew-r
210 };
211 };
212
213 usbotg_hs_pins_a: usbo
214 pins {
215 pinmux
216
217
218
219
220
221
222
223
224
225
226
227 bias-d
228 drive-
229 slew-r
230 };
231 };
232
233 ethernet_mii: mii-0 {
234 pins {
235 pinmux
236
237
238
239
240
241
242
243
244
245
246
247
248
249 slew-r
250 };
251 };
252
253 adc3_in8_pin: adc-200
254 pins {
255 pinmux
256 };
257 };
258
259 pwm1_pins: pwm1-0 {
260 pins {
261 pinmux
262
263
264 };
265 };
266
267 pwm3_pins: pwm3-0 {
268 pins {
269 pinmux
270
271 };
272 };
273
274 i2c1_pins: i2c1-0 {
275 pins {
276 pinmux
277
278 bias-d
279 drive-
280 slew-r
281 };
282 };
283
284 ltdc_pins_a: ltdc-0 {
285 pins {
286 pinmux
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314 slew-r
315 };
316 };
317
318 ltdc_pins_b: ltdc-1 {
319 pins {
320 pinmux
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364 slew-r
365 };
366 };
367
368 spi5_pins: spi5-0 {
369 pins1 {
370 pinmux
371
372
373
374 bias-d
375 drive-
376 slew-r
377 };
378 pins2 {
379 pinmux
380
381 bias-d
382 };
383 };
384
385 i2c3_pins: i2c3-0 {
386 pins {
387 pinmux
388
389
390
391 bias-d
392 drive-
393 slew-r
394 };
395 };
396
397 dcmi_pins: dcmi-0 {
398 pins {
399 pinmux
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414 bias-d
415 drive-
416 slew-r
417 };
418 };
419
420 sdio_pins: sdio-pins-0
421 pins {
422 pinmux
423
424
425
426
427
428 drive-
429 slew-r
430 };
431 };
432
433 sdio_pins_od: sdio-pin
434 pins1 {
435 pinmux
436
437
438
439
440 drive-
441 slew-r
442 };
443
444 pins2 {
445 pinmux
446 drive-
447 slew-r
448 };
449 };
450
451 can1_pins_a: can1-0 {
452 pins1 {
453 pinmux
454 };
455 pins2 {
456 pinmux
457 bias-p
458 };
459 };
460
461 can2_pins_a: can2-0 {
462 pins1 {
463 pinmux
464 };
465 pins2 {
466 pinmux
467 bias-p
468 };
469 };
470
471 can2_pins_b: can2-1 {
472 pins1 {
473 pinmux
474 };
475 pins2 {
476 pinmux
477 bias-p
478 };
479 };
480 };
481 };
482 };
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