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TOMOYO Linux Cross Reference
Linux/arch/arm/boot/dts/st/stm32f746.dtsi

Version: ~ [ linux-6.12-rc7 ] ~ [ linux-6.11.7 ] ~ [ linux-6.10.14 ] ~ [ linux-6.9.12 ] ~ [ linux-6.8.12 ] ~ [ linux-6.7.12 ] ~ [ linux-6.6.60 ] ~ [ linux-6.5.13 ] ~ [ linux-6.4.16 ] ~ [ linux-6.3.13 ] ~ [ linux-6.2.16 ] ~ [ linux-6.1.116 ] ~ [ linux-6.0.19 ] ~ [ linux-5.19.17 ] ~ [ linux-5.18.19 ] ~ [ linux-5.17.15 ] ~ [ linux-5.16.20 ] ~ [ linux-5.15.171 ] ~ [ linux-5.14.21 ] ~ [ linux-5.13.19 ] ~ [ linux-5.12.19 ] ~ [ linux-5.11.22 ] ~ [ linux-5.10.229 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.285 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.323 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.336 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.337 ] ~ [ linux-4.4.302 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.12 ] ~ [ policy-sample ] ~
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Diff markup

Differences between /arch/arm/boot/dts/st/stm32f746.dtsi (Version linux-6.12-rc7) and /arch/i386/boot/dts/st/stm32f746.dtsi (Version linux-5.11.22)


  1 /*                                                
  2  * Copyright 2015 - Maxime Coquelin <mcoquelin.    
  3  *                                                
  4  * This file is dual-licensed: you can use it     
  5  * of the GPL or the X11 license, at your opti    
  6  * licensing only applies to this file, and no    
  7  * whole.                                         
  8  *                                                
  9  *  a) This file is free software; you can red    
 10  *     modify it under the terms of the GNU Ge    
 11  *     published by the Free Software Foundati    
 12  *     License, or (at your option) any later     
 13  *                                                
 14  *     This file is distributed in the hope th    
 15  *     but WITHOUT ANY WARRANTY; without even     
 16  *     MERCHANTABILITY or FITNESS FOR A PARTIC    
 17  *     GNU General Public License for more det    
 18  *                                                
 19  * Or, alternatively,                             
 20  *                                                
 21  *  b) Permission is hereby granted, free of c    
 22  *     obtaining a copy of this software and a    
 23  *     files (the "Software"), to deal in the     
 24  *     restriction, including without limitati    
 25  *     copy, modify, merge, publish, distribut    
 26  *     sell copies of the Software, and to per    
 27  *     Software is furnished to do so, subject    
 28  *     conditions:                                
 29  *                                                
 30  *     The above copyright notice and this per    
 31  *     included in all copies or substantial p    
 32  *                                                
 33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHO    
 34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT L    
 35  *     OF MERCHANTABILITY, FITNESS FOR A PARTI    
 36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE     
 37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGE    
 38  *     WHETHER IN AN ACTION OF CONTRACT, TORT     
 39  *     FROM, OUT OF OR IN CONNECTION WITH THE     
 40  *     OTHER DEALINGS IN THE SOFTWARE.            
 41  */                                               
 42                                                   
 43 #include "../armv7-m.dtsi"                        
 44 #include <dt-bindings/clock/stm32fx-clock.h>      
 45 #include <dt-bindings/mfd/stm32f7-rcc.h>          
 46                                                   
 47 / {                                               
 48         #address-cells = <1>;                     
 49         #size-cells = <1>;                        
 50                                                   
 51         clocks {                                  
 52                 clk_hse: clk-hse {                
 53                         #clock-cells = <0>;       
 54                         compatible = "fixed-cl    
 55                         clock-frequency = <0>;    
 56                 };                                
 57                                                   
 58                 clk-lse {                         
 59                         #clock-cells = <0>;       
 60                         compatible = "fixed-cl    
 61                         clock-frequency = <327    
 62                 };                                
 63                                                   
 64                 clk-lsi {                         
 65                         #clock-cells = <0>;       
 66                         compatible = "fixed-cl    
 67                         clock-frequency = <320    
 68                 };                                
 69                                                   
 70                 clk_i2s_ckin: clk-i2s-ckin {      
 71                         #clock-cells = <0>;       
 72                         compatible = "fixed-cl    
 73                         clock-frequency = <480    
 74                 };                                
 75         };                                        
 76                                                   
 77         soc {                                     
 78                 timers2: timers@40000000 {        
 79                         #address-cells = <1>;     
 80                         #size-cells = <0>;        
 81                         compatible = "st,stm32    
 82                         reg = <0x40000000 0x40    
 83                         clocks = <&rcc 0 STM32    
 84                         clock-names = "int";      
 85                         status = "disabled";      
 86                                                   
 87                         pwm {                     
 88                                 compatible = "    
 89                                 #pwm-cells = <    
 90                                 status = "disa    
 91                         };                        
 92                                                   
 93                         timer@1 {                 
 94                                 compatible = "    
 95                                 reg = <1>;        
 96                                 status = "disa    
 97                         };                        
 98                 };                                
 99                                                   
100                 timers3: timers@40000400 {        
101                         #address-cells = <1>;     
102                         #size-cells = <0>;        
103                         compatible = "st,stm32    
104                         reg = <0x40000400 0x40    
105                         clocks = <&rcc 0 STM32    
106                         clock-names = "int";      
107                         status = "disabled";      
108                                                   
109                         pwm {                     
110                                 compatible = "    
111                                 #pwm-cells = <    
112                                 status = "disa    
113                         };                        
114                                                   
115                         timer@2 {                 
116                                 compatible = "    
117                                 reg = <2>;        
118                                 status = "disa    
119                         };                        
120                 };                                
121                                                   
122                 timers4: timers@40000800 {        
123                         #address-cells = <1>;     
124                         #size-cells = <0>;        
125                         compatible = "st,stm32    
126                         reg = <0x40000800 0x40    
127                         clocks = <&rcc 0 STM32    
128                         clock-names = "int";      
129                         status = "disabled";      
130                                                   
131                         pwm {                     
132                                 compatible = "    
133                                 #pwm-cells = <    
134                                 status = "disa    
135                         };                        
136                                                   
137                         timer@3 {                 
138                                 compatible = "    
139                                 reg = <3>;        
140                                 status = "disa    
141                         };                        
142                 };                                
143                                                   
144                 timers5: timers@40000c00 {        
145                         #address-cells = <1>;     
146                         #size-cells = <0>;        
147                         compatible = "st,stm32    
148                         reg = <0x40000C00 0x40    
149                         clocks = <&rcc 0 STM32    
150                         clock-names = "int";      
151                         status = "disabled";      
152                                                   
153                         pwm {                     
154                                 compatible = "    
155                                 #pwm-cells = <    
156                                 status = "disa    
157                         };                        
158                                                   
159                         timer@4 {                 
160                                 compatible = "    
161                                 reg = <4>;        
162                                 status = "disa    
163                         };                        
164                 };                                
165                                                   
166                 timers6: timers@40001000 {        
167                         #address-cells = <1>;     
168                         #size-cells = <0>;        
169                         compatible = "st,stm32    
170                         reg = <0x40001000 0x40    
171                         clocks = <&rcc 0 STM32    
172                         clock-names = "int";      
173                         status = "disabled";      
174                                                   
175                         timer@5 {                 
176                                 compatible = "    
177                                 reg = <5>;        
178                                 status = "disa    
179                         };                        
180                 };                                
181                                                   
182                 timers7: timers@40001400 {        
183                         #address-cells = <1>;     
184                         #size-cells = <0>;        
185                         compatible = "st,stm32    
186                         reg = <0x40001400 0x40    
187                         clocks = <&rcc 0 STM32    
188                         clock-names = "int";      
189                         status = "disabled";      
190                                                   
191                         timer@6 {                 
192                                 compatible = "    
193                                 reg = <6>;        
194                                 status = "disa    
195                         };                        
196                 };                                
197                                                   
198                 timers12: timers@40001800 {       
199                         #address-cells = <1>;     
200                         #size-cells = <0>;        
201                         compatible = "st,stm32    
202                         reg = <0x40001800 0x40    
203                         clocks = <&rcc 0 STM32    
204                         clock-names = "int";      
205                         status = "disabled";      
206                                                   
207                         pwm {                     
208                                 compatible = "    
209                                 #pwm-cells = <    
210                                 status = "disa    
211                         };                        
212                                                   
213                         timer@11 {                
214                                 compatible = "    
215                                 reg = <11>;       
216                                 status = "disa    
217                         };                        
218                 };                                
219                                                   
220                 timers13: timers@40001c00 {       
221                         compatible = "st,stm32    
222                         reg = <0x40001C00 0x40    
223                         clocks = <&rcc 0 STM32    
224                         clock-names = "int";      
225                         status = "disabled";      
226                                                   
227                         pwm {                     
228                                 compatible = "    
229                                 #pwm-cells = <    
230                                 status = "disa    
231                         };                        
232                 };                                
233                                                   
234                 timers14: timers@40002000 {       
235                         compatible = "st,stm32    
236                         reg = <0x40002000 0x40    
237                         clocks = <&rcc 0 STM32    
238                         clock-names = "int";      
239                         status = "disabled";      
240                                                   
241                         pwm {                     
242                                 compatible = "    
243                                 #pwm-cells = <    
244                                 status = "disa    
245                         };                        
246                 };                                
247                                                   
248                 rtc: rtc@40002800 {               
249                         compatible = "st,stm32    
250                         reg = <0x40002800 0x40    
251                         clocks = <&rcc 1 CLK_R    
252                         assigned-clocks = <&rc    
253                         assigned-clock-parents    
254                         interrupt-parent = <&e    
255                         interrupts = <17 1>;      
256                         st,syscfg = <&pwrcfg 0    
257                         status = "disabled";      
258                 };                                
259                                                   
260                 spi2: spi@40003800 {              
261                         #address-cells = <1>;     
262                         #size-cells = <0>;        
263                         compatible = "st,stm32    
264                         reg = <0x40003800 0x40    
265                         interrupts = <36>;        
266                         clocks = <&rcc 0 STM32    
267                         status = "disabled";      
268                 };                                
269                                                   
270                 spi3: spi@40003c00 {              
271                         #address-cells = <1>;     
272                         #size-cells = <0>;        
273                         compatible = "st,stm32    
274                         reg = <0x40003c00 0x40    
275                         interrupts = <51>;        
276                         clocks = <&rcc 0 STM32    
277                         status = "disabled";      
278                 };                                
279                                                   
280                 usart2: serial@40004400 {         
281                         compatible = "st,stm32    
282                         reg = <0x40004400 0x40    
283                         interrupts = <38>;        
284                         clocks = <&rcc 1 CLK_U    
285                         status = "disabled";      
286                 };                                
287                                                   
288                 usart3: serial@40004800 {         
289                         compatible = "st,stm32    
290                         reg = <0x40004800 0x40    
291                         interrupts = <39>;        
292                         clocks = <&rcc 1 CLK_U    
293                         status = "disabled";      
294                 };                                
295                                                   
296                 usart4: serial@40004c00 {         
297                         compatible = "st,stm32    
298                         reg = <0x40004c00 0x40    
299                         interrupts = <52>;        
300                         clocks = <&rcc 1 CLK_U    
301                         status = "disabled";      
302                 };                                
303                                                   
304                 usart5: serial@40005000 {         
305                         compatible = "st,stm32    
306                         reg = <0x40005000 0x40    
307                         interrupts = <53>;        
308                         clocks = <&rcc 1 CLK_U    
309                         status = "disabled";      
310                 };                                
311                                                   
312                 i2c1: i2c@40005400 {              
313                         compatible = "st,stm32    
314                         reg = <0x40005400 0x40    
315                         interrupts = <31>,        
316                                      <32>;        
317                         resets = <&rcc STM32F7    
318                         clocks = <&rcc 1 CLK_I    
319                         #address-cells = <1>;     
320                         #size-cells = <0>;        
321                         status = "disabled";      
322                 };                                
323                                                   
324                 i2c2: i2c@40005800 {              
325                         compatible = "st,stm32    
326                         reg = <0x40005800 0x40    
327                         interrupts = <33>,        
328                                      <34>;        
329                         resets = <&rcc STM32F7    
330                         clocks = <&rcc 1 CLK_I    
331                         #address-cells = <1>;     
332                         #size-cells = <0>;        
333                         status = "disabled";      
334                 };                                
335                                                   
336                 i2c3: i2c@40005c00 {              
337                         compatible = "st,stm32    
338                         reg = <0x40005c00 0x40    
339                         interrupts = <72>,        
340                                      <73>;        
341                         resets = <&rcc STM32F7    
342                         clocks = <&rcc 1 CLK_I    
343                         #address-cells = <1>;     
344                         #size-cells = <0>;        
345                         status = "disabled";      
346                 };                                
347                                                   
348                 i2c4: i2c@40006000 {              
349                         compatible = "st,stm32    
350                         reg = <0x40006000 0x40    
351                         interrupts = <95>,        
352                                      <96>;        
353                         resets = <&rcc STM32F7    
354                         clocks = <&rcc 1 CLK_I    
355                         #address-cells = <1>;     
356                         #size-cells = <0>;        
357                         status = "disabled";      
358                 };                                
359                                                   
360                 can1: can@40006400 {              
361                         compatible = "st,stm32    
362                         reg = <0x40006400 0x20    
363                         interrupts = <19>, <20    
364                         interrupt-names = "tx"    
365                         resets = <&rcc STM32F7    
366                         clocks = <&rcc 0 STM32    
367                         st,can-primary;           
368                         st,gcan = <&gcan1>;       
369                         status = "disabled";      
370                 };                                
371                                                   
372                 gcan1: gcan@40006600 {            
373                         compatible = "st,stm32    
374                         reg = <0x40006600 0x20    
375                         clocks = <&rcc 0 STM32    
376                 };                                
377                                                   
378                 can2: can@40006800 {              
379                         compatible = "st,stm32    
380                         reg = <0x40006800 0x20    
381                         interrupts = <63>, <64    
382                         interrupt-names = "tx"    
383                         resets = <&rcc STM32F7    
384                         clocks = <&rcc 0 STM32    
385                         st,can-secondary;         
386                         st,gcan = <&gcan1>;       
387                         status = "disabled";      
388                 };                                
389                                                   
390                 cec: cec@40006c00 {               
391                         compatible = "st,stm32    
392                         reg = <0x40006C00 0x40    
393                         interrupts = <94>;        
394                         clocks = <&rcc 0 STM32    
395                         clock-names = "cec", "    
396                         status = "disabled";      
397                 };                                
398                                                   
399                 usart7: serial@40007800 {         
400                         compatible = "st,stm32    
401                         reg = <0x40007800 0x40    
402                         interrupts = <82>;        
403                         clocks = <&rcc 1 CLK_U    
404                         status = "disabled";      
405                 };                                
406                                                   
407                 usart8: serial@40007c00 {         
408                         compatible = "st,stm32    
409                         reg = <0x40007c00 0x40    
410                         interrupts = <83>;        
411                         clocks = <&rcc 1 CLK_U    
412                         status = "disabled";      
413                 };                                
414                                                   
415                 timers1: timers@40010000 {        
416                         #address-cells = <1>;     
417                         #size-cells = <0>;        
418                         compatible = "st,stm32    
419                         reg = <0x40010000 0x40    
420                         clocks = <&rcc 0 STM32    
421                         clock-names = "int";      
422                         status = "disabled";      
423                                                   
424                         pwm {                     
425                                 compatible = "    
426                                 #pwm-cells = <    
427                                 status = "disa    
428                         };                        
429                                                   
430                         timer@0 {                 
431                                 compatible = "    
432                                 reg = <0>;        
433                                 status = "disa    
434                         };                        
435                 };                                
436                                                   
437                 timers8: timers@40010400 {        
438                         #address-cells = <1>;     
439                         #size-cells = <0>;        
440                         compatible = "st,stm32    
441                         reg = <0x40010400 0x40    
442                         clocks = <&rcc 0 STM32    
443                         clock-names = "int";      
444                         status = "disabled";      
445                                                   
446                         pwm {                     
447                                 compatible = "    
448                                 #pwm-cells = <    
449                                 status = "disa    
450                         };                        
451                                                   
452                         timer@7 {                 
453                                 compatible = "    
454                                 reg = <7>;        
455                                 status = "disa    
456                         };                        
457                 };                                
458                                                   
459                 usart1: serial@40011000 {         
460                         compatible = "st,stm32    
461                         reg = <0x40011000 0x40    
462                         interrupts = <37>;        
463                         clocks = <&rcc 1 CLK_U    
464                         status = "disabled";      
465                 };                                
466                                                   
467                 usart6: serial@40011400 {         
468                         compatible = "st,stm32    
469                         reg = <0x40011400 0x40    
470                         interrupts = <71>;        
471                         clocks = <&rcc 1 CLK_U    
472                         status = "disabled";      
473                 };                                
474                                                   
475                 sdio2: mmc@40011c00 {             
476                         compatible = "arm,pl18    
477                         arm,primecell-periphid    
478                         reg = <0x40011c00 0x40    
479                         clocks = <&rcc 0 STM32    
480                         clock-names = "apb_pcl    
481                         interrupts = <103>;       
482                         max-frequency = <48000    
483                         status = "disabled";      
484                 };                                
485                                                   
486                 sdio1: mmc@40012c00 {             
487                         compatible = "arm,pl18    
488                         arm,primecell-periphid    
489                         reg = <0x40012c00 0x40    
490                         clocks = <&rcc 0 STM32    
491                         clock-names = "apb_pcl    
492                         interrupts = <49>;        
493                         max-frequency = <48000    
494                         status = "disabled";      
495                 };                                
496                                                   
497                 spi1: spi@40013000 {              
498                         #address-cells = <1>;     
499                         #size-cells = <0>;        
500                         compatible = "st,stm32    
501                         reg = <0x40013000 0x40    
502                         interrupts = <35>;        
503                         clocks = <&rcc 0 STM32    
504                         status = "disabled";      
505                 };                                
506                                                   
507                 spi4: spi@40013400 {              
508                         #address-cells = <1>;     
509                         #size-cells = <0>;        
510                         compatible = "st,stm32    
511                         reg = <0x40013400 0x40    
512                         interrupts = <84>;        
513                         clocks = <&rcc 0 STM32    
514                         status = "disabled";      
515                 };                                
516                                                   
517                 syscfg: syscon@40013800 {         
518                         compatible = "st,stm32    
519                         reg = <0x40013800 0x40    
520                         clocks = <&rcc 0 STM32    
521                 };                                
522                                                   
523                 exti: interrupt-controller@400    
524                         compatible = "st,stm32    
525                         interrupt-controller;     
526                         #interrupt-cells = <2>    
527                         reg = <0x40013C00 0x40    
528                         interrupts = <1>, <2>,    
529                 };                                
530                                                   
531                 timers9: timers@40014000 {        
532                         #address-cells = <1>;     
533                         #size-cells = <0>;        
534                         compatible = "st,stm32    
535                         reg = <0x40014000 0x40    
536                         clocks = <&rcc 0 STM32    
537                         clock-names = "int";      
538                         status = "disabled";      
539                                                   
540                         pwm {                     
541                                 compatible = "    
542                                 #pwm-cells = <    
543                                 status = "disa    
544                         };                        
545                                                   
546                         timer@8 {                 
547                                 compatible = "    
548                                 reg = <8>;        
549                                 status = "disa    
550                         };                        
551                 };                                
552                                                   
553                 timers10: timers@40014400 {       
554                         compatible = "st,stm32    
555                         reg = <0x40014400 0x40    
556                         clocks = <&rcc 0 STM32    
557                         clock-names = "int";      
558                         status = "disabled";      
559                                                   
560                         pwm {                     
561                                 compatible = "    
562                                 #pwm-cells = <    
563                                 status = "disa    
564                         };                        
565                 };                                
566                                                   
567                 timers11: timers@40014800 {       
568                         compatible = "st,stm32    
569                         reg = <0x40014800 0x40    
570                         clocks = <&rcc 0 STM32    
571                         clock-names = "int";      
572                         status = "disabled";      
573                                                   
574                         pwm {                     
575                                 compatible = "    
576                                 #pwm-cells = <    
577                                 status = "disa    
578                         };                        
579                 };                                
580                                                   
581                 spi5: spi@40015000 {              
582                         #address-cells = <1>;     
583                         #size-cells = <0>;        
584                         compatible = "st,stm32    
585                         reg = <0x40015000 0x40    
586                         interrupts = <85>;        
587                         clocks = <&rcc 0 STM32    
588                         status = "disabled";      
589                 };                                
590                                                   
591                 spi6: spi@40015400 {              
592                         #address-cells = <1>;     
593                         #size-cells = <0>;        
594                         compatible = "st,stm32    
595                         reg = <0x40015400 0x40    
596                         interrupts = <86>;        
597                         clocks = <&rcc 0 STM32    
598                         status = "disabled";      
599                 };                                
600                                                   
601                 ltdc: display-controller@40016    
602                         compatible = "st,stm32    
603                         reg = <0x40016800 0x20    
604                         interrupts = <88>, <89    
605                         resets = <&rcc STM32F7    
606                         clocks = <&rcc 1 CLK_L    
607                         clock-names = "lcd";      
608                         status = "disabled";      
609                 };                                
610                                                   
611                 pwrcfg: power-config@40007000     
612                         compatible = "st,stm32    
613                         reg = <0x40007000 0x40    
614                 };                                
615                                                   
616                 crc: crc@40023000 {               
617                         compatible = "st,stm32    
618                         reg = <0x40023000 0x40    
619                         clocks = <&rcc 0 STM32    
620                         status = "disabled";      
621                 };                                
622                                                   
623                 rcc: rcc@40023800 {               
624                         #reset-cells = <1>;       
625                         #clock-cells = <2>;       
626                         compatible = "st,stm32    
627                         reg = <0x40023800 0x40    
628                         clocks = <&clk_hse>, <    
629                         st,syscfg = <&pwrcfg>;    
630                         assigned-clocks = <&rc    
631                         assigned-clock-rates =    
632                 };                                
633                                                   
634                 dma1: dma-controller@40026000     
635                         compatible = "st,stm32    
636                         reg = <0x40026000 0x40    
637                         interrupts = <11>,        
638                                      <12>,        
639                                      <13>,        
640                                      <14>,        
641                                      <15>,        
642                                      <16>,        
643                                      <17>,        
644                                      <47>;        
645                         clocks = <&rcc 0 STM32    
646                         #dma-cells = <4>;         
647                         status = "disabled";      
648                 };                                
649                                                   
650                 dma2: dma-controller@40026400     
651                         compatible = "st,stm32    
652                         reg = <0x40026400 0x40    
653                         interrupts = <56>,        
654                                      <57>,        
655                                      <58>,        
656                                      <59>,        
657                                      <60>,        
658                                      <68>,        
659                                      <69>,        
660                                      <70>;        
661                         clocks = <&rcc 0 STM32    
662                         #dma-cells = <4>;         
663                         st,mem2mem;               
664                         status = "disabled";      
665                 };                                
666                                                   
667                 usbotg_hs: usb@40040000 {         
668                         compatible = "st,stm32    
669                         reg = <0x40040000 0x40    
670                         interrupts = <77>;        
671                         clocks = <&rcc 0 STM32    
672                         clock-names = "otg";      
673                         g-rx-fifo-size = <256>    
674                         g-np-tx-fifo-size = <3    
675                         g-tx-fifo-size = <128     
676                         status = "disabled";      
677                 };                                
678                                                   
679                 usbotg_fs: usb@50000000 {         
680                         compatible = "st,stm32    
681                         reg = <0x50000000 0x40    
682                         interrupts = <67>;        
683                         clocks = <&rcc 0 STM32    
684                         clock-names = "otg";      
685                         status = "disabled";      
686                 };                                
687         };                                        
688 };                                                
689                                                   
690 &systick {                                        
691         clocks = <&rcc 1 0>;                      
692         status = "okay";                          
693 };                                                
                                                      

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