1 /*
2 * Copyright 2017 - Alexandre Torgue <alexandre
3 *
4 * This file is dual-licensed: you can use it
5 * of the GPL or the X11 license, at your opti
6 * licensing only applies to this file, and no
7 * whole.
8 *
9 * a) This file is free software; you can red
10 * modify it under the terms of the GNU Ge
11 * published by the Free Software Foundati
12 * License, or (at your option) any later
13 *
14 * This file is distributed in the hope th
15 * but WITHOUT ANY WARRANTY; without even
16 * MERCHANTABILITY or FITNESS FOR A PARTIC
17 * GNU General Public License for more det
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of c
22 * obtaining a copy of this software and a
23 * files (the "Software"), to deal in the
24 * restriction, including without limitati
25 * copy, modify, merge, publish, distribut
26 * sell copies of the Software, and to per
27 * Software is furnished to do so, subject
28 * conditions:
29 *
30 * The above copyright notice and this per
31 * included in all copies or substantial p
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHO
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT L
35 * OF MERCHANTABILITY, FITNESS FOR A PARTI
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGE
38 * WHETHER IN AN ACTION OF CONTRACT, TORT
39 * FROM, OUT OF OR IN CONNECTION WITH THE
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
44
45 &pinctrl {
46
47 i2c1_pins_a: i2c1-0 {
48 pins {
49 pinmux = <STM32_PINMUX
50 <STM32_PINMUX
51 bias-disable;
52 drive-open-drain;
53 slew-rate = <0>;
54 };
55 };
56
57 ethernet_rmii: rmii-0 {
58 pins {
59 pinmux = <STM32_PINMUX
60 <STM32_PINMUX
61 <STM32_PINMUX
62 <STM32_PINMUX
63 <STM32_PINMUX
64 <STM32_PINMUX
65 <STM32_PINMUX
66 <STM32_PINMUX
67 <STM32_PINMUX
68 slew-rate = <2>;
69 };
70 };
71
72 sdmmc1_b4_pins_a: sdmmc1-b4-0 {
73 pins {
74 pinmux = <STM32_PINMUX
75 <STM32_PINMUX
76 <STM32_PINMUX
77 <STM32_PINMUX
78 <STM32_PINMUX
79 <STM32_PINMUX
80 slew-rate = <3>;
81 drive-push-pull;
82 bias-disable;
83 };
84 };
85
86 sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
87 pins1 {
88 pinmux = <STM32_PINMUX
89 <STM32_PINMUX
90 <STM32_PINMUX
91 <STM32_PINMUX
92 <STM32_PINMUX
93 slew-rate = <3>;
94 drive-push-pull;
95 bias-disable;
96 };
97 pins2 {
98 pinmux = <STM32_PINMUX
99 slew-rate = <3>;
100 drive-open-drain;
101 bias-disable;
102 };
103 };
104
105 sdmmc1_b4_sleep_pins_a: sdmmc1-b4-slee
106 pins {
107 pinmux = <STM32_PINMUX
108 <STM32_PINMUX
109 <STM32_PINMUX
110 <STM32_PINMUX
111 <STM32_PINMUX
112 <STM32_PINMUX
113 };
114 };
115
116 sdmmc1_dir_pins_a: sdmmc1-dir-0 {
117 pins1 {
118 pinmux = <STM32_PINMUX
119 <STM32_PINMUX
120 <STM32_PINMUX
121 slew-rate = <3>;
122 drive-push-pull;
123 bias-pull-up;
124 };
125 pins2 {
126 pinmux = <STM32_PINMUX
127 bias-pull-up;
128 };
129 };
130
131 sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sl
132 pins {
133 pinmux = <STM32_PINMUX
134 <STM32_PINMUX
135 <STM32_PINMUX
136 <STM32_PINMUX
137 };
138 };
139
140 sdmmc2_b4_pins_a: sdmmc2-b4-0 {
141 pins {
142 pinmux = <STM32_PINMUX
143 <STM32_PINMUX
144 <STM32_PINMUX
145 <STM32_PINMUX
146 <STM32_PINMUX
147 <STM32_PINMUX
148 slew-rate = <3>;
149 drive-push-pull;
150 bias-disable;
151 };
152 };
153
154 sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
155 pins1 {
156 pinmux = <STM32_PINMUX
157 <STM32_PINMUX
158 <STM32_PINMUX
159 <STM32_PINMUX
160 <STM32_PINMUX
161 slew-rate = <3>;
162 drive-push-pull;
163 bias-disable;
164 };
165 pins2 {
166 pinmux = <STM32_PINMUX
167 slew-rate = <3>;
168 drive-open-drain;
169 bias-disable;
170 };
171 };
172
173 sdmmc2_b4_sleep_pins_a: sdmmc2-b4-slee
174 pins {
175 pinmux = <STM32_PINMUX
176 <STM32_PINMUX
177 <STM32_PINMUX
178 <STM32_PINMUX
179 <STM32_PINMUX
180 <STM32_PINMUX
181 };
182 };
183
184 spi1_pins: spi1-0 {
185 pins1 {
186 pinmux = <STM32_PINMUX
187 /* SPI1_CLK */
188 <STM32_PINMUX
189 /* SPI1_MOSI *
190 bias-disable;
191 drive-push-pull;
192 slew-rate = <2>;
193 };
194 pins2 {
195 pinmux = <STM32_PINMUX
196 /* SPI1_MISO *
197 bias-disable;
198 };
199 };
200
201 uart4_pins: uart4-0 {
202 pins1 {
203 pinmux = <STM32_PINMUX
204 bias-disable;
205 drive-push-pull;
206 slew-rate = <0>;
207 };
208 pins2 {
209 pinmux = <STM32_PINMUX
210 bias-disable;
211 };
212 };
213
214 usart1_pins: usart1-0 {
215 pins1 {
216 pinmux = <STM32_PINMUX
217 bias-disable;
218 drive-push-pull;
219 slew-rate = <0>;
220 };
221 pins2 {
222 pinmux = <STM32_PINMUX
223 bias-disable;
224 };
225 };
226
227 usart2_pins: usart2-0 {
228 pins1 {
229 pinmux = <STM32_PINMUX
230 bias-disable;
231 drive-push-pull;
232 slew-rate = <0>;
233 };
234 pins2 {
235 pinmux = <STM32_PINMUX
236 bias-disable;
237 };
238 };
239
240 usart3_pins: usart3-0 {
241 pins1 {
242 pinmux = <STM32_PINMUX
243 <STM32_PINMUX
244 bias-disable;
245 drive-push-pull;
246 slew-rate = <0>;
247 };
248 pins2 {
249 pinmux = <STM32_PINMUX
250 <STM32_PINMUX
251 bias-disable;
252 };
253 };
254
255 usbotg_hs_pins_a: usbotg-hs-0 {
256 pins {
257 pinmux = <STM32_PINMUX
258 <STM3
259 <STM3
260 <STM3
261 <STM3
262 <STM3
263 <STM3
264 <STM3
265 <STM3
266 <STM3
267 <STM3
268 <STM3
269 bias-disable;
270 drive-push-pull;
271 slew-rate = <2>;
272 };
273 };
274 };
275
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