1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0 2 2 3 menu "Accelerated Cryptographic Algorithms for !! 3 menu "Accelerated Cryptographic Algorithms for CPU (mips)" 4 4 5 config CRYPTO_CURVE25519_NEON !! 5 config CRYPTO_CRC32_MIPS 6 tristate "Public key crypto: Curve2551 !! 6 tristate "CRC32c and CRC32" 7 depends on KERNEL_MODE_NEON !! 7 depends on MIPS_CRC_SUPPORT 8 select CRYPTO_LIB_CURVE25519_GENERIC << 9 select CRYPTO_ARCH_HAVE_LIB_CURVE25519 << 10 help << 11 Curve25519 algorithm << 12 << 13 Architecture: arm with << 14 - NEON (Advanced SIMD) extensions << 15 << 16 config CRYPTO_GHASH_ARM_CE << 17 tristate "Hash functions: GHASH (PMULL << 18 depends on KERNEL_MODE_NEON << 19 select CRYPTO_AEAD << 20 select CRYPTO_HASH 8 select CRYPTO_HASH 21 select CRYPTO_CRYPTD << 22 select CRYPTO_LIB_AES << 23 select CRYPTO_LIB_GF128MUL << 24 help << 25 GCM GHASH function (NIST SP800-38D) << 26 << 27 Architecture: arm using << 28 - PMULL (Polynomial Multiply Long) i << 29 - NEON (Advanced SIMD) extensions << 30 - ARMv8 Crypto Extensions << 31 << 32 Use an implementation of GHASH (used << 33 that uses the 64x64 to 128 bit polyn << 34 that is part of the ARMv8 Crypto Ext << 35 uses the vmull.p8 instruction that i << 36 << 37 config CRYPTO_NHPOLY1305_NEON << 38 tristate "Hash functions: NHPoly1305 ( << 39 depends on KERNEL_MODE_NEON << 40 select CRYPTO_NHPOLY1305 << 41 help 9 help 42 NHPoly1305 hash function (Adiantum) !! 10 CRC32c and CRC32 CRC algorithms 43 11 44 Architecture: arm using: !! 12 Architecture: mips 45 - NEON (Advanced SIMD) extensions << 46 13 47 config CRYPTO_POLY1305_ARM !! 14 config CRYPTO_POLY1305_MIPS 48 tristate "Hash functions: Poly1305 (NE !! 15 tristate "Hash functions: Poly1305" 49 select CRYPTO_HASH !! 16 depends on MIPS 50 select CRYPTO_ARCH_HAVE_LIB_POLY1305 17 select CRYPTO_ARCH_HAVE_LIB_POLY1305 51 help 18 help 52 Poly1305 authenticator algorithm (RF 19 Poly1305 authenticator algorithm (RFC7539) 53 20 54 Architecture: arm optionally using !! 21 Architecture: mips 55 - NEON (Advanced SIMD) extensions << 56 << 57 config CRYPTO_BLAKE2S_ARM << 58 bool "Hash functions: BLAKE2s" << 59 select CRYPTO_ARCH_HAVE_LIB_BLAKE2S << 60 help << 61 BLAKE2s cryptographic hash function << 62 << 63 Architecture: arm << 64 << 65 This is faster than the generic impl << 66 BLAKE2b, but slower than the NEON im << 67 There is no NEON implementation of B << 68 really help with it. << 69 22 70 config CRYPTO_BLAKE2B_NEON !! 23 config CRYPTO_MD5_OCTEON 71 tristate "Hash functions: BLAKE2b (NEO !! 24 tristate "Digests: MD5 (OCTEON)" 72 depends on KERNEL_MODE_NEON !! 25 depends on CPU_CAVIUM_OCTEON 73 select CRYPTO_BLAKE2B !! 26 select CRYPTO_MD5 74 help << 75 BLAKE2b cryptographic hash function << 76 << 77 Architecture: arm using << 78 - NEON (Advanced SIMD) extensions << 79 << 80 BLAKE2b digest algorithm optimized w << 81 On ARM processors that have NEON sup << 82 Crypto Extensions, typically this BL << 83 much faster than the SHA-2 family an << 84 SHA-1. << 85 << 86 config CRYPTO_SHA1_ARM << 87 tristate "Hash functions: SHA-1" << 88 select CRYPTO_SHA1 << 89 select CRYPTO_HASH 27 select CRYPTO_HASH 90 help 28 help 91 SHA-1 secure hash algorithm (FIPS 18 !! 29 MD5 message digest algorithm (RFC1321) 92 30 93 Architecture: arm !! 31 Architecture: mips OCTEON using crypto instructions, when available 94 32 95 config CRYPTO_SHA1_ARM_NEON !! 33 config CRYPTO_SHA1_OCTEON 96 tristate "Hash functions: SHA-1 (NEON) !! 34 tristate "Hash functions: SHA-1 (OCTEON)" 97 depends on KERNEL_MODE_NEON !! 35 depends on CPU_CAVIUM_OCTEON 98 select CRYPTO_SHA1_ARM << 99 select CRYPTO_SHA1 36 select CRYPTO_SHA1 100 select CRYPTO_HASH 37 select CRYPTO_HASH 101 help 38 help 102 SHA-1 secure hash algorithm (FIPS 18 39 SHA-1 secure hash algorithm (FIPS 180) 103 40 104 Architecture: arm using !! 41 Architecture: mips OCTEON 105 - NEON (Advanced SIMD) extensions << 106 42 107 config CRYPTO_SHA1_ARM_CE !! 43 config CRYPTO_SHA256_OCTEON 108 tristate "Hash functions: SHA-1 (ARMv8 !! 44 tristate "Hash functions: SHA-224 and SHA-256 (OCTEON)" 109 depends on KERNEL_MODE_NEON !! 45 depends on CPU_CAVIUM_OCTEON 110 select CRYPTO_SHA1_ARM !! 46 select CRYPTO_SHA256 111 select CRYPTO_HASH << 112 help << 113 SHA-1 secure hash algorithm (FIPS 18 << 114 << 115 Architecture: arm using ARMv8 Crypto << 116 << 117 config CRYPTO_SHA2_ARM_CE << 118 tristate "Hash functions: SHA-224 and << 119 depends on KERNEL_MODE_NEON << 120 select CRYPTO_SHA256_ARM << 121 select CRYPTO_HASH 47 select CRYPTO_HASH 122 help 48 help 123 SHA-224 and SHA-256 secure hash algo 49 SHA-224 and SHA-256 secure hash algorithms (FIPS 180) 124 50 125 Architecture: arm using !! 51 Architecture: mips OCTEON using crypto instructions, when available 126 - ARMv8 Crypto Extensions << 127 52 128 config CRYPTO_SHA256_ARM !! 53 config CRYPTO_SHA512_OCTEON 129 tristate "Hash functions: SHA-224 and !! 54 tristate "Hash functions: SHA-384 and SHA-512 (OCTEON)" >> 55 depends on CPU_CAVIUM_OCTEON >> 56 select CRYPTO_SHA512 130 select CRYPTO_HASH 57 select CRYPTO_HASH 131 depends on !CPU_V7M << 132 help << 133 SHA-224 and SHA-256 secure hash algo << 134 << 135 Architecture: arm using << 136 - NEON (Advanced SIMD) extensions << 137 << 138 config CRYPTO_SHA512_ARM << 139 tristate "Hash functions: SHA-384 and << 140 select CRYPTO_HASH << 141 depends on !CPU_V7M << 142 help 58 help 143 SHA-384 and SHA-512 secure hash algo 59 SHA-384 and SHA-512 secure hash algorithms (FIPS 180) 144 60 145 Architecture: arm using !! 61 Architecture: mips OCTEON using crypto instructions, when available 146 - NEON (Advanced SIMD) extensions << 147 62 148 config CRYPTO_AES_ARM !! 63 config CRYPTO_CHACHA_MIPS 149 tristate "Ciphers: AES" !! 64 tristate "Ciphers: ChaCha20, XChaCha20, XChaCha12 (MIPS32r2)" 150 select CRYPTO_ALGAPI !! 65 depends on CPU_MIPS32_R2 151 select CRYPTO_AES << 152 help << 153 Block ciphers: AES cipher algorithms << 154 << 155 Architecture: arm << 156 << 157 On ARM processors without the Crypto << 158 fastest AES implementation for singl << 159 blocks, the NEON bit-sliced implemen << 160 << 161 This implementation may be vulnerabl << 162 since it uses lookup tables. Howeve << 163 disables IRQs and preloads the table << 164 such attacks very difficult. << 165 << 166 config CRYPTO_AES_ARM_BS << 167 tristate "Ciphers: AES, modes: ECB/CBC << 168 depends on KERNEL_MODE_NEON << 169 select CRYPTO_AES_ARM << 170 select CRYPTO_SKCIPHER << 171 select CRYPTO_LIB_AES << 172 select CRYPTO_SIMD << 173 help << 174 Length-preserving ciphers: AES ciphe << 175 with block cipher modes: << 176 - ECB (Electronic Codebook) mode (N << 177 - CBC (Cipher Block Chaining) mode << 178 - CTR (Counter) mode (NIST SP800-38 << 179 - XTS (XOR Encrypt XOR with ciphert << 180 and IEEE 1619) << 181 << 182 Bit sliced AES gives around 45% spee << 183 and for XTS mode encryption, CBC and << 184 around 25%. (CBC encryption speed is << 185 << 186 The bit sliced AES code does not use << 187 to be invulnerable to cache timing a << 188 sliced AES code cannot process singl << 189 cases table-based code with some cou << 190 attacks will still be used as a fall << 191 encryption (not CBC decryption), the << 192 ciphertext stealing when the message << 193 CTR when invoked in a context in whi << 194 << 195 config CRYPTO_AES_ARM_CE << 196 tristate "Ciphers: AES, modes: ECB/CBC << 197 depends on KERNEL_MODE_NEON << 198 select CRYPTO_SKCIPHER << 199 select CRYPTO_LIB_AES << 200 select CRYPTO_SIMD << 201 help << 202 Length-preserving ciphers: AES ciphe << 203 with block cipher modes: << 204 - ECB (Electronic Codebook) mode (N << 205 - CBC (Cipher Block Chaining) mode << 206 - CTR (Counter) mode (NIST SP800-38 << 207 - CTS (Cipher Text Stealing) mode ( << 208 - XTS (XOR Encrypt XOR with ciphert << 209 and IEEE 1619) << 210 << 211 Architecture: arm using: << 212 - ARMv8 Crypto Extensions << 213 << 214 config CRYPTO_CHACHA20_NEON << 215 tristate "Ciphers: ChaCha20, XChaCha20 << 216 select CRYPTO_SKCIPHER 66 select CRYPTO_SKCIPHER 217 select CRYPTO_ARCH_HAVE_LIB_CHACHA 67 select CRYPTO_ARCH_HAVE_LIB_CHACHA 218 help 68 help 219 Length-preserving ciphers: ChaCha20, 69 Length-preserving ciphers: ChaCha20, XChaCha20, and XChaCha12 220 stream cipher algorithms 70 stream cipher algorithms 221 71 222 Architecture: arm using: !! 72 Architecture: MIPS32r2 223 - NEON (Advanced SIMD) extensions << 224 << 225 config CRYPTO_CRC32_ARM_CE << 226 tristate "CRC32C and CRC32" << 227 depends on KERNEL_MODE_NEON << 228 depends on CRC32 << 229 select CRYPTO_HASH << 230 help << 231 CRC32c CRC algorithm with the iSCSI << 232 and CRC32 CRC algorithm (IEEE 802.3) << 233 << 234 Architecture: arm using: << 235 - CRC and/or PMULL instructions << 236 << 237 Drivers: crc32-arm-ce and crc32c-arm << 238 << 239 config CRYPTO_CRCT10DIF_ARM_CE << 240 tristate "CRCT10DIF" << 241 depends on KERNEL_MODE_NEON << 242 depends on CRC_T10DIF << 243 select CRYPTO_HASH << 244 help << 245 CRC16 CRC algorithm used for the T10 << 246 << 247 Architecture: arm using: << 248 - PMULL (Polynomial Multiply Long) i << 249 73 250 endmenu 74 endmenu 251 <<
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