1 /* SPDX-License-Identifier: GPL-2.0-only */ 1
2 /*
3 * arch/arm/include/asm/pgtable.h
4 *
5 * Copyright (C) 1995-2002 Russell King
6 */
7 #ifndef _ASMARM_PGTABLE_H
8 #define _ASMARM_PGTABLE_H
9
10 #include <linux/const.h>
11 #include <asm/proc-fns.h>
12
13 #ifndef __ASSEMBLY__
14 /*
15 * ZERO_PAGE is a global shared page that is a
16 * for zero-mapped memory areas etc..
17 */
18 extern struct page *empty_zero_page;
19 #define ZERO_PAGE(vaddr) (empty_zero_pa
20 #endif
21
22 #ifndef CONFIG_MMU
23
24 #include <asm-generic/pgtable-nopud.h>
25 #include <asm/pgtable-nommu.h>
26
27 #else
28
29 #include <asm-generic/pgtable-nopud.h>
30 #include <asm/page.h>
31 #include <asm/pgtable-hwdef.h>
32
33
34 #include <asm/tlbflush.h>
35
36 #ifdef CONFIG_ARM_LPAE
37 #include <asm/pgtable-3level.h>
38 #else
39 #include <asm/pgtable-2level.h>
40 #endif
41
42 /*
43 * Just any arbitrary offset to the start of t
44 * current 8MB value just means that there wil
45 * physical memory until the kernel virtual me
46 * any out-of-bounds memory accesses will hope
47 * The vmalloc() routines leaves a hole of 4kB
48 * area for the same reason. ;)
49 */
50 #define VMALLOC_OFFSET (8*1024*1024)
51 #define VMALLOC_START (((unsigned lo
52 #define VMALLOC_END 0xff800000UL
53
54 #define LIBRARY_TEXT_START 0x0c000000
55
56 #ifndef __ASSEMBLY__
57 extern void __pte_error(const char *file, int
58 extern void __pmd_error(const char *file, int
59 extern void __pgd_error(const char *file, int
60
61 #define pte_ERROR(pte) __pte_error(__
62 #define pmd_ERROR(pmd) __pmd_error(__
63 #define pgd_ERROR(pgd) __pgd_error(__
64
65 /*
66 * This is the lowest virtual address we can p
67 * mapping to be mapped at. This is particula
68 * non-high vector CPUs.
69 */
70 #define FIRST_USER_ADDRESS (PAGE_SIZE * 2
71
72 /*
73 * Use TASK_SIZE as the ceiling argument for f
74 * free_pgd_range() to avoid freeing the modul
75 * page shared between user and kernel).
76 */
77 #ifdef CONFIG_ARM_LPAE
78 #define USER_PGTABLES_CEILING TASK_SIZE
79 #endif
80
81 /*
82 * The pgprot_* and protection_map entries wil
83 * to include the cachable and bufferable bits
84 * as well as any architecture dependent bits
85 * shared mapping bits.
86 */
87 #define _L_PTE_DEFAULT L_PTE_PRESENT | L_PTE_
88
89 extern pgprot_t pgprot_user;
90 extern pgprot_t pgprot_kernel;
91
92 #define _MOD_PROT(p, b) __pgprot(pgprot_val(p)
93
94 #define PAGE_NONE _MOD_PROT(pgpr
95 #define PAGE_SHARED _MOD_PROT(pgpr
96 #define PAGE_SHARED_EXEC _MOD_PROT(pgpr
97 #define PAGE_COPY _MOD_PROT(pgpr
98 #define PAGE_COPY_EXEC _MOD_PROT(pgpr
99 #define PAGE_READONLY _MOD_PROT(pgpr
100 #define PAGE_READONLY_EXEC _MOD_PROT(pgpr
101 #define PAGE_KERNEL _MOD_PROT(pgpr
102 #define PAGE_KERNEL_EXEC pgprot_kernel
103
104 #define __PAGE_NONE __pgprot(_L_PT
105 #define __PAGE_SHARED __pgprot(_L_PT
106 #define __PAGE_SHARED_EXEC __pgprot(_L_PT
107 #define __PAGE_COPY __pgprot(_L_PT
108 #define __PAGE_COPY_EXEC __pgprot(_L_PT
109 #define __PAGE_READONLY __pgprot(_L_PT
110 #define __PAGE_READONLY_EXEC __pgprot(_L_PT
111
112 #define __pgprot_modify(prot,mask,bits)
113 __pgprot((pgprot_val(prot) & ~(mask))
114
115 #define pgprot_noncached(prot) \
116 __pgprot_modify(prot, L_PTE_MT_MASK, L
117
118 #define pgprot_writecombine(prot) \
119 __pgprot_modify(prot, L_PTE_MT_MASK, L
120
121 #define pgprot_stronglyordered(prot) \
122 __pgprot_modify(prot, L_PTE_MT_MASK, L
123
124 #define pgprot_device(prot) \
125 __pgprot_modify(prot, L_PTE_MT_MASK, L
126
127 #ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
128 #define pgprot_dmacoherent(prot) \
129 __pgprot_modify(prot, L_PTE_MT_MASK, L
130 #define __HAVE_PHYS_MEM_ACCESS_PROT
131 struct file;
132 extern pgprot_t phys_mem_access_prot(struct fi
133 unsigned
134 #else
135 #define pgprot_dmacoherent(prot) \
136 __pgprot_modify(prot, L_PTE_MT_MASK, L
137 #endif
138
139 #endif /* __ASSEMBLY__ */
140
141 /*
142 * The table below defines the page protection
143 * Linux page table version. These get transl
144 * architecture can perform. Note that on mos
145 * 1) We cannot do execute protection
146 * 2) If we could do execute protection, then
147 * 3) write implies read permissions
148 */
149
150 #ifndef __ASSEMBLY__
151
152 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
153
154 #define pgdp_get(pgpd) READ_ONCE(*pgd
155
156 #define pud_page(pud) pmd_page(__pmd
157 #define pud_write(pud) pmd_write(__pm
158
159 #define pmd_none(pmd) (!pmd_val(pmd)
160
161 static inline pte_t *pmd_page_vaddr(pmd_t pmd)
162 {
163 return __va(pmd_val(pmd) & PHYS_MASK &
164 }
165
166 #define pmd_page(pmd) pfn_to_page(__
167
168 #define pte_pfn(pte) ((pte_val(pte)
169 #define pfn_pte(pfn,prot) __pte(__pfn_to
170
171 #define pte_page(pte) pfn_to_page(pt
172 #define mk_pte(page,prot) pfn_pte(page_t
173
174 #define pte_clear(mm,addr,ptep) set_pte_ext(pt
175
176 #define pte_isset(pte, val) ((u32)(val) ==
177
178 #define pte_isclear(pte, val) (!(pte_val(pte
179
180 #define pte_none(pte) (!pte_val(pte)
181 #define pte_present(pte) (pte_isset((pt
182 #define pte_valid(pte) (pte_isset((pt
183 #define pte_accessible(mm, pte) (mm_tlb_flush_
184 #define pte_write(pte) (pte_isclear((
185 #define pte_dirty(pte) (pte_isset((pt
186 #define pte_young(pte) (pte_isset((pt
187 #define pte_exec(pte) (pte_isclear((
188
189 #define pte_valid_user(pte) \
190 (pte_valid(pte) && pte_isset((pte), L_
191
192 static inline bool pte_access_permitted(pte_t
193 {
194 pteval_t mask = L_PTE_PRESENT | L_PTE_
195 pteval_t needed = mask;
196
197 if (write)
198 mask |= L_PTE_RDONLY;
199
200 return (pte_val(pte) & mask) == needed
201 }
202 #define pte_access_permitted pte_access_permit
203
204 #if __LINUX_ARM_ARCH__ < 6
205 static inline void __sync_icache_dcache(pte_t
206 {
207 }
208 #else
209 extern void __sync_icache_dcache(pte_t pteval)
210 #endif
211
212 #define PFN_PTE_SHIFT PAGE_SHIFT
213
214 void set_ptes(struct mm_struct *mm, unsigned l
215 pte_t *ptep, pte_t pteva
216 #define set_ptes set_ptes
217
218 static inline pte_t clear_pte_bit(pte_t pte, p
219 {
220 pte_val(pte) &= ~pgprot_val(prot);
221 return pte;
222 }
223
224 static inline pte_t set_pte_bit(pte_t pte, pgp
225 {
226 pte_val(pte) |= pgprot_val(prot);
227 return pte;
228 }
229
230 static inline pte_t pte_wrprotect(pte_t pte)
231 {
232 return set_pte_bit(pte, __pgprot(L_PTE
233 }
234
235 static inline pte_t pte_mkwrite_novma(pte_t pt
236 {
237 return clear_pte_bit(pte, __pgprot(L_P
238 }
239
240 static inline pte_t pte_mkclean(pte_t pte)
241 {
242 return clear_pte_bit(pte, __pgprot(L_P
243 }
244
245 static inline pte_t pte_mkdirty(pte_t pte)
246 {
247 return set_pte_bit(pte, __pgprot(L_PTE
248 }
249
250 static inline pte_t pte_mkold(pte_t pte)
251 {
252 return clear_pte_bit(pte, __pgprot(L_P
253 }
254
255 static inline pte_t pte_mkyoung(pte_t pte)
256 {
257 return set_pte_bit(pte, __pgprot(L_PTE
258 }
259
260 static inline pte_t pte_mkexec(pte_t pte)
261 {
262 return clear_pte_bit(pte, __pgprot(L_P
263 }
264
265 static inline pte_t pte_mknexec(pte_t pte)
266 {
267 return set_pte_bit(pte, __pgprot(L_PTE
268 }
269
270 static inline pte_t pte_modify(pte_t pte, pgpr
271 {
272 const pteval_t mask = L_PTE_XN | L_PTE
273 L_PTE_NONE | L_PTE_VALID;
274 pte_val(pte) = (pte_val(pte) & ~mask)
275 return pte;
276 }
277
278 /*
279 * Encode/decode swap entries and swap PTEs. S
280 * are !pte_none() && !pte_present().
281 *
282 * Format of swap PTEs:
283 *
284 * 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1
285 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1
286 * <------------------- offset -------------
287 *
288 * E is the exclusive marker that is not sto
289 *
290 * This gives us up to 31 swap files and 64GB
291 * the offset field is always non-zero.
292 */
293 #define __SWP_TYPE_SHIFT 2
294 #define __SWP_TYPE_BITS 5
295 #define __SWP_TYPE_MASK ((1 << __SWP_T
296 #define __SWP_OFFSET_SHIFT (__SWP_TYPE_BI
297
298 #define __swp_type(x) (((x).val >> _
299 #define __swp_offset(x) ((x).val >> __
300 #define __swp_entry(type, offset) ((swp_entry_
301
302
303 #define __pte_to_swp_entry(pte) ((swp_entry_t)
304 #define __swp_entry_to_pte(swp) __pte((swp).va
305
306 static inline int pte_swp_exclusive(pte_t pte)
307 {
308 return pte_isset(pte, L_PTE_SWP_EXCLUS
309 }
310
311 static inline pte_t pte_swp_mkexclusive(pte_t
312 {
313 return set_pte_bit(pte, __pgprot(L_PTE
314 }
315
316 static inline pte_t pte_swp_clear_exclusive(pt
317 {
318 return clear_pte_bit(pte, __pgprot(L_P
319 }
320
321 /*
322 * It is an error for the kernel to have more
323 * encode in the PTEs. This ensures that we k
324 * is increased beyond what we presently suppo
325 */
326 #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX
327
328 /*
329 * We provide our own arch_get_unmapped_area t
330 */
331 #define HAVE_ARCH_UNMAPPED_AREA
332 #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
333
334 #endif /* !__ASSEMBLY__ */
335
336 #endif /* CONFIG_MMU */
337
338 #endif /* _ASMARM_PGTABLE_H */
339
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