1 /* SPDX-License-Identifier: GPL-2.0 */ 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* ld script to make ARM Linux kernel !! 2 #include <asm/asm-offsets.h>
3 * taken from the i386 version by Russell King !! 3 #include <asm/thread_info.h>
4 * Written by Martin Mares <mj@atrey.karlin.mff <<
5 */ <<
6 4
7 #ifdef CONFIG_XIP_KERNEL !! 5 #define PAGE_SIZE _PAGE_SIZE
8 #include "vmlinux-xip.lds.S" <<
9 #else <<
10 6
11 #include <linux/pgtable.h> !! 7 /*
12 #include <asm/vmlinux.lds.h> !! 8 * Put .bss..swapper_pg_dir as the first thing in .bss. This will
13 #include <asm/cache.h> !! 9 * ensure that it has .bss alignment (64K).
14 #include <asm/thread_info.h> !! 10 */
15 #include <asm/page.h> !! 11 #define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
16 #include <asm/mpu.h> <<
17 12
18 OUTPUT_ARCH(arm) !! 13 /* Cavium Octeon should not have a separate PT_NOTE Program Header. */
19 ENTRY(stext) !! 14 #ifndef CONFIG_CAVIUM_OCTEON_SOC
>> 15 #define EMITS_PT_NOTE
>> 16 #endif
>> 17
>> 18 #define RUNTIME_DISCARD_EXIT
>> 19
>> 20 #include <asm-generic/vmlinux.lds.h>
>> 21
>> 22 #undef mips
>> 23 #define mips mips
>> 24 OUTPUT_ARCH(mips)
>> 25 ENTRY(kernel_entry)
>> 26 PHDRS {
>> 27 text PT_LOAD FLAGS(7); /* RWX */
>> 28 #ifndef CONFIG_CAVIUM_OCTEON_SOC
>> 29 note PT_NOTE FLAGS(4); /* R__ */
>> 30 #endif /* CAVIUM_OCTEON_SOC */
>> 31 }
20 32
21 #ifndef __ARMEB__ !! 33 #ifdef CONFIG_32BIT
22 jiffies = jiffies_64; !! 34 #ifdef CONFIG_CPU_LITTLE_ENDIAN
>> 35 jiffies = jiffies_64;
>> 36 #else
>> 37 jiffies = jiffies_64 + 4;
>> 38 #endif
23 #else 39 #else
24 jiffies = jiffies_64 + 4; !! 40 jiffies = jiffies_64;
25 #endif 41 #endif
26 42
27 SECTIONS 43 SECTIONS
28 { 44 {
29 /* !! 45 #ifdef CONFIG_BOOT_ELF64
30 * XXX: The linker does not define how !! 46 /* Read-only sections, merged into text segment: */
31 * assigned to input sections when the !! 47 /* . = 0xc000000000000000; */
32 * matching the same input section nam !! 48
33 * order of matching. !! 49 /* This is the value for an Origin kernel, taken from an IRIX kernel. */
34 * !! 50 /* . = 0xc00000000001c000; */
35 * unwind exit sections must be discar !! 51
36 * unwind sections get included. !! 52 /* Set the vaddr for the text segment to a value
>> 53 * >= 0xa800 0000 0001 9000 if no symmon is going to configured
>> 54 * >= 0xa800 0000 0030 0000 otherwise
37 */ 55 */
38 /DISCARD/ : { <<
39 ARM_DISCARD <<
40 #ifndef CONFIG_SMP_ON_UP <<
41 *(.alt.smp.init) <<
42 #endif <<
43 #ifndef CONFIG_ARM_UNWIND <<
44 *(.ARM.exidx) *(.ARM.exidx.*) <<
45 *(.ARM.extab) *(.ARM.extab.*) <<
46 #endif <<
47 } <<
48 <<
49 . = KERNEL_OFFSET + TEXT_OFFSET; <<
50 .head.text : { <<
51 _text = .; <<
52 HEAD_TEXT <<
53 } <<
54 <<
55 #ifdef CONFIG_STRICT_KERNEL_RWX <<
56 . = ALIGN(1<<SECTION_SHIFT); <<
57 #endif <<
58 56
59 #ifdef CONFIG_ARM_MPU !! 57 /* . = 0xa800000000300000; */
60 . = ALIGN(PMSAv8_MINALIGN); !! 58 . = 0xffffffff80300000;
61 #endif 59 #endif
62 .text : { /* Rea !! 60 . = LINKER_LOAD_ADDRESS;
63 _stext = .; /* Tex !! 61 /* read-only */
64 ARM_TEXT !! 62 _text = .; /* Text and read-only data */
>> 63 .text : {
>> 64 TEXT_TEXT
>> 65 SCHED_TEXT
>> 66 LOCK_TEXT
>> 67 KPROBES_TEXT
>> 68 IRQENTRY_TEXT
>> 69 SOFTIRQENTRY_TEXT
>> 70 *(.fixup)
>> 71 *(.gnu.warning)
>> 72 . = ALIGN(16);
>> 73 *(.got) /* Global offset table */
>> 74 } :text = 0
>> 75 _etext = .; /* End of text section */
>> 76
>> 77 EXCEPTION_TABLE(16)
>> 78
>> 79 /* Exception table for data bus errors */
>> 80 __dbe_table : {
>> 81 __start___dbe_table = .;
>> 82 KEEP(*(__dbe_table))
>> 83 __stop___dbe_table = .;
>> 84 }
>> 85
>> 86 _sdata = .; /* Start of data section */
>> 87 RO_DATA(4096)
>> 88
>> 89 /* writeable */
>> 90 .data : { /* Data */
>> 91 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */
>> 92
>> 93 INIT_TASK_DATA(THREAD_SIZE)
>> 94 NOSAVE_DATA
>> 95 PAGE_ALIGNED_DATA(PAGE_SIZE)
>> 96 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
>> 97 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
>> 98 DATA_DATA
>> 99 CONSTRUCTORS
>> 100 }
>> 101 BUG_TABLE
>> 102 _gp = . + 0x8000;
>> 103 .lit8 : {
>> 104 *(.lit8)
>> 105 }
>> 106 .lit4 : {
>> 107 *(.lit4)
>> 108 }
>> 109 /* We want the small data sections together, so single-instruction offsets
>> 110 can access them all, and initialized data all before uninitialized, so
>> 111 we can shorten the on-disk segment size. */
>> 112 .sdata : {
>> 113 *(.sdata)
65 } 114 }
>> 115 _edata = .; /* End of data section */
66 116
67 #ifdef CONFIG_DEBUG_ALIGN_RODATA !! 117 /* will be freed after init */
68 . = ALIGN(1<<SECTION_SHIFT); !! 118 . = ALIGN(PAGE_SIZE); /* Init code and data */
69 #endif !! 119 __init_begin = .;
70 _etext = .; /* End !! 120 INIT_TEXT_SECTION(PAGE_SIZE)
71 !! 121 INIT_DATA_SECTION(16)
72 RO_DATA(PAGE_SIZE) <<
73 122
74 . = ALIGN(4); 123 . = ALIGN(4);
75 __ex_table : AT(ADDR(__ex_table) - LOA !! 124 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
76 __start___ex_table = .; !! 125 __mips_machines_start = .;
77 ARM_MMU_KEEP(KEEP(*(__ex_table !! 126 KEEP(*(.mips.machines.init))
78 __stop___ex_table = .; !! 127 __mips_machines_end = .;
79 } 128 }
80 129
81 #ifdef CONFIG_ARM_UNWIND !! 130 /* .exit.text is discarded at runtime, not link time, to deal with
82 ARM_UNWIND_SECTIONS !! 131 * references from .rodata
83 #endif !! 132 */
84 <<
85 #ifdef CONFIG_STRICT_KERNEL_RWX <<
86 . = ALIGN(1<<SECTION_SHIFT); <<
87 #else <<
88 . = ALIGN(PAGE_SIZE); <<
89 #endif <<
90 __init_begin = .; <<
91 <<
92 ARM_VECTORS <<
93 INIT_TEXT_SECTION(8) <<
94 .exit.text : { 133 .exit.text : {
95 ARM_EXIT_KEEP(EXIT_TEXT) !! 134 EXIT_TEXT
96 } <<
97 .init.proc.info : { <<
98 ARM_CPU_DISCARD(PROC_INFO) <<
99 } 135 }
100 .init.arch.info : { !! 136 .exit.data : {
101 __arch_info_begin = .; !! 137 EXIT_DATA
102 KEEP(*(.arch.info.init)) <<
103 __arch_info_end = .; <<
104 } <<
105 .init.tagtable : { <<
106 __tagtable_begin = .; <<
107 *(.taglist.init) <<
108 __tagtable_end = .; <<
109 } <<
110 #ifdef CONFIG_SMP_ON_UP <<
111 .init.smpalt : { <<
112 __smpalt_begin = .; <<
113 *(.alt.smp.init) <<
114 __smpalt_end = .; <<
115 } <<
116 #endif <<
117 .init.pv_table : { <<
118 __pv_table_begin = .; <<
119 KEEP(*(.pv_table)) <<
120 __pv_table_end = .; <<
121 } 138 }
>> 139 #ifdef CONFIG_SMP
>> 140 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
>> 141 #endif
122 142
123 INIT_DATA_SECTION(16) !! 143 .rel.dyn : ALIGN(8) {
124 !! 144 *(.rel)
125 .exit.data : { !! 145 *(.rel*)
126 ARM_EXIT_KEEP(EXIT_DATA) <<
127 } 146 }
128 147
129 #ifdef CONFIG_SMP !! 148 #ifdef CONFIG_MIPS_ELF_APPENDED_DTB
130 PERCPU_SECTION(L1_CACHE_BYTES) !! 149 STRUCT_ALIGN();
>> 150 .appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) {
>> 151 *(.appended_dtb)
>> 152 KEEP(*(.appended_dtb))
>> 153 }
131 #endif 154 #endif
132 155
133 #ifdef CONFIG_HAVE_TCM !! 156 #ifdef CONFIG_RELOCATABLE
134 ARM_TCM !! 157 . = ALIGN(4);
>> 158
>> 159 .data.reloc : {
>> 160 _relocation_start = .;
>> 161 /*
>> 162 * Space for relocation table
>> 163 * This needs to be filled so that the
>> 164 * relocs tool can overwrite the content.
>> 165 * An invalid value is left at the start of the
>> 166 * section to abort relocation if the table
>> 167 * has not been filled in.
>> 168 */
>> 169 LONG(0xFFFFFFFF);
>> 170 FILL(0);
>> 171 . += CONFIG_RELOCATION_TABLE_SIZE - 4;
>> 172 _relocation_end = .;
>> 173 }
135 #endif 174 #endif
136 175
137 #ifdef CONFIG_STRICT_KERNEL_RWX !! 176 #ifdef CONFIG_MIPS_RAW_APPENDED_DTB
138 . = ALIGN(1<<SECTION_SHIFT); !! 177 .fill : {
139 #else !! 178 FILL(0);
140 . = ALIGN(THREAD_ALIGN); !! 179 BYTE(0);
>> 180 STRUCT_ALIGN();
>> 181 }
>> 182 __appended_dtb = .;
>> 183 /* leave space for appended DTB */
>> 184 . += 0x100000;
141 #endif 185 #endif
>> 186 /*
>> 187 * Align to 64K in attempt to eliminate holes before the
>> 188 * .bss..swapper_pg_dir section at the start of .bss. This
>> 189 * also satisfies PAGE_SIZE alignment as the largest page size
>> 190 * allowed is 64K.
>> 191 */
>> 192 . = ALIGN(0x10000);
142 __init_end = .; 193 __init_end = .;
>> 194 /* freed after init ends here */
143 195
144 _sdata = .; !! 196 /*
145 RW_DATA(L1_CACHE_BYTES, PAGE_SIZE, THR !! 197 * Force .bss to 64K alignment so that .bss..swapper_pg_dir
146 _edata = .; !! 198 * gets that alignment. .sbss should be empty, so there will be
147 !! 199 * no holes after __init_end. */
148 BSS_SECTION(0, 0, 0) !! 200 BSS_SECTION(0, 0x10000, 8)
149 #ifdef CONFIG_ARM_MPU <<
150 . = ALIGN(PMSAv8_MINALIGN); <<
151 #endif <<
152 _end = .; <<
153 201
154 STABS_DEBUG !! 202 _end = . ;
155 DWARF_DEBUG <<
156 ARM_DETAILS <<
157 203
158 ARM_ASSERTS !! 204 /* These mark the ABI of the kernel for debuggers. */
159 } !! 205 .mdebug.abi32 : {
>> 206 KEEP(*(.mdebug.abi32))
>> 207 }
>> 208 .mdebug.abi64 : {
>> 209 KEEP(*(.mdebug.abi64))
>> 210 }
160 211
161 #ifdef CONFIG_STRICT_KERNEL_RWX !! 212 /* This is the MIPS specific mdebug section. */
162 /* !! 213 .mdebug : {
163 * Without CONFIG_DEBUG_ALIGN_RODATA, __start_ !! 214 *(.mdebug)
164 * be the first section-aligned location after !! 215 }
165 * it will be equal to __start_rodata. <<
166 */ <<
167 __start_rodata_section_aligned = ALIGN(__start <<
168 #endif <<
169 216
170 /* !! 217 STABS_DEBUG
171 * These must never be empty !! 218 DWARF_DEBUG
172 * If you have to comment these two assert sta !! 219 ELF_DETAILS
173 * binutils is too old (for other reasons as w !! 220
174 */ !! 221 /* These must appear regardless of . */
175 ASSERT((__proc_info_end - __proc_info_begin), !! 222 .gptab.sdata : {
176 #ifndef CONFIG_COMPILE_TEST !! 223 *(.gptab.data)
177 ASSERT((__arch_info_end - __arch_info_begin), !! 224 *(.gptab.sdata)
178 #endif !! 225 }
>> 226 .gptab.sbss : {
>> 227 *(.gptab.bss)
>> 228 *(.gptab.sbss)
>> 229 }
179 230
180 #endif /* CONFIG_XIP_KERNEL */ !! 231 /* Sections to be discarded */
>> 232 DISCARDS
>> 233 /DISCARD/ : {
>> 234 /* ABI crap starts here */
>> 235 *(.MIPS.abiflags)
>> 236 *(.MIPS.options)
>> 237 *(.gnu.attributes)
>> 238 *(.options)
>> 239 *(.pdr)
>> 240 *(.reginfo)
>> 241 }
>> 242 }
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