1 // SPDX-License-Identifier: GPL-2.0-only 1
2 /*
3 * TI DA830/OMAP L137 chip specific setup
4 *
5 * Author: Mark A. Greer <mgreer@mvista.com>
6 *
7 * 2009 (c) MontaVista Software, Inc.
8 */
9 #include <linux/clk-provider.h>
10 #include <linux/clk/davinci.h>
11 #include <linux/gpio.h>
12 #include <linux/init.h>
13 #include <linux/io.h>
14 #include <linux/irqchip/irq-davinci-cp-intc.h>
15
16 #include <clocksource/timer-davinci.h>
17
18 #include <asm/mach/map.h>
19
20 #include "common.h"
21 #include "cputype.h"
22 #include "da8xx.h"
23 #include "irqs.h"
24 #include "mux.h"
25
26 /* Offsets of the 8 compare registers on the d
27 #define DA830_CMP12_0 0x60
28 #define DA830_CMP12_1 0x64
29 #define DA830_CMP12_2 0x68
30 #define DA830_CMP12_3 0x6c
31 #define DA830_CMP12_4 0x70
32 #define DA830_CMP12_5 0x74
33 #define DA830_CMP12_6 0x78
34 #define DA830_CMP12_7 0x7c
35
36 #define DA830_REF_FREQ 24000000
37
38 /*
39 * Device specific mux setup
40 *
41 * soc description mux
42 * reg
43 */
44 static const struct mux_config da830_pins[] =
45 #ifdef CONFIG_DAVINCI_MUX
46 MUX_CFG(DA830, GPIO7_14, 0,
47 MUX_CFG(DA830, RTCK, 0,
48 MUX_CFG(DA830, GPIO7_15, 0,
49 MUX_CFG(DA830, EMU_0, 0,
50 MUX_CFG(DA830, EMB_SDCKE, 0,
51 MUX_CFG(DA830, EMB_CLK_GLUE, 0,
52 MUX_CFG(DA830, EMB_CLK, 0,
53 MUX_CFG(DA830, NEMB_CS_0, 0,
54 MUX_CFG(DA830, NEMB_CAS, 0,
55 MUX_CFG(DA830, NEMB_RAS, 0,
56 MUX_CFG(DA830, NEMB_WE, 0,
57 MUX_CFG(DA830, EMB_BA_1, 1,
58 MUX_CFG(DA830, EMB_BA_0, 1,
59 MUX_CFG(DA830, EMB_A_0, 1,
60 MUX_CFG(DA830, EMB_A_1, 1,
61 MUX_CFG(DA830, EMB_A_2, 1,
62 MUX_CFG(DA830, EMB_A_3, 1,
63 MUX_CFG(DA830, EMB_A_4, 1,
64 MUX_CFG(DA830, EMB_A_5, 1,
65 MUX_CFG(DA830, GPIO7_0, 1,
66 MUX_CFG(DA830, GPIO7_1, 1,
67 MUX_CFG(DA830, GPIO7_2, 1,
68 MUX_CFG(DA830, GPIO7_3, 1,
69 MUX_CFG(DA830, GPIO7_4, 1,
70 MUX_CFG(DA830, GPIO7_5, 1,
71 MUX_CFG(DA830, GPIO7_6, 1,
72 MUX_CFG(DA830, GPIO7_7, 1,
73 MUX_CFG(DA830, EMB_A_6, 2,
74 MUX_CFG(DA830, EMB_A_7, 2,
75 MUX_CFG(DA830, EMB_A_8, 2,
76 MUX_CFG(DA830, EMB_A_9, 2,
77 MUX_CFG(DA830, EMB_A_10, 2,
78 MUX_CFG(DA830, EMB_A_11, 2,
79 MUX_CFG(DA830, EMB_A_12, 2,
80 MUX_CFG(DA830, EMB_D_31, 2,
81 MUX_CFG(DA830, GPIO7_8, 2,
82 MUX_CFG(DA830, GPIO7_9, 2,
83 MUX_CFG(DA830, GPIO7_10, 2,
84 MUX_CFG(DA830, GPIO7_11, 2,
85 MUX_CFG(DA830, GPIO7_12, 2,
86 MUX_CFG(DA830, GPIO7_13, 2,
87 MUX_CFG(DA830, GPIO3_13, 2,
88 MUX_CFG(DA830, EMB_D_30, 3,
89 MUX_CFG(DA830, EMB_D_29, 3,
90 MUX_CFG(DA830, EMB_D_28, 3,
91 MUX_CFG(DA830, EMB_D_27, 3,
92 MUX_CFG(DA830, EMB_D_26, 3,
93 MUX_CFG(DA830, EMB_D_25, 3,
94 MUX_CFG(DA830, EMB_D_24, 3,
95 MUX_CFG(DA830, EMB_D_23, 3,
96 MUX_CFG(DA830, EMB_D_22, 4,
97 MUX_CFG(DA830, EMB_D_21, 4,
98 MUX_CFG(DA830, EMB_D_20, 4,
99 MUX_CFG(DA830, EMB_D_19, 4,
100 MUX_CFG(DA830, EMB_D_18, 4,
101 MUX_CFG(DA830, EMB_D_17, 4,
102 MUX_CFG(DA830, EMB_D_16, 4,
103 MUX_CFG(DA830, NEMB_WE_DQM_3, 4,
104 MUX_CFG(DA830, NEMB_WE_DQM_2, 5,
105 MUX_CFG(DA830, EMB_D_0, 5,
106 MUX_CFG(DA830, EMB_D_1, 5,
107 MUX_CFG(DA830, EMB_D_2, 5,
108 MUX_CFG(DA830, EMB_D_3, 5,
109 MUX_CFG(DA830, EMB_D_4, 5,
110 MUX_CFG(DA830, EMB_D_5, 5,
111 MUX_CFG(DA830, EMB_D_6, 5,
112 MUX_CFG(DA830, GPIO6_0, 5,
113 MUX_CFG(DA830, GPIO6_1, 5,
114 MUX_CFG(DA830, GPIO6_2, 5,
115 MUX_CFG(DA830, GPIO6_3, 5,
116 MUX_CFG(DA830, GPIO6_4, 5,
117 MUX_CFG(DA830, GPIO6_5, 5,
118 MUX_CFG(DA830, GPIO6_6, 5,
119 MUX_CFG(DA830, EMB_D_7, 6,
120 MUX_CFG(DA830, EMB_D_8, 6,
121 MUX_CFG(DA830, EMB_D_9, 6,
122 MUX_CFG(DA830, EMB_D_10, 6,
123 MUX_CFG(DA830, EMB_D_11, 6,
124 MUX_CFG(DA830, EMB_D_12, 6,
125 MUX_CFG(DA830, EMB_D_13, 6,
126 MUX_CFG(DA830, EMB_D_14, 6,
127 MUX_CFG(DA830, GPIO6_7, 6,
128 MUX_CFG(DA830, GPIO6_8, 6,
129 MUX_CFG(DA830, GPIO6_9, 6,
130 MUX_CFG(DA830, GPIO6_10, 6,
131 MUX_CFG(DA830, GPIO6_11, 6,
132 MUX_CFG(DA830, GPIO6_12, 6,
133 MUX_CFG(DA830, GPIO6_13, 6,
134 MUX_CFG(DA830, GPIO6_14, 6,
135 MUX_CFG(DA830, EMB_D_15, 7,
136 MUX_CFG(DA830, NEMB_WE_DQM_1, 7,
137 MUX_CFG(DA830, NEMB_WE_DQM_0, 7,
138 MUX_CFG(DA830, SPI0_SOMI_0, 7,
139 MUX_CFG(DA830, SPI0_SIMO_0, 7,
140 MUX_CFG(DA830, SPI0_CLK, 7,
141 MUX_CFG(DA830, NSPI0_ENA, 7,
142 MUX_CFG(DA830, NSPI0_SCS_0, 7,
143 MUX_CFG(DA830, EQEP0I, 7,
144 MUX_CFG(DA830, EQEP0S, 7,
145 MUX_CFG(DA830, EQEP1I, 7,
146 MUX_CFG(DA830, NUART0_CTS, 7,
147 MUX_CFG(DA830, NUART0_RTS, 7,
148 MUX_CFG(DA830, EQEP0A, 7,
149 MUX_CFG(DA830, EQEP0B, 7,
150 MUX_CFG(DA830, GPIO6_15, 7,
151 MUX_CFG(DA830, GPIO5_14, 7,
152 MUX_CFG(DA830, GPIO5_15, 7,
153 MUX_CFG(DA830, GPIO5_0, 7,
154 MUX_CFG(DA830, GPIO5_1, 7,
155 MUX_CFG(DA830, GPIO5_2, 7,
156 MUX_CFG(DA830, GPIO5_3, 7,
157 MUX_CFG(DA830, GPIO5_4, 7,
158 MUX_CFG(DA830, SPI1_SOMI_0, 8,
159 MUX_CFG(DA830, SPI1_SIMO_0, 8,
160 MUX_CFG(DA830, SPI1_CLK, 8,
161 MUX_CFG(DA830, UART0_RXD, 8,
162 MUX_CFG(DA830, UART0_TXD, 8,
163 MUX_CFG(DA830, AXR1_10, 8,
164 MUX_CFG(DA830, AXR1_11, 8,
165 MUX_CFG(DA830, NSPI1_ENA, 8,
166 MUX_CFG(DA830, I2C1_SCL, 8,
167 MUX_CFG(DA830, I2C1_SDA, 8,
168 MUX_CFG(DA830, EQEP1S, 8,
169 MUX_CFG(DA830, I2C0_SDA, 8,
170 MUX_CFG(DA830, I2C0_SCL, 8,
171 MUX_CFG(DA830, UART2_RXD, 8,
172 MUX_CFG(DA830, TM64P0_IN12, 8,
173 MUX_CFG(DA830, TM64P0_OUT12, 8,
174 MUX_CFG(DA830, GPIO5_5, 8,
175 MUX_CFG(DA830, GPIO5_6, 8,
176 MUX_CFG(DA830, GPIO5_7, 8,
177 MUX_CFG(DA830, GPIO5_8, 8,
178 MUX_CFG(DA830, GPIO5_9, 8,
179 MUX_CFG(DA830, GPIO5_10, 8,
180 MUX_CFG(DA830, GPIO5_11, 8,
181 MUX_CFG(DA830, GPIO5_12, 8,
182 MUX_CFG(DA830, NSPI1_SCS_0, 9,
183 MUX_CFG(DA830, USB0_DRVVBUS, 9,
184 MUX_CFG(DA830, AHCLKX0, 9,
185 MUX_CFG(DA830, ACLKX0, 9,
186 MUX_CFG(DA830, AFSX0, 9,
187 MUX_CFG(DA830, AHCLKR0, 9,
188 MUX_CFG(DA830, ACLKR0, 9,
189 MUX_CFG(DA830, AFSR0, 9,
190 MUX_CFG(DA830, UART2_TXD, 9,
191 MUX_CFG(DA830, AHCLKX2, 9,
192 MUX_CFG(DA830, ECAP0_APWM0, 9,
193 MUX_CFG(DA830, RMII_MHZ_50_CLK, 9,
194 MUX_CFG(DA830, ECAP1_APWM1, 9,
195 MUX_CFG(DA830, USB_REFCLKIN, 9,
196 MUX_CFG(DA830, GPIO5_13, 9,
197 MUX_CFG(DA830, GPIO4_15, 9,
198 MUX_CFG(DA830, GPIO2_11, 9,
199 MUX_CFG(DA830, GPIO2_12, 9,
200 MUX_CFG(DA830, GPIO2_13, 9,
201 MUX_CFG(DA830, GPIO2_14, 9,
202 MUX_CFG(DA830, GPIO2_15, 9,
203 MUX_CFG(DA830, GPIO3_12, 9,
204 MUX_CFG(DA830, AMUTE0, 10,
205 MUX_CFG(DA830, AXR0_0, 10,
206 MUX_CFG(DA830, AXR0_1, 10,
207 MUX_CFG(DA830, AXR0_2, 10,
208 MUX_CFG(DA830, AXR0_3, 10,
209 MUX_CFG(DA830, AXR0_4, 10,
210 MUX_CFG(DA830, AXR0_5, 10,
211 MUX_CFG(DA830, AXR0_6, 10,
212 MUX_CFG(DA830, RMII_TXD_0, 10,
213 MUX_CFG(DA830, RMII_TXD_1, 10,
214 MUX_CFG(DA830, RMII_TXEN, 10,
215 MUX_CFG(DA830, RMII_CRS_DV, 10,
216 MUX_CFG(DA830, RMII_RXD_0, 10,
217 MUX_CFG(DA830, RMII_RXD_1, 10,
218 MUX_CFG(DA830, RMII_RXER, 10,
219 MUX_CFG(DA830, AFSR2, 10,
220 MUX_CFG(DA830, ACLKX2, 10,
221 MUX_CFG(DA830, AXR2_3, 10,
222 MUX_CFG(DA830, AXR2_2, 10,
223 MUX_CFG(DA830, AXR2_1, 10,
224 MUX_CFG(DA830, AFSX2, 10,
225 MUX_CFG(DA830, ACLKR2, 10,
226 MUX_CFG(DA830, NRESETOUT, 10,
227 MUX_CFG(DA830, GPIO3_0, 10,
228 MUX_CFG(DA830, GPIO3_1, 10,
229 MUX_CFG(DA830, GPIO3_2, 10,
230 MUX_CFG(DA830, GPIO3_3, 10,
231 MUX_CFG(DA830, GPIO3_4, 10,
232 MUX_CFG(DA830, GPIO3_5, 10,
233 MUX_CFG(DA830, GPIO3_6, 10,
234 MUX_CFG(DA830, AXR0_7, 11,
235 MUX_CFG(DA830, AXR0_8, 11,
236 MUX_CFG(DA830, UART1_RXD, 11,
237 MUX_CFG(DA830, UART1_TXD, 11,
238 MUX_CFG(DA830, AXR0_11, 11,
239 MUX_CFG(DA830, AHCLKX1, 11,
240 MUX_CFG(DA830, ACLKX1, 11,
241 MUX_CFG(DA830, AFSX1, 11,
242 MUX_CFG(DA830, MDIO_CLK, 11,
243 MUX_CFG(DA830, MDIO_D, 11,
244 MUX_CFG(DA830, AXR0_9, 11,
245 MUX_CFG(DA830, AXR0_10, 11,
246 MUX_CFG(DA830, EPWM0B, 11,
247 MUX_CFG(DA830, EPWM0A, 11,
248 MUX_CFG(DA830, EPWMSYNCI, 11,
249 MUX_CFG(DA830, AXR2_0, 11,
250 MUX_CFG(DA830, EPWMSYNC0, 11,
251 MUX_CFG(DA830, GPIO3_7, 11,
252 MUX_CFG(DA830, GPIO3_8, 11,
253 MUX_CFG(DA830, GPIO3_9, 11,
254 MUX_CFG(DA830, GPIO3_10, 11,
255 MUX_CFG(DA830, GPIO3_11, 11,
256 MUX_CFG(DA830, GPIO3_14, 11,
257 MUX_CFG(DA830, GPIO3_15, 11,
258 MUX_CFG(DA830, GPIO4_10, 11,
259 MUX_CFG(DA830, AHCLKR1, 12,
260 MUX_CFG(DA830, ACLKR1, 12,
261 MUX_CFG(DA830, AFSR1, 12,
262 MUX_CFG(DA830, AMUTE1, 12,
263 MUX_CFG(DA830, AXR1_0, 12,
264 MUX_CFG(DA830, AXR1_1, 12,
265 MUX_CFG(DA830, AXR1_2, 12,
266 MUX_CFG(DA830, AXR1_3, 12,
267 MUX_CFG(DA830, ECAP2_APWM2, 12,
268 MUX_CFG(DA830, EHRPWMGLUETZ, 12,
269 MUX_CFG(DA830, EQEP1A, 12,
270 MUX_CFG(DA830, GPIO4_11, 12,
271 MUX_CFG(DA830, GPIO4_12, 12,
272 MUX_CFG(DA830, GPIO4_13, 12,
273 MUX_CFG(DA830, GPIO4_14, 12,
274 MUX_CFG(DA830, GPIO4_0, 12,
275 MUX_CFG(DA830, GPIO4_1, 12,
276 MUX_CFG(DA830, GPIO4_2, 12,
277 MUX_CFG(DA830, GPIO4_3, 12,
278 MUX_CFG(DA830, AXR1_4, 13,
279 MUX_CFG(DA830, AXR1_5, 13,
280 MUX_CFG(DA830, AXR1_6, 13,
281 MUX_CFG(DA830, AXR1_7, 13,
282 MUX_CFG(DA830, AXR1_8, 13,
283 MUX_CFG(DA830, AXR1_9, 13,
284 MUX_CFG(DA830, EMA_D_0, 13,
285 MUX_CFG(DA830, EMA_D_1, 13,
286 MUX_CFG(DA830, EQEP1B, 13,
287 MUX_CFG(DA830, EPWM2B, 13,
288 MUX_CFG(DA830, EPWM2A, 13,
289 MUX_CFG(DA830, EPWM1B, 13,
290 MUX_CFG(DA830, EPWM1A, 13,
291 MUX_CFG(DA830, MMCSD_DAT_0, 13,
292 MUX_CFG(DA830, MMCSD_DAT_1, 13,
293 MUX_CFG(DA830, UHPI_HD_0, 13,
294 MUX_CFG(DA830, UHPI_HD_1, 13,
295 MUX_CFG(DA830, GPIO4_4, 13,
296 MUX_CFG(DA830, GPIO4_5, 13,
297 MUX_CFG(DA830, GPIO4_6, 13,
298 MUX_CFG(DA830, GPIO4_7, 13,
299 MUX_CFG(DA830, GPIO4_8, 13,
300 MUX_CFG(DA830, GPIO4_9, 13,
301 MUX_CFG(DA830, GPIO0_0, 13,
302 MUX_CFG(DA830, GPIO0_1, 13,
303 MUX_CFG(DA830, EMA_D_2, 14,
304 MUX_CFG(DA830, EMA_D_3, 14,
305 MUX_CFG(DA830, EMA_D_4, 14,
306 MUX_CFG(DA830, EMA_D_5, 14,
307 MUX_CFG(DA830, EMA_D_6, 14,
308 MUX_CFG(DA830, EMA_D_7, 14,
309 MUX_CFG(DA830, EMA_D_8, 14,
310 MUX_CFG(DA830, EMA_D_9, 14,
311 MUX_CFG(DA830, MMCSD_DAT_2, 14,
312 MUX_CFG(DA830, MMCSD_DAT_3, 14,
313 MUX_CFG(DA830, MMCSD_DAT_4, 14,
314 MUX_CFG(DA830, MMCSD_DAT_5, 14,
315 MUX_CFG(DA830, MMCSD_DAT_6, 14,
316 MUX_CFG(DA830, MMCSD_DAT_7, 14,
317 MUX_CFG(DA830, UHPI_HD_8, 14,
318 MUX_CFG(DA830, UHPI_HD_9, 14,
319 MUX_CFG(DA830, UHPI_HD_2, 14,
320 MUX_CFG(DA830, UHPI_HD_3, 14,
321 MUX_CFG(DA830, UHPI_HD_4, 14,
322 MUX_CFG(DA830, UHPI_HD_5, 14,
323 MUX_CFG(DA830, UHPI_HD_6, 14,
324 MUX_CFG(DA830, UHPI_HD_7, 14,
325 MUX_CFG(DA830, LCD_D_8, 14,
326 MUX_CFG(DA830, LCD_D_9, 14,
327 MUX_CFG(DA830, GPIO0_2, 14,
328 MUX_CFG(DA830, GPIO0_3, 14,
329 MUX_CFG(DA830, GPIO0_4, 14,
330 MUX_CFG(DA830, GPIO0_5, 14,
331 MUX_CFG(DA830, GPIO0_6, 14,
332 MUX_CFG(DA830, GPIO0_7, 14,
333 MUX_CFG(DA830, GPIO0_8, 14,
334 MUX_CFG(DA830, GPIO0_9, 14,
335 MUX_CFG(DA830, EMA_D_10, 15,
336 MUX_CFG(DA830, EMA_D_11, 15,
337 MUX_CFG(DA830, EMA_D_12, 15,
338 MUX_CFG(DA830, EMA_D_13, 15,
339 MUX_CFG(DA830, EMA_D_14, 15,
340 MUX_CFG(DA830, EMA_D_15, 15,
341 MUX_CFG(DA830, EMA_A_0, 15,
342 MUX_CFG(DA830, EMA_A_1, 15,
343 MUX_CFG(DA830, UHPI_HD_10, 15,
344 MUX_CFG(DA830, UHPI_HD_11, 15,
345 MUX_CFG(DA830, UHPI_HD_12, 15,
346 MUX_CFG(DA830, UHPI_HD_13, 15,
347 MUX_CFG(DA830, UHPI_HD_14, 15,
348 MUX_CFG(DA830, UHPI_HD_15, 15,
349 MUX_CFG(DA830, LCD_D_7, 15,
350 MUX_CFG(DA830, MMCSD_CLK, 15,
351 MUX_CFG(DA830, LCD_D_10, 15,
352 MUX_CFG(DA830, LCD_D_11, 15,
353 MUX_CFG(DA830, LCD_D_12, 15,
354 MUX_CFG(DA830, LCD_D_13, 15,
355 MUX_CFG(DA830, LCD_D_14, 15,
356 MUX_CFG(DA830, LCD_D_15, 15,
357 MUX_CFG(DA830, UHPI_HCNTL0, 15,
358 MUX_CFG(DA830, GPIO0_10, 15,
359 MUX_CFG(DA830, GPIO0_11, 15,
360 MUX_CFG(DA830, GPIO0_12, 15,
361 MUX_CFG(DA830, GPIO0_13, 15,
362 MUX_CFG(DA830, GPIO0_14, 15,
363 MUX_CFG(DA830, GPIO0_15, 15,
364 MUX_CFG(DA830, GPIO1_0, 15,
365 MUX_CFG(DA830, GPIO1_1, 15,
366 MUX_CFG(DA830, EMA_A_2, 16,
367 MUX_CFG(DA830, EMA_A_3, 16,
368 MUX_CFG(DA830, EMA_A_4, 16,
369 MUX_CFG(DA830, EMA_A_5, 16,
370 MUX_CFG(DA830, EMA_A_6, 16,
371 MUX_CFG(DA830, EMA_A_7, 16,
372 MUX_CFG(DA830, EMA_A_8, 16,
373 MUX_CFG(DA830, EMA_A_9, 16,
374 MUX_CFG(DA830, MMCSD_CMD, 16,
375 MUX_CFG(DA830, LCD_D_6, 16,
376 MUX_CFG(DA830, LCD_D_3, 16,
377 MUX_CFG(DA830, LCD_D_2, 16,
378 MUX_CFG(DA830, LCD_D_1, 16,
379 MUX_CFG(DA830, LCD_D_0, 16,
380 MUX_CFG(DA830, LCD_PCLK, 16,
381 MUX_CFG(DA830, LCD_HSYNC, 16,
382 MUX_CFG(DA830, UHPI_HCNTL1, 16,
383 MUX_CFG(DA830, GPIO1_2, 16,
384 MUX_CFG(DA830, GPIO1_3, 16,
385 MUX_CFG(DA830, GPIO1_4, 16,
386 MUX_CFG(DA830, GPIO1_5, 16,
387 MUX_CFG(DA830, GPIO1_6, 16,
388 MUX_CFG(DA830, GPIO1_7, 16,
389 MUX_CFG(DA830, GPIO1_8, 16,
390 MUX_CFG(DA830, GPIO1_9, 16,
391 MUX_CFG(DA830, EMA_A_10, 17,
392 MUX_CFG(DA830, EMA_A_11, 17,
393 MUX_CFG(DA830, EMA_A_12, 17,
394 MUX_CFG(DA830, EMA_BA_1, 17,
395 MUX_CFG(DA830, EMA_BA_0, 17,
396 MUX_CFG(DA830, EMA_CLK, 17,
397 MUX_CFG(DA830, EMA_SDCKE, 17,
398 MUX_CFG(DA830, NEMA_CAS, 17,
399 MUX_CFG(DA830, LCD_VSYNC, 17,
400 MUX_CFG(DA830, NLCD_AC_ENB_CS, 17,
401 MUX_CFG(DA830, LCD_MCLK, 17,
402 MUX_CFG(DA830, LCD_D_5, 17,
403 MUX_CFG(DA830, LCD_D_4, 17,
404 MUX_CFG(DA830, OBSCLK, 17,
405 MUX_CFG(DA830, NEMA_CS_4, 17,
406 MUX_CFG(DA830, UHPI_HHWIL, 17,
407 MUX_CFG(DA830, AHCLKR2, 17,
408 MUX_CFG(DA830, GPIO1_10, 17,
409 MUX_CFG(DA830, GPIO1_11, 17,
410 MUX_CFG(DA830, GPIO1_12, 17,
411 MUX_CFG(DA830, GPIO1_13, 17,
412 MUX_CFG(DA830, GPIO1_14, 17,
413 MUX_CFG(DA830, GPIO1_15, 17,
414 MUX_CFG(DA830, GPIO2_0, 17,
415 MUX_CFG(DA830, GPIO2_1, 17,
416 MUX_CFG(DA830, NEMA_RAS, 18,
417 MUX_CFG(DA830, NEMA_WE, 18,
418 MUX_CFG(DA830, NEMA_CS_0, 18,
419 MUX_CFG(DA830, NEMA_CS_2, 18,
420 MUX_CFG(DA830, NEMA_CS_3, 18,
421 MUX_CFG(DA830, NEMA_OE, 18,
422 MUX_CFG(DA830, NEMA_WE_DQM_1, 18,
423 MUX_CFG(DA830, NEMA_WE_DQM_0, 18,
424 MUX_CFG(DA830, NEMA_CS_5, 18,
425 MUX_CFG(DA830, UHPI_HRNW, 18,
426 MUX_CFG(DA830, NUHPI_HAS, 18,
427 MUX_CFG(DA830, NUHPI_HCS, 18,
428 MUX_CFG(DA830, NUHPI_HDS1, 18,
429 MUX_CFG(DA830, NUHPI_HDS2, 18,
430 MUX_CFG(DA830, NUHPI_HINT, 18,
431 MUX_CFG(DA830, AXR0_12, 18,
432 MUX_CFG(DA830, AMUTE2, 18,
433 MUX_CFG(DA830, AXR0_13, 18,
434 MUX_CFG(DA830, AXR0_14, 18,
435 MUX_CFG(DA830, AXR0_15, 18,
436 MUX_CFG(DA830, GPIO2_2, 18,
437 MUX_CFG(DA830, GPIO2_3, 18,
438 MUX_CFG(DA830, GPIO2_4, 18,
439 MUX_CFG(DA830, GPIO2_5, 18,
440 MUX_CFG(DA830, GPIO2_6, 18,
441 MUX_CFG(DA830, GPIO2_7, 18,
442 MUX_CFG(DA830, GPIO2_8, 18,
443 MUX_CFG(DA830, GPIO2_9, 18,
444 MUX_CFG(DA830, EMA_WAIT_0, 19,
445 MUX_CFG(DA830, NUHPI_HRDY, 19,
446 MUX_CFG(DA830, GPIO2_10, 19,
447 #endif
448 };
449
450 static struct map_desc da830_io_desc[] = {
451 {
452 .virtual = IO_VIRT,
453 .pfn = __phys_to_pf
454 .length = IO_SIZE,
455 .type = MT_DEVICE
456 },
457 {
458 .virtual = DA8XX_CP_INT
459 .pfn = __phys_to_pf
460 .length = DA8XX_CP_INT
461 .type = MT_DEVICE
462 },
463 };
464
465 /* Contents of JTAG ID register used to identi
466 static struct davinci_id da830_ids[] = {
467 {
468 .variant = 0x0,
469 .part_no = 0xb7df,
470 .manufacturer = 0x017,
471 .cpu_id = DAVINCI_CPU_
472 .name = "da830/omap-
473 },
474 {
475 .variant = 0x8,
476 .part_no = 0xb7df,
477 .manufacturer = 0x017,
478 .cpu_id = DAVINCI_CPU_
479 .name = "da830/omap-
480 },
481 {
482 .variant = 0x9,
483 .part_no = 0xb7df,
484 .manufacturer = 0x017,
485 .cpu_id = DAVINCI_CPU_
486 .name = "da830/omap-
487 },
488 };
489
490 static const struct davinci_soc_info davinci_s
491 .io_desc = da830_io_des
492 .io_desc_num = ARRAY_SIZE(d
493 .jtag_id_reg = DA8XX_SYSCFG
494 .ids = da830_ids,
495 .ids_num = ARRAY_SIZE(d
496 .pinmux_base = DA8XX_SYSCFG
497 .pinmux_pins = da830_pins,
498 .pinmux_pins_num = ARRAY_SIZE(d
499 };
500
501 void __init da830_init(void)
502 {
503 davinci_common_init(&davinci_soc_info_
504
505 da8xx_syscfg0_base = ioremap(DA8XX_SYS
506 WARN(!da8xx_syscfg0_base, "Unable to m
507 }
508
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