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Linux/arch/arm/mach-davinci/devices-da8xx.c

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Diff markup

Differences between /arch/arm/mach-davinci/devices-da8xx.c (Version linux-6.12-rc7) and /arch/sparc64/mach-davinci/devices-da8xx.c (Version linux-4.20.17)


  1 // SPDX-License-Identifier: GPL-2.0-or-later        1 
  2 /*                                                
  3  * DA8XX/OMAP L1XX platform device data           
  4  *                                                
  5  * Copyright (c) 2007-2009, MontaVista Softwar    
  6  * Derived from code that was:                    
  7  *      Copyright (C) 2006 Komal Shah <komal_s    
  8  */                                               
  9 #include <linux/ahci_platform.h>                  
 10 #include <linux/clk-provider.h>                   
 11 #include <linux/clk.h>                            
 12 #include <linux/clkdev.h>                         
 13 #include <linux/dma-map-ops.h>                    
 14 #include <linux/dmaengine.h>                      
 15 #include <linux/init.h>                           
 16 #include <linux/io.h>                             
 17 #include <linux/platform_device.h>                
 18 #include <linux/reboot.h>                         
 19 #include <linux/serial_8250.h>                    
 20                                                   
 21 #include "common.h"                               
 22 #include "cputype.h"                              
 23 #include "da8xx.h"                                
 24 #include "irqs.h"                                 
 25 #include "sram.h"                                 
 26                                                   
 27 #define DA8XX_TPCC_BASE                 0x01c0    
 28 #define DA8XX_TPTC0_BASE                0x01c0    
 29 #define DA8XX_TPTC1_BASE                0x01c0    
 30 #define DA8XX_WDOG_BASE                 0x01c2    
 31 #define DA8XX_I2C0_BASE                 0x01c2    
 32 #define DA8XX_RTC_BASE                  0x01c2    
 33 #define DA8XX_PRUSS_MEM_BASE            0x01c3    
 34 #define DA8XX_MMCSD0_BASE               0x01c4    
 35 #define DA8XX_SPI0_BASE                 0x01c4    
 36 #define DA830_SPI1_BASE                 0x01e1    
 37 #define DA8XX_LCD_CNTRL_BASE            0x01e1    
 38 #define DA850_SATA_BASE                 0x01e1    
 39 #define DA850_MMCSD1_BASE               0x01e1    
 40 #define DA8XX_EMAC_CPPI_PORT_BASE       0x01e2    
 41 #define DA8XX_EMAC_CPGMACSS_BASE        0x01e2    
 42 #define DA8XX_EMAC_CPGMAC_BASE          0x01e2    
 43 #define DA8XX_EMAC_MDIO_BASE            0x01e2    
 44 #define DA8XX_I2C1_BASE                 0x01e2    
 45 #define DA850_TPCC1_BASE                0x01e3    
 46 #define DA850_TPTC2_BASE                0x01e3    
 47 #define DA850_SPI1_BASE                 0x01f0    
 48 #define DA8XX_DDR2_CTL_BASE             0xb000    
 49                                                   
 50 #define DA8XX_EMAC_CTRL_REG_OFFSET      0x3000    
 51 #define DA8XX_EMAC_MOD_REG_OFFSET       0x2000    
 52 #define DA8XX_EMAC_RAM_OFFSET           0x0000    
 53 #define DA8XX_EMAC_CTRL_RAM_SIZE        SZ_8K     
 54                                                   
 55 void __iomem *da8xx_syscfg0_base;                 
 56 void __iomem *da8xx_syscfg1_base;                 
 57                                                   
 58 static void __iomem *da8xx_ddr2_ctlr_base;        
 59 void __iomem * __init da8xx_get_mem_ctlr(void)    
 60 {                                                 
 61         if (da8xx_ddr2_ctlr_base)                 
 62                 return da8xx_ddr2_ctlr_base;      
 63                                                   
 64         da8xx_ddr2_ctlr_base = ioremap(DA8XX_D    
 65         if (!da8xx_ddr2_ctlr_base)                
 66                 pr_warn("%s: Unable to map DDR    
 67                                                   
 68         return da8xx_ddr2_ctlr_base;              
 69 }                                                 
 70                                                   

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