1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * linux/arch/arm/mach-omap1/ams-delta-fiq-ha
4 *
5 * Based on linux/arch/arm/lib/floppydma.S
6 * Renamed and modified to work with 2.6 kern
7 * Copyright (C) 1995, 1996 Russell King
8 * Copyright (C) 2004 Pete Trapps
9 * Copyright (C) 2006 Matt Callow
10 * Copyright (C) 2010 Janusz Krzysztofik
11 */
12
13 #include <linux/linkage.h>
14 #include <linux/platform_data/ams-delta-fiq.h>
15 #include <linux/platform_data/gpio-omap.h>
16 #include <linux/soc/ti/omap1-io.h>
17
18 #include <asm/assembler.h>
19 #include <asm/irq.h>
20
21 #include "hardware.h"
22 #include "ams-delta-fiq.h"
23 #include "board-ams-delta.h"
24 #include "iomap.h"
25
26 /*
27 * OMAP1510 GPIO related symbol copied from ar
28 * Unfortunately, it was not placed in a separ
29 */
30 #define OMAP1510_GPIO_BASE 0xFFFC
31
32 /* GPIO register bitmasks */
33 #define KEYBRD_DATA_MASK (0x1 <
34 #define KEYBRD_CLK_MASK (0x1 <
35 #define MODEM_IRQ_MASK (0x1 <
36 #define HOOK_SWITCH_MASK (0x1 <
37 #define OTHERS_MASK (MODEM
38
39 /* IRQ handler register bitmasks */
40 #define DEFERRED_FIQ_MASK OMAP_I
41 #define GPIO_BANK1_MASK OMAP_I
42
43 /* Driver buffer byte offsets */
44 #define BUF_MASK (FIQ_M
45 #define BUF_STATE (FIQ_S
46 #define BUF_KEYS_CNT (FIQ_K
47 #define BUF_TAIL_OFFSET (FIQ_T
48 #define BUF_HEAD_OFFSET (FIQ_H
49 #define BUF_BUF_LEN (FIQ_B
50 #define BUF_KEY (FIQ_K
51 #define BUF_MISSED_KEYS (FIQ_M
52 #define BUF_BUFFER_START (FIQ_B
53 #define BUF_GPIO_INT_MASK (FIQ_G
54 #define BUF_KEYS_HICNT (FIQ_K
55 #define BUF_IRQ_PEND (FIQ_I
56 #define BUF_SIR_CODE_L1 (FIQ_S
57 #define BUF_SIR_CODE_L2 (IRQ_S
58 #define BUF_CNT_INT_00 (FIQ_C
59 #define BUF_CNT_INT_KEY (FIQ_C
60 #define BUF_CNT_INT_MDM (FIQ_C
61 #define BUF_CNT_INT_03 (FIQ_C
62 #define BUF_CNT_INT_HSW (FIQ_C
63 #define BUF_CNT_INT_05 (FIQ_C
64 #define BUF_CNT_INT_06 (FIQ_C
65 #define BUF_CNT_INT_07 (FIQ_C
66 #define BUF_CNT_INT_08 (FIQ_C
67 #define BUF_CNT_INT_09 (FIQ_C
68 #define BUF_CNT_INT_10 (FIQ_C
69 #define BUF_CNT_INT_11 (FIQ_C
70 #define BUF_CNT_INT_12 (FIQ_C
71 #define BUF_CNT_INT_13 (FIQ_C
72 #define BUF_CNT_INT_14 (FIQ_C
73 #define BUF_CNT_INT_15 (FIQ_C
74 #define BUF_CIRC_BUFF (FIQ_C
75
76
77 /*
78 * Register usage
79 * r8 - temporary
80 * r9 - the driver buffer
81 * r10 - temporary
82 * r11 - interrupts mask
83 * r12 - base pointers
84 * r13 - interrupts status
85 */
86
87 .text
88
89 .global qwerty_fiqin_end
90
91 ENTRY(qwerty_fiqin_start)
92 @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
93 @ FIQ intrrupt handler
94 ldr r12, omap_ih1_base
95
96 ldr r11, [r12, #IRQ_MIR_REG_OFFSET]
97
98 ldr r13, [r12, #IRQ_ITR_REG_OFFSET]
99 bics r13, r13, r11
100 beq exit
101
102 ldr r10, [r12, #IRQ_SIR_FIQ_REG_OFFSET
103
104 mov r8, #2
105 str r8, [r12, #IRQ_CONTROL_REG_OFFSET]
106
107 cmp r10, #(INT_GPIO_BANK1 - NR_IRQS_LE
108 beq gpio
109
110 mov r8, #1
111 orr r8, r11, r8, lsl r10
112 str r8, [r12, #IRQ_MIR_REG_OFFSET]
113 exit:
114 subs pc, lr, #4
115 @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
116
117
118 @@@@@@@@@@@@@@@@@@@@@@@@@@@
119 gpio: @ GPIO bank interrupt handler
120 ldr r12, omap1510_gpio_base
121
122 ldr r11, [r12, #OMAP1510_GPIO_INT_MASK
123 restart:
124 ldr r13, [r12, #OMAP1510_GPIO_INT_STAT
125 bics r13, r13, r11
126 beq exit
127
128 orr r11, r11, r13
129 str r11, [r12, #OMAP1510_GPIO_INT_MASK
130
131 str r13, [r12, #OMAP1510_GPIO_INT_STAT
132
133 ands r10, r13, #KEYBRD_CLK_MASK
134 beq hksw
135
136
137 @@@@@@@@@@@@@@@@@@@@@@
138 @ Keyboard clock FIQ mode interrupt ha
139 @ r10 now contains KEYBRD_CLK_MASK, us
140 bic r11, r11, r10
141 str r11, [r12, #OMAP1510_GPIO_INT_MASK
142
143 @ Process keyboard data
144 ldr r8, [r12, #OMAP1510_GPIO_DATA_INPU
145
146 ldr r10, [r9, #BUF_STATE]
147 cmp r10, #0
148 bne data
149
150 ands r8, r8, #KEYBRD_DATA_MASK
151 beq hksw
152
153 @ r8 contains KEYBRD_DATA_MASK, use it
154 str r8, [r9, #BUF_STATE]
155 @ r10 already contains 0, reuse it
156 str r10, [r9, #BUF_KEY]
157 mov r10, #2
158 str r10, [r9, #BUF_MASK]
159
160 @ Mask other GPIO line interrupts till
161 str r11, [r9, #BUF_GPIO_INT_MASK]
162 mvn r11, #KEYBRD_CLK_MASK
163 str r11, [r12, #OMAP1510_GPIO_INT_MASK
164
165 b restart
166
167 data: ldr r10, [r9, #BUF_MASK]
168
169 @ r8 still contains GPIO input bits
170 ands r8, r8, #KEYBRD_DATA_MASK
171 ldreq r8, [r9, #BUF_KEY]
172 orreq r8, r8, r10
173 streq r8, [r9, #BUF_KEY]
174
175 mov r10, r10, lsl #1
176 bics r10, r10, #0x800
177 strne r10, [r9, #BUF_MASK]
178 bne restart
179
180 @ r10 already contains 0, reuse it
181 str r10, [r9, #BUF_STATE]
182
183 @ Key done - restore interrupt mask
184 ldr r10, [r9, #BUF_GPIO_INT_MASK]
185 and r11, r11, r10
186 str r11, [r12, #OMAP1510_GPIO_INT_MASK
187
188 @ Try appending the keycode to the cir
189 ldr r10, [r9, #BUF_KEYS_CNT]
190 ldr r8, [r9, #BUF_BUF_LEN]
191 cmp r10, r8
192 beq hksw
193
194 add r10, r10, #1
195 str r10, [r9, #BUF_KEYS_CNT]
196
197 ldr r10, [r9, #BUF_TAIL_OFFSET]
198 @ r8 already contains buffer size
199 cmp r10, r8
200 moveq r10, #0
201
202 ldr r12, [r9, #BUF_BUFFER_START]
203 add r12, r12, r10, LSL #2
204 ldr r8, [r9, #BUF_KEY]
205 str r8, [r12]
206
207 add r10, r10, #1
208 str r10, [r9, #BUF_TAIL_OFFSET]
209
210 ldr r10, [r9, #BUF_CNT_INT_KEY]
211 add r10, r10, #1
212 str r10, [r9, #BUF_CNT_INT_KEY]
213 @@@@@@@@@@@@@@@@@@@@@@@@
214
215
216 hksw: @Is hook switch interrupt requested?
217 tst r13, #HOOK_SWITCH_MASK
218 beq mdm
219
220
221 @@@@@@@@@@@@@@@@@@@@@@@@
222 @ Hook switch interrupt FIQ mode simpl
223
224 @ Don't toggle active edge, the switch
225
226 @ Increment hook switch interrupt coun
227 ldr r10, [r9, #BUF_CNT_INT_HSW]
228 add r10, r10, #1
229 str r10, [r9, #BUF_CNT_INT_HSW]
230 @@@@@@@@@@@@@@@@@@@@@@@@
231
232
233 mdm: @Is it a modem interrupt?
234 tst r13, #MODEM_IRQ_MASK
235 beq irq
236
237
238 @@@@@@@@@@@@@@@@@@@@@@@@
239 @ Modem FIQ mode interrupt handler stu
240
241 @ Increment modem interrupt counter
242 ldr r10, [r9, #BUF_CNT_INT_MDM]
243 add r10, r10, #1
244 str r10, [r9, #BUF_CNT_INT_MDM]
245 @@@@@@@@@@@@@@@@@@@@@@@@
246
247
248 irq: @ Place deferred_fiq interrupt request
249 ldr r12, deferred_fiq_ih_base
250 mov r10, #DEFERRED_FIQ_MASK
251 str r10, [r12, #IRQ_ISR_REG_OFFSET]
252
253 ldr r12, omap1510_gpio_base
254 b restart
255 @@@@@@@@@@@@@@@@@@@@@@@@@@@
256
257
258 /*
259 * Virtual addresses for IO
260 */
261 omap_ih1_base:
262 .word OMAP1_IO_ADDRESS(OMAP_IH1_BASE)
263 deferred_fiq_ih_base:
264 .word OMAP1_IO_ADDRESS(DEFERRED_FIQ_IH
265 omap1510_gpio_base:
266 .word OMAP1_IO_ADDRESS(OMAP1510_GPIO_B
267 qwerty_fiqin_end:
268
269 /*
270 * Check the size of the FIQ,
271 * it cannot go beyond 0xffff0200, and is copi
272 */
273 .if (qwerty_fiqin_end - qwerty_fiqin_start) >
274 .err
275 .endif
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