1 // SPDX-License-Identifier: GPL-2.0-or-later 1
2 /*
3 * linux/arch/arm/mach-omap1/devices.c
4 *
5 * OMAP1 platform device setup/initialization
6 */
7
8 #include <linux/dma-mapping.h>
9 #include <linux/module.h>
10 #include <linux/kernel.h>
11 #include <linux/init.h>
12 #include <linux/platform_device.h>
13 #include <linux/spi/spi.h>
14
15 #include <linux/platform_data/omap-wd-timer.h>
16 #include <linux/soc/ti/omap1-io.h>
17
18 #include <asm/mach/map.h>
19
20 #include "tc.h"
21 #include "mux.h"
22
23 #include "hardware.h"
24 #include "common.h"
25 #include "clock.h"
26 #include "mmc.h"
27 #include "sram.h"
28
29 #if IS_ENABLED(CONFIG_RTC_DRV_OMAP)
30
31 #define OMAP_RTC_BASE 0xfffb4800
32
33 static struct resource rtc_resources[] = {
34 {
35 .start = OMAP_RTC_BAS
36 .end = OMAP_RTC_BAS
37 .flags = IORESOURCE_M
38 },
39 {
40 .start = INT_RTC_TIME
41 .flags = IORESOURCE_I
42 },
43 {
44 .start = INT_RTC_ALAR
45 .flags = IORESOURCE_I
46 },
47 };
48
49 static struct platform_device omap_rtc_device
50 .name = "omap_rtc",
51 .id = -1,
52 .num_resources = ARRAY_SIZE(rtc_resou
53 .resource = rtc_resources,
54 };
55
56 static void omap_init_rtc(void)
57 {
58 (void) platform_device_register(&omap_
59 }
60 #else
61 static inline void omap_init_rtc(void) {}
62 #endif
63
64 /*--------------------------------------------
65
66 #if IS_ENABLED(CONFIG_MMC_OMAP)
67
68 static inline void omap1_mmc_mux(struct omap_m
69 int controller_nr)
70 {
71 if (controller_nr == 0) {
72 omap_cfg_reg(MMC_CMD);
73 omap_cfg_reg(MMC_CLK);
74 omap_cfg_reg(MMC_DAT0);
75
76 if (cpu_is_omap1710()) {
77 omap_cfg_reg(M15_1710_
78 omap_cfg_reg(P19_1710_
79 omap_cfg_reg(P20_1710_
80 }
81 if (mmc_controller->slots[0].w
82 omap_cfg_reg(MMC_DAT1)
83 /* NOTE: DAT2 can be o
84 if (!mmc_controller->s
85 omap_cfg_reg(M
86 omap_cfg_reg(MMC_DAT3)
87 }
88 }
89
90 /* Block 2 is on newer chips, and has
91 if (cpu_is_omap16xx() && controller_nr
92 if (!mmc_controller->slots[1].
93 omap_cfg_reg(Y8_1610_M
94 omap_cfg_reg(Y10_1610_
95 omap_cfg_reg(R18_1610_
96 omap_cfg_reg(W8_1610_M
97 if (mmc_controller->sl
98 omap_cfg_reg(V
99 omap_cfg_reg(W
100 omap_cfg_reg(R
101 }
102
103 /* These are needed fo
104 omap_cfg_reg(V9_1610_M
105 omap_cfg_reg(V5_1610_M
106 omap_cfg_reg(W19_1610_
107 }
108
109 /* Feedback clock must be set
110 if (cpu_is_omap1710())
111 omap_writel(omap_readl
112 MOD_CO
113 }
114 }
115
116 #define OMAP_MMC_NR_RES 4
117
118 /*
119 * Register MMC devices.
120 */
121 static int __init omap_mmc_add(const char *nam
122 unsigned long
123 unsigned rx_re
124 struct omap_mm
125 {
126 struct platform_device *pdev;
127 struct resource res[OMAP_MMC_NR_RES];
128 int ret;
129
130 pdev = platform_device_alloc(name, id)
131 if (!pdev)
132 return -ENOMEM;
133
134 memset(res, 0, OMAP_MMC_NR_RES * sizeo
135 res[0].start = base;
136 res[0].end = base + size - 1;
137 res[0].flags = IORESOURCE_MEM;
138 res[1].start = res[1].end = irq;
139 res[1].flags = IORESOURCE_IRQ;
140 res[2].start = rx_req;
141 res[2].name = "rx";
142 res[2].flags = IORESOURCE_DMA;
143 res[3].start = tx_req;
144 res[3].name = "tx";
145 res[3].flags = IORESOURCE_DMA;
146
147 if (cpu_is_omap15xx())
148 data->slots[0].features = MMC_
149 if (cpu_is_omap16xx())
150 data->slots[0].features = MMC_
151
152 ret = platform_device_add_resources(pd
153 if (ret == 0)
154 ret = platform_device_add_data
155 if (ret)
156 goto fail;
157
158 ret = platform_device_add(pdev);
159 if (ret)
160 goto fail;
161
162 /* return device handle to board setup
163 data->dev = &pdev->dev;
164 return 0;
165
166 fail:
167 platform_device_put(pdev);
168 return ret;
169 }
170
171 void __init omap1_init_mmc(struct omap_mmc_pla
172 int nr_controllers)
173 {
174 int i;
175
176 for (i = 0; i < nr_controllers; i++) {
177 unsigned long base, size;
178 unsigned rx_req, tx_req;
179 unsigned int irq = 0;
180
181 if (!mmc_data[i])
182 continue;
183
184 omap1_mmc_mux(mmc_data[i], i);
185
186 switch (i) {
187 case 0:
188 base = OMAP1_MMC1_BASE
189 irq = INT_MMC;
190 rx_req = 22;
191 tx_req = 21;
192 break;
193 case 1:
194 if (!cpu_is_omap16xx()
195 return;
196 base = OMAP1_MMC2_BASE
197 irq = INT_1610_MMC2;
198 rx_req = 55;
199 tx_req = 54;
200 break;
201 default:
202 continue;
203 }
204 size = OMAP1_MMC_SIZE;
205
206 omap_mmc_add("mmci-omap", i, b
207 rx_req, tx_req
208 }
209 }
210
211 #endif
212
213 /*--------------------------------------------
214
215 /* Numbering for the SPI-capable controllers w
216 * spi = 1
217 * uwire = 2
218 * mmc1..2 = 3..4
219 * mcbsp1..3 = 5..7
220 */
221
222 #if IS_ENABLED(CONFIG_SPI_OMAP_UWIRE)
223
224 #define OMAP_UWIRE_BASE 0xfffb3000
225
226 static struct resource uwire_resources[] = {
227 {
228 .start = OMAP_UWIRE_B
229 .end = OMAP_UWIRE_B
230 .flags = IORESOURCE_M
231 },
232 };
233
234 static struct platform_device omap_uwire_devic
235 .name = "omap_uwire",
236 .id = -1,
237 .num_resources = ARRAY_SIZE(uwire_res
238 .resource = uwire_resources,
239 };
240
241 static void omap_init_uwire(void)
242 {
243 /* FIXME define and use a boot tag; no
244 * up devices to the microwire control
245 * mean that CONFIG_SPI_OMAP_UWIRE may
246 */
247
248 /* board-specific code must configure
249 * are normally used) and SCLK/SDI/SDO
250 */
251 (void) platform_device_register(&omap_
252 }
253 #else
254 static inline void omap_init_uwire(void) {}
255 #endif
256
257
258 #define OMAP1_RNG_BASE 0xfffe5000
259
260 static struct resource omap1_rng_resources[] =
261 {
262 .start = OMAP1_RNG_BA
263 .end = OMAP1_RNG_BA
264 .flags = IORESOURCE_M
265 },
266 };
267
268 static struct platform_device omap1_rng_device
269 .name = "omap_rng",
270 .id = -1,
271 .num_resources = ARRAY_SIZE(omap1_rng
272 .resource = omap1_rng_resources,
273 };
274
275 static void omap1_init_rng(void)
276 {
277 if (!cpu_is_omap16xx())
278 return;
279
280 (void) platform_device_register(&omap1
281 }
282
283 /*--------------------------------------------
284
285 /*
286 * This gets called after board-specific INIT_
287 * on-chip peripherals accessible on this boar
288 *
289 * (a) Does any "standard config" pin muxing
290 * code will have muxed GPIO pins and don
291 * that code could live in the boot loade
292 * (b) Populating board-specific platform_dat
293 * rely on to handle wiring variations.
294 * (c) Creating platform devices as meaningfu
295 * with this kernel configuration.
296 *
297 * Claiming GPIOs, and setting their direction
298 * responsibility of the device drivers. So i
299 *
300 * Board-specific knowledge like creating devi
301 * kept out of drivers as much as possible. I
302 * may be handled by the boot loader, and driv
303 * normally have been done by the time they're
304 */
305 static int __init omap1_init_devices(void)
306 {
307 if (!cpu_class_is_omap1())
308 return -ENODEV;
309
310 omap1_sram_init();
311 omap1_clk_late_init();
312
313 /* please keep these calls, and their
314 * in alphabetical order so they're ea
315 */
316
317 omap_init_rtc();
318 omap_init_uwire();
319 omap1_init_rng();
320
321 return 0;
322 }
323 arch_initcall(omap1_init_devices);
324
325 #if IS_ENABLED(CONFIG_OMAP_WATCHDOG)
326
327 static struct resource wdt_resources[] = {
328 {
329 .start = 0xfffeb000,
330 .end = 0xfffeb07F,
331 .flags = IORESOURCE_M
332 },
333 };
334
335 static struct platform_device omap_wdt_device
336 .name = "omap_wdt",
337 .id = -1,
338 .num_resources = ARRAY_SIZE(wdt_resou
339 .resource = wdt_resources,
340 };
341
342 static int __init omap_init_wdt(void)
343 {
344 struct omap_wd_timer_platform_data pda
345 int ret;
346
347 if (!cpu_is_omap16xx())
348 return -ENODEV;
349
350 pdata.read_reset_sources = omap1_get_r
351
352 ret = platform_device_register(&omap_w
353 if (!ret) {
354 ret = platform_device_add_data
355
356 if (ret)
357 platform_device_del(&o
358 }
359
360 return ret;
361 }
362 subsys_initcall(omap_init_wdt);
363 #endif
364
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.