1 /* SPDX-License-Identifier: GPL-2.0-only */ 1
2 /*
3 * OMAP2/3 Clock Management (CM) register defi
4 *
5 * Copyright (C) 2007-2009 Texas Instruments,
6 * Copyright (C) 2007-2010 Nokia Corporation
7 * Paul Walmsley
8 *
9 * The CM hardware modules on the OMAP2/3 are
10 * other. The CM modules/instances on OMAP4 a
11 * they are handled in a separate file.
12 */
13 #ifndef __ARCH_ASM_MACH_OMAP2_CM3XXX_H
14 #define __ARCH_ASM_MACH_OMAP2_CM3XXX_H
15
16 #include "prcm-common.h"
17 #include "cm2xxx_3xxx.h"
18
19 #define OMAP34XX_CM_REGADDR(module, reg)
20 OMAP2_L4_IO_ADDRESS(OM
21
22
23 /*
24 * OMAP3-specific global CM registers
25 * Use cm_{read,write}_reg() with these regist
26 * These registers appear once per CM module.
27 */
28
29 #define OMAP3430_CM_SYSCONFIG 0x0010
30 #define OMAP3430_CM_POLCTRL 0x009c
31
32 #define OMAP3_CM_CLKOUT_CTRL_OFFSET 0x0070
33 #define OMAP3430_CM_CLKOUT_CTRL OMAP_C
34
35 /*
36 * Module specific CM register offsets from CM
37 * Use cm_{read,write}_mod_reg() with these re
38 * These register offsets generally appear in
39 */
40
41 /* OMAP3-specific register offsets */
42
43 #define OMAP3430_CM_CLKEN_PLL
44 #define OMAP3430ES2_CM_CLKEN2
45 #define OMAP3430ES2_CM_FCLKEN3
46 #define OMAP3430_CM_IDLEST_PLL
47 #define OMAP3430_CM_AUTOIDLE_PLL
48 #define OMAP3430ES2_CM_AUTOIDLE2_PLL
49 #define OMAP3430_CM_CLKSEL1
50 #define OMAP3430_CM_CLKSEL1_PLL
51 #define OMAP3430_CM_CLKSEL2_PLL
52 #define OMAP3430_CM_SLEEPDEP
53 #define OMAP3430_CM_CLKSEL3
54 #define OMAP3430_CM_CLKSTST
55 #define OMAP3430ES2_CM_CLKSEL4
56 #define OMAP3430ES2_CM_CLKSEL5
57 #define OMAP3430_CM_CLKSEL2_EMU
58 #define OMAP3430_CM_CLKSEL3_EMU
59
60
61 /* CM_IDLEST bit field values to indicate deas
62
63 #define OMAP34XX_CM_IDLEST_VAL
64
65
66 #ifndef __ASSEMBLER__
67
68 extern void omap3_cm_save_context(void);
69 extern void omap3_cm_restore_context(void);
70 extern void omap3_cm_save_scratchpad_contents(
71
72 int __init omap3xxx_cm_init(const struct omap_
73
74 #endif
75
76 #endif
77
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