1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * OMAP34xx and OMAP44xx secure APIs file.
4 *
5 * Copyright (C) 2010 Texas Instruments, Inc.
6 * Written by Santosh Shilimkar <santosh.shilim
7 *
8 * Copyright (C) 2012 Ivaylo Dimitrov <freemang
9 * Copyright (C) 2013 Pali Rohár <pali@kernel.
10 */
11
12 #include <linux/linkage.h>
13
14 /*
15 * This is common routine to manage secure mon
16 * used to modify the PL310 secure registers.
17 * 'r0' contains the value to be modified and
18 * the monitor API number. It uses few CPU reg
19 * internally and hence they need be backed up
20 * link register "lr".
21 * Function signature : void _omap_smc1(u32 fn
22 */
23 .arch armv7-a
24 .arch_extension sec
25 ENTRY(_omap_smc1)
26 stmfd sp!, {r2-r12, lr}
27 mov r12, r0
28 mov r0, r1
29 dsb
30 smc #0
31 ldmfd sp!, {r2-r12, pc}
32 ENDPROC(_omap_smc1)
33
34 /**
35 * u32 omap_smc2(u32 id, u32 falg, u32 pargs)
36 * Low level common routine for secure HAL and
37 * @id: Application ID of HAL APIs
38 * @flag: Flag to indicate the criticality of
39 * @pargs: Physical address of parameter list
40 * with number of parametrs
41 */
42 ENTRY(omap_smc2)
43 stmfd sp!, {r4-r12, lr}
44 mov r3, r2
45 mov r2, r1
46 mov r1, #0x0 @ Process ID
47 mov r6, #0xff
48 mov r12, #0x00 @ Secure Servi
49 mov r7, #0
50 mcr p15, 0, r7, c7, c5, 6
51 dsb
52 dmb
53 smc #0
54 ldmfd sp!, {r4-r12, pc}
55 ENDPROC(omap_smc2)
56
57 /**
58 * u32 omap_smc3(u32 service_id, u32 process_i
59 * Low level common routine for secure HAL and
60 * r0 - @service_id: Secure Service ID
61 * r1 - @process_id: Process ID
62 * r2 - @flag: Flag to indicate the criticalit
63 * r3 - @pargs: Physical address of parameter
64 */
65 ENTRY(omap_smc3)
66 stmfd sp!, {r4-r11, lr}
67 mov r12, r0 @ Copy the sec
68 mov r6, #0xff @ Indicate new
69 dsb @ Memory Barri
70 smc #1 @ Call PPA ser
71 ldmfd sp!, {r4-r11, pc}
72 ENDPROC(omap_smc3)
73
74 ENTRY(omap_modify_auxcoreboot0)
75 stmfd sp!, {r1-r12, lr}
76 ldr r12, =0x104
77 dsb
78 smc #0
79 ldmfd sp!, {r1-r12, pc}
80 ENDPROC(omap_modify_auxcoreboot0)
81
82 ENTRY(omap_auxcoreboot_addr)
83 stmfd sp!, {r2-r12, lr}
84 ldr r12, =0x105
85 dsb
86 smc #0
87 ldmfd sp!, {r2-r12, pc}
88 ENDPROC(omap_auxcoreboot_addr)
89
90 ENTRY(omap_read_auxcoreboot0)
91 stmfd sp!, {r2-r12, lr}
92 ldr r12, =0x103
93 dsb
94 smc #0
95 ldmfd sp!, {r2-r12, pc}
96 ENDPROC(omap_read_auxcoreboot0)
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