1 // SPDX-License-Identifier: GPL-2.0 1
2 /*
3 * opp2420_data.c - old-style "OPP" table for
4 *
5 * Copyright (C) 2005-2009 Texas Instruments,
6 * Copyright (C) 2004-2009 Nokia Corporation
7 *
8 * Richard Woodruff <r-woodruff2@ti.com>
9 *
10 * The OMAP2 processor can be run at several d
11 * These configurations are characterized by v
12 * The device is only validated for certain co
13 * these combinations is via the 'ratios' whic
14 * respect to each other. These ratio sets are
15 * setting. All configurations can be describe
16 *
17 * XXX Missing voltage data.
18 * XXX Missing 19.2MHz sys_clk rate sets (need
19 *
20 * THe format described in this file is deprec
21 * OPP API exists, the data in this file shoul
22 *
23 * This is technically part of the OMAP2xxx cl
24 *
25 * Considerable work is still needed to fully
26 * changes on OMAP2xxx-series chips. Readers
27 * project are encouraged to review the Maemo
28 * kernel source at:
29 * http://repository.maemo.org/pool/diablo
30 */
31
32 #include <linux/kernel.h>
33
34 #include "opp2xxx.h"
35 #include "sdrc.h"
36 #include "clock.h"
37
38 /*
39 * Key dividers which make up a PRCM set. Rati
40 * xtal_speed, dpll_speed, mpu_speed, CM_CLKSE
41 * CM_CLKSEL_DSP, CM_CLKSEL_GFX, CM_CLKSEL1_CO
42 * CM_CLKSEL2_PLL, CM_CLKSEL_MDM
43 *
44 * Filling in table based on H4 boards availab
45 * few more rate combinations which could be d
46 *
47 * When multiple values are defined the start
48 * the fastest one. If a 'fast' value is defin
49 * the /2 one should be included as it can be
50 * more than one fast set does not make sense,
51 * to be changed to change the set. The excep
52 * setting which is available for low power by
53 *
54 * Note: This table needs to be sorted, fastes
55 **/
56 const struct prcm_config omap2420_rate_table[]
57 /* PRCM I - FAST */
58 {S12M, S660M, S330M, RI_CM_CLKSEL_MPU_
59 RI_CM_CLKSEL_DSP_VAL, RI_CM_CL
60 RI_CM_CLKSEL1_CORE_VAL, MI_CM_
61 MX_CLKSEL2_PLL_2x_VAL, 0, SDRC
62 RATE_IN_242X},
63
64 /* PRCM II - FAST */
65 {S12M, S600M, S300M, RII_CM_CLKSEL_MPU
66 RII_CM_CLKSEL_DSP_VAL, RII_CM_
67 RII_CM_CLKSEL1_CORE_VAL, MII_C
68 MX_CLKSEL2_PLL_2x_VAL, 0, SDRC
69 RATE_IN_242X},
70
71 {S13M, S600M, S300M, RII_CM_CLKSEL_MPU
72 RII_CM_CLKSEL_DSP_VAL, RII_CM_
73 RII_CM_CLKSEL1_CORE_VAL, MII_C
74 MX_CLKSEL2_PLL_2x_VAL, 0, SDRC
75 RATE_IN_242X},
76
77 /* PRCM III - FAST */
78 {S12M, S532M, S266M, RIII_CM_CLKSEL_MP
79 RIII_CM_CLKSEL_DSP_VAL, RIII_C
80 RIII_CM_CLKSEL1_CORE_VAL, MIII
81 MX_CLKSEL2_PLL_2x_VAL, 0, SDRC
82 RATE_IN_242X},
83
84 {S13M, S532M, S266M, RIII_CM_CLKSEL_MP
85 RIII_CM_CLKSEL_DSP_VAL, RIII_C
86 RIII_CM_CLKSEL1_CORE_VAL, MIII
87 MX_CLKSEL2_PLL_2x_VAL, 0, SDRC
88 RATE_IN_242X},
89
90 /* PRCM II - SLOW */
91 {S12M, S300M, S150M, RII_CM_CLKSEL_MPU
92 RII_CM_CLKSEL_DSP_VAL, RII_CM_
93 RII_CM_CLKSEL1_CORE_VAL, MII_C
94 MX_CLKSEL2_PLL_2x_VAL, 0, SDRC
95 RATE_IN_242X},
96
97 {S13M, S300M, S150M, RII_CM_CLKSEL_MPU
98 RII_CM_CLKSEL_DSP_VAL, RII_CM_
99 RII_CM_CLKSEL1_CORE_VAL, MII_C
100 MX_CLKSEL2_PLL_2x_VAL, 0, SDRC
101 RATE_IN_242X},
102
103 /* PRCM III - SLOW */
104 {S12M, S266M, S133M, RIII_CM_CLKSEL_MP
105 RIII_CM_CLKSEL_DSP_VAL, RIII_C
106 RIII_CM_CLKSEL1_CORE_VAL, MIII
107 MX_CLKSEL2_PLL_2x_VAL, 0, SDRC
108 RATE_IN_242X},
109
110 {S13M, S266M, S133M, RIII_CM_CLKSEL_MP
111 RIII_CM_CLKSEL_DSP_VAL, RIII_C
112 RIII_CM_CLKSEL1_CORE_VAL, MIII
113 MX_CLKSEL2_PLL_2x_VAL, 0, SDRC
114 RATE_IN_242X},
115
116 /* PRCM-VII (boot-bypass) */
117 {S12M, S12M, S12M, RVII_CM_CLKSEL_MPU_
118 RVII_CM_CLKSEL_DSP_VAL, RVII_C
119 RVII_CM_CLKSEL1_CORE_VAL, MVII
120 MX_CLKSEL2_PLL_2x_VAL, 0, SDRC
121 RATE_IN_242X},
122
123 /* PRCM-VII (boot-bypass) */
124 {S13M, S13M, S13M, RVII_CM_CLKSEL_MPU_
125 RVII_CM_CLKSEL_DSP_VAL, RVII_C
126 RVII_CM_CLKSEL1_CORE_VAL, MVII
127 MX_CLKSEL2_PLL_2x_VAL, 0, SDRC
128 RATE_IN_242X},
129
130 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
131 };
132
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.