1 /* SPDX-License-Identifier: GPL-2.0-only */ 1 2 /* 3 * AM33XX PRM_XXX register bits 4 * 5 * Copyright (C) 2011-2012 Texas Instruments I 6 */ 7 8 #ifndef __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_33XX 9 #define __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_33XX 10 11 #include "prm.h" 12 13 #define AM33XX_GFX_MEM_ONSTATE_MASK 14 #define AM33XX_GFX_MEM_RETSTATE_MASK 15 #define AM33XX_GFX_MEM_STATEST_MASK 16 #define AM33XX_GLOBAL_WARM_SW_RST_MASK 17 #define AM33XX_RST_GLOBAL_WARM_SW_MASK 18 #define AM33XX_RST_GLOBAL_COLD_SW_MASK 19 #define AM33XX_PRUSS_MEM_ONSTATE_MASK 20 #define AM33XX_PRUSS_MEM_RETSTATE_MASK 21 #define AM33XX_PRUSS_MEM_STATEST_MASK 22 #define AM33XX_LASTPOWERSTATEENTERED_SHIFT 23 #define AM33XX_LASTPOWERSTATEENTERED_MASK 24 #define AM33XX_LOGICRETSTATE_MASK 25 #define AM33XX_LOGICRETSTATE_3_3_MASK 26 #define AM33XX_LOGICSTATEST_SHIFT 27 #define AM33XX_LOGICSTATEST_MASK 28 #define AM33XX_LOWPOWERSTATECHANGE_SHIFT 29 #define AM33XX_LOWPOWERSTATECHANGE_MASK 30 #define AM33XX_MPU_L1_ONSTATE_MASK 31 #define AM33XX_MPU_L1_RETSTATE_MASK 32 #define AM33XX_MPU_L1_STATEST_MASK 33 #define AM33XX_MPU_L2_ONSTATE_MASK 34 #define AM33XX_MPU_L2_RETSTATE_MASK 35 #define AM33XX_MPU_L2_STATEST_MASK 36 #define AM33XX_MPU_RAM_ONSTATE_MASK 37 #define AM33XX_MPU_RAM_RETSTATE_MASK 38 #define AM33XX_MPU_RAM_STATEST_MASK 39 #define AM33XX_PER_MEM_ONSTATE_MASK 40 #define AM33XX_PER_MEM_RETSTATE_MASK 41 #define AM33XX_PER_MEM_STATEST_MASK 42 #define AM33XX_RAM_MEM_ONSTATE_MASK 43 #define AM33XX_RAM_MEM_RETSTATE_MASK 44 #define AM33XX_RAM_MEM_STATEST_MASK 45 #endif 46
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